U.S. patent application number 15/404250 was filed with the patent office on 2017-06-15 for batch fabricated microconnectors.
The applicant listed for this patent is Nuvotronics, Inc.. Invention is credited to Jean-Marc Rollin, David W. Sherrer.
Application Number | 20170170592 15/404250 |
Document ID | / |
Family ID | 51358459 |
Filed Date | 2017-06-15 |
United States Patent
Application |
20170170592 |
Kind Code |
A1 |
Sherrer; David W. ; et
al. |
June 15, 2017 |
BATCH FABRICATED MICROCONNECTORS
Abstract
Connectors and interconnects for high power connectors which may
operate at frequencies up to approximately 110 GHz and fabrication
methods thereof are provided.
Inventors: |
Sherrer; David W.; (Cary,
NC) ; Rollin; Jean-Marc; (Chapel Hill, NC) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Nuvotronics, Inc. |
Radford |
VA |
US |
|
|
Family ID: |
51358459 |
Appl. No.: |
15/404250 |
Filed: |
January 12, 2017 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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14468863 |
Aug 26, 2014 |
9583856 |
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15404250 |
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13490089 |
Jun 6, 2012 |
8814601 |
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14468863 |
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61493517 |
Jun 6, 2011 |
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01R 13/514 20130101;
H01L 2924/0002 20130101; H01L 2924/00 20130101; H01L 2924/0001
20130101; H01L 23/49811 20130101; H05K 3/366 20130101; H05K
2201/10189 20130101; H01R 4/34 20130101; H01L 2924/0002 20130101;
H01R 13/111 20130101; H01R 24/50 20130101; H01R 13/40 20130101;
H01R 43/16 20130101; H01L 2924/0002 20130101; Y10T 29/49165
20150115 |
International
Class: |
H01R 13/40 20060101
H01R013/40; H01R 43/16 20060101 H01R043/16; H01R 24/50 20060101
H01R024/50; H01R 13/514 20060101 H01R013/514; H01R 13/11 20060101
H01R013/11 |
Claims
1-27. (canceled)
28. A multilayer microconnector structure, comprising: a substrate
having opposing first and second surfaces; a plurality of
microconnectors disposed in an array of a selected pitch at the
first substrate surface, each microconnector comprising a plurality
of stacked layers of a conductor material extending upwardly from
the first substrate surface; and a dilation having opposing first
and second dilation surfaces, the first dilation surface having a
first array of electrical contacts disposed thereat having a pitch
equal to that of the selected pitch, each electrical contact
disposed in electrical communication with a respective
microconnector of the plurality of microconnectors, and the
dilation having a second array of electrical contacts disposed at
the second dilation surface, the second array having a second pitch
different from the selected pitch, the dilation comprising
transmission lines extending within the dilation, each line
extending from a respective contact of the first dilation surface
to a respective contact of the second dilation surface.
29. The multilayer microconnector structure according to claim 28,
wherein at least one of the first and second substrate surfaces
includes one or more of an active electronic component and a
passive electronic component.
30. The multilayer microconnector structure according to claim 29,
wherein the passive electronic component includes one or more of a
thin-film, thick-film, or surface mount resistor.
31. The multilayer microconnector structure according to claim 28,
wherein each microconnector includes a center conductor and an
outer conductor, and wherein at least one of an active electronic
component and a passive electronic component is electrically
connected between the center and outer conductors.
32. The multilayer microconnector structure according to claim 28,
comprising one or more of an active electronic component and a
passive electronic component operably connected within each of the
plurality of microconnectors.
33. The multilayer microconnector structure according to claim 28,
wherein the substrate is an active device.
34. The multilayer microconnector structure according to claim 28,
wherein the substrate includes a circuit board.
35. The multilayer microconnector structure according to claim 28,
wherein the substrate includes a MMIC.
36. The multilayer microconnector structure according to claim 28,
wherein each microconnector includes a hollow waveguide.
37. The multilayer microconnector structure according to claim 28,
wherein each microconnector is a hollow waveguide.
38. The multilayer microconnector structure according to claim 28,
wherein the dilation transmission lines include coaxial
transmission lines.
39. A method for forming a multilayer microconnector structure by a
sequential build process, comprising: depositing a plurality of
layers on a first substrate, wherein the layers comprise one or
more of a first conductor material and a first sacrificial
material; and removing the first sacrificial material, thereby
forming a multilayer microconnector structure comprising a
plurality of microconnectors disposed in an array of a selected
pitch at the first substrate surface, each microconnector
comprising a plurality of stacked layers of the first conductor
material extending upwardly from the first substrate surface.
40. The method according to claim 39, comprising: depositing a
plurality of second layers on a second substrate, wherein the
second layers comprise one or more of a second conductor material
and a second sacrificial material; and removing the second
sacrificial material, thereby forming a dilation having opposing
first and second dilation surfaces, the first dilation surface
having a first array of electrical contacts disposed thereat having
a pitch equal to that of the selected pitch, and the dilation
having a second array of electrical contacts disposed at the second
dilation surface, the second array having a second pitch different
from the selected pitch, the dilation comprising transmission lines
formed of the second conductor material, each line extending from a
respective contact of the first dilation surface to a respective
contact of the second dilation surface.
41. The method of claim 40, wherein the dilation transmission lines
include coaxial transmission lines.
42. The method of claim 39, wherein the first and second conductor
materials are metal.
43. The method of claim 39, wherein the substrate is an active
device.
44. The method of claim 39, wherein the substrate includes a
circuit board.
45. The method of claim 39, wherein the substrate includes a
MMIC.
46. The method of claim 39, wherein each microconnector includes a
hollow waveguide.
47. The method of claim 39, wherein each microconnector is a hollow
waveguide.
48. A method for forming a multilayer microconnector structure by a
sequential build process, comprising: depositing a plurality of
layers on a substrate, wherein the layers comprise one or more of a
conductor material and a sacrificial material; and removing the
sacrificial material, thereby forming a dilation having opposing
first and second dilation surfaces, the first dilation surface
having a first array of electrical contacts disposed thereat having
a first pitch and having a second array of electrical contacts
disposed at the second dilation surface, the second array having a
second pitch different from the first pitch, the dilation
comprising transmission lines formed of the conductor material,
each line extending from a respective contact of the first dilation
surface to a respective contact of the second dilation surface.
49. The method of claim 48, wherein the dilation transmission lines
include coaxial transmission lines.
50. The method of claim 48, wherein the conductor material is
metal.
51. The method of claim 48, comprising removing the dilation from
the substrate.
Description
RELATED APPLICATIONS
[0001] This application claims the benefit of priority of U.S.
application Ser. No. 14/468,863, filed on Aug. 26, 2014, which in
turn claims the benefit of U.S. application Ser. No. 13/490,089,
filed on Jun. 6, 2012, now U.S. Pat. No. 8,814,601, which in turn
claims the benefit of U.S. Provisional Application No. 61/493,517,
filed on Jun. 6, 2011, the entire contents of which applications
are incorporated herein by reference.
FIELD OF THE INVENTION
[0002] The present invention relates generally to connectors and/or
interconnects, and more particularly, but not exclusively, to high
power connectors which may operate at frequencies up to
approximately 100 to 300 GHz or higher, as well as batch
fabrication methods thereof to optionally provide an array of such
connectors.
BACKGROUND OF THE INVENTION
[0003] Current millimeter wave capable connectors are typically
very expensive due to the precision required in their construction.
While a high price may be acceptable for low volume test and
measurement application, systems that operate into such frequencies
can require hundreds to many thousands of these connectors and
their costs can become a problem. By way of example, creating
phased arrays and/or other electronic warfare (EW) systems that can
span into the upper EHF range may require practical, cost-effective
interconnect solutions. High effective radiated power (ERP) EW,
radar, or communications K.sub.a band phased arrays may address the
problem of pitch mismatch between the power electronics and the
antenna array pitch using connector and cable dilations to increase
the pitch to one acceptable for the power electronics. While
expensive demonstrators may be shown without breakable
interconnect, both high yield manufacturing, re-use, and practical
deployment over a service lifetime may be expected to require
modularity provided by make/break interconnect. As such, it may be
desirable to build systems from standardized modules or
sub-assemblies and allow for modular construction and/or field
service, such as the separation of antenna sections from dilation
layers from power T or T/R (transmit or transmit/receive) modules.
Increasing the modularity in a high end microwave system can be an
important step in allowing such systems to reduce in cost and
thereby increase the quantity used. To this end, some systems may
contain hundreds to thousands of blind-mate floating connectors,
for example, to accomplish just a change in pitch between antennas
and electronics (dilations). Volume cost of a 100-GHz-capable
subminiature push-on connector series (SMPS) connector (G3PO-like)
is currently greater than $35 for a bullet and two male shrouds.
Add a phased controlled cable, and there may be well over $200 per
element often spent for the assembly for each coaxial channel. This
can amount to more than $100,000 per 20.times.20 array in the
dilation and its interconnect.
[0004] The problem may become worse at higher frequencies where
connector costs may increase and/or can no longer fit on a
half-wavelength element-to-element pitch. Interconnection at an
element pitch at W band would require .about.1.5 mm OD on the
connector .about.about 5.times. smaller in linear dimension than
SMPS/G3PO connectors. Making the connections permanent is an
approach to address this problem. However, this precludes ease of
service and/or may make production yield substantially
unobtainable. Another problem in interconnect for EW, radar, or
communications may be power handling. A G3PO may be rated at
.about.18 W at 50 GHz. Voltage standing wave ratio (VSWR) and/or
voltage breakdown may not account for this limit. In addition,
floating connector systems may utilize Be:Cu for the core metal and
polymer for the dielectric. At increasing frequency, skin effect
loss mechanisms may produce heating of the center pin metals which
may have poor thermal transfer. Due to misalignment loading, a
Teflon.RTM. dielectric (PTFE) may be prone to creep at increasing
temperatures.
[0005] Thus, a need exists to address interconnect and/or
connectors themselves spanning DC to 110 GHz or greater as a
development problem to be addressed in terms of cost, size, and the
like. Related machining, e.g., turning, operations may be incapable
of providing cost effective precision with micron level accuracy
for mm-scale devices.
SUMMARY OF THE INVENTION
[0006] In one of its aspects, the present invention relates to
connectors and/or interconnect, having a relatively smaller size
and lower cost (e.g., 10-fold lower) than existing devices. In
addition, the present invention relates to microfabrication
processes, or three-dimensional precision manufacturing process,
for example ones used to create suspended recta-coax lines, MMIC
sockets, and/or millimeter-wave (MMW) interconnection circuits with
relatively low loss, small size/high density, and/or durability.
The exemplary processes may facilitate batch manufacturing
approaches which may achieve desired tolerances without the need
for precision machining operations to obtain such tolerances. As
such, the exemplary processes may employ lithography and/or
multilayer electroforming to produce a plurality (e.g., thousands)
of connectors at a time. As a result of such processes, exemplary
devices of the present invention may operate at 500 .mu.m and lower
device dimensions, and may achieve tolerances on the submicron
scale useful, for example, in microfabrication.
[0007] For example, the present invention may provide a multilayer
microconnector structure formed by a multilayer additive build
process, which includes a substrate having first and second
opposing surfaces and having a plurality of vias extending
therebetween. A conductive material may be disposed within the vias
and may be configured to provide electrical communication between
the first and second surfaces. A first layer of conductor material
may be disposed over the substrate at the first surface, with the
conductive layer comprising a plurality of electrically isolated
upper conductive connector portions. Each upper connector portion
may be disposed in electrical communication with the conductive
material of a respective via. A second layer of conductor material
may be disposed over the substrate at the second surface, with the
second conductive layer comprising a plurality of electrically
isolated conductive lower connector portions. Each lower connector
portion may be disposed in electrical communication with the
conductive material of a respective via, so that the upper and
lower conductor portions are structured to provide a
microconnector.
[0008] In addition, the present invention may provide a method for
forming a multilayer microconnector structure comprising depositing
a plurality of layers, wherein the layers comprise one or more of a
metal material, a sacrificial mold material, and a dielectric
material, thereby forming a multilayer microconnector structure.
The structure may include a substrate having first and second
opposing surfaces and having a plurality of vias extending
therebetween; a conductive material disposed within the vias and
configured to provide electrical communication between the first
and second surfaces; a first layer of conductor material disposed
over the substrate at the first surface, the conductive layer
comprising a plurality of electrically isolated upper conductive
connector portions, each upper connector portion disposed in
electrical communication with the conductive material of a
respective via; and a second layer of conductor material disposed
over the substrate at the second surface, the second conductive
layer comprising a plurality of electrically isolated conductive
lower connector portions, each lower connector portion disposed in
electrical communication with the conductive material of a
respective via, wherein the upper and lower conductor portions are
structured to provide a microconnector.
BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The foregoing summary and the following detailed description
of the exemplary embodiments of the present invention may be
further understood when read in conjunction with the appended
drawings, in which:
[0010] FIG. 1 schematically illustrates an overall system
architecture of a 1-110 GHz electronic attack or extremely
broad-banded electronically steerable array system in which a large
quantity of small connectors of the present invention may be
employed, which connectors may operate over the full band, to
interconnect either or both sides of the dilation layer;
[0011] FIG. 2A schematically illustrates an exemplary configuration
of a surface-mount version of a 1-110 GHz connector array in
accordance with the present invention made via batch
manufacturing;
[0012] FIG. 2B illustrates a VSWR of less than approximately 1.3:1
to 110 GHz for the upper, non-SMT mounting structure of the
exemplary connector of FIG. 2A;
[0013] FIG. 2C illustrates the return loss and insertion loss for
an exemplary surface-mount connector in accordance with the present
invention;
[0014] FIGS. 3A and 3B schematically illustrate exemplary
configurations of 1 mm diameter connectors grown on a single
substrate in accordance with the present invention, with FIG. 3A
illustrating a cross-sectional view of a SMT array and
[0015] FIG. 3B illustrating floating "bullets" (female-to-female
adaptors), each of which may provide approximately 50,000
connectors on a single substrate, for example;
[0016] FIG. 4 illustrates one and three skin depths for gold versus
frequency, demonstrating that the effect of underlying layers may
be minimized at frequencies above 10 GHz with relatively little
gold;
[0017] FIGS. 5A-5C schematically illustrate various exemplary
connectors in accordance with the present invention, including a
male surface-mount connector, male and female blindmate
interconnects, and male connector with flex center pin,
respectively;
[0018] FIG. 6A-6D schematically illustrate an exemplary process
flow for batch fabricating connectors in accordance with the
present invention;
[0019] FIGS. 7A and 7B schematically illustrate exemplary coaxial
right angle connectors of the present invention, mounted and
un-mounted, respectively;
[0020] FIG. 8A schematically illustrates a monolithically formed
1-110 GHz capable dilation made with a low-loss, PolyStrata, 3D
coaxial RF routing redistribution substrate, showing dilation from
a 5'' array to a 10'' array (1:2 dilation);
[0021] FIG. 8B schematically illustrates 3D-RF coaxial routing
associated with the dilation of FIG. 8A;
[0022] FIG. 8C schematically illustrates connectors mounted on the
surfaces of a dilation of type of FIG. 8A; and
[0023] FIG. 8D schematically illustrates an isometric view of a
multi-tile dilation showing a 5''.times.5'' array on a front
surface, the multi-tile dilation measuring 10'' by 10'' to realize
a 5'' to 10'' dilation of FIG. 8A.
DETAILED DESCRIPTION OF THE INVENTION
[0024] The present invention, in one of its aspects, relates to
electric, electronic and/or electromagnetic devices, and/or
processes thereof. Exemplary devices in accordance with the present
invention may provide DC--110 GHz interconnect components for use
in phased array systems exhibiting high density, broadband
performance, and/or relatively low-loss. (While DC--110 GHz is used
as an example, it should be understood that other suitable
frequency bands may be used, such as DC to 50, 100, 150, 250 or
more GHz, for example.). The devices and methods of the present
invention may provide structures that can be scaled down
approximately five-fold in size over current structures. In
addition, approximately 50,000 parts, for example, may be
fabricated at one time over a substrate with substantially no
machining required, greatly reducing manufacturing cost.
[0025] In certain of its aspects, the present invention may relate
to three-dimensional microstructures and/or processes thereof, such
as waveguide structures, for example, which three dimensional
microstructures may provide a variety of advantages. Examples of
such microstructures and methods for their fabrication are
illustrated at least in U.S. Pat. Nos. 7,948,335, 7,405,638,
7,148,772, 7,012,489, 7,649,432, 7,656,256, 7,755,174, 7,898,356
and/or U.S. Application Pub. Nos. 2010/0109819, 2011/0210807,
2010/0296252, 2011/0273241, 2011/0123783, 2011/0181376 and/or
2011/0181377, each of which is incorporated herein by reference in
their entirety (hereinafter the "incorporated PolyStrata art"). As
used herein, the term "PolyStrata" refers to the devices made by,
or methods detailed in, any of the aforementioned and incorporated
U.S. Patents and Published Applications. While the PolyStrata
processes are one way to produce such structures, any other
suitable methods to create similar electromechanical precision
structures could be employed. For example processes such as Deep
Reactive Ion Etching, micromolding, LIGA, 3D printing, and so on
could be leveraged.
[0026] Referring now to the figures, wherein like elements are
numbered alike throughout, FIG. 1 schematically illustrates an
exemplary system architecture 100, an electronic attack system, in
which devices, such as connectors, of the present invention may be
utilized. The system 100 may include system electronics 110
comprising a plurality of traveling wave tube (TWT) and/or solid
state (SS) amplifiers 112 along with a series of distribution
filters 114. An antenna system 130, operable over 1-110 GHz, for
example, may be connected with the system electronics 110 via a
dilation layer 120 comprising connectors that are operable over the
same frequency range. Individual antennas 132, 134, 136 may each be
connected to a respective connector 122, 124, 126 of the dilation
layer 120 which in turn provides connection to respective
electronics of the system electronics 110. Adjacent connectors 122,
124 may be separated by a distance D2 at the point of connection to
respective antennas 132, 134 to match the distance of separation
between respective adjacent antennas 132, 134. Likewise, the
distance between adjacent connectors 122, 124 at the point of
connection to the system electronics 110 may be separated by a
distance D1 which is matched to the separation distance between
adjacent corresponding components of the system electronics 110. D1
may be greater than D2 such that an array of connectors 122, 124,
126 provides dilation to address the mismatch in pitch between the
relatively higher pitch of the antenna system 130 and the
relatively lower pitch of the system electronics 110. For example,
a broad-band phased array system 100 may require redistribution
from the antenna pitch to the system electronics 110, even if the
antenna system 130 is broken into several apertures. At the upper
limit of the band (110 GHz) the 1.4-mm, .lamda./2 (half-wavelength)
pitch may include redistribution for the electronics 110, for
example, since the front-end electronics 110 may require electronic
subsystems for up to each of four separate bands.
[0027] In order to conveniently and reliably provide the
multitudinous connections that may be required between the system
electronics 110 and individual antennas 132, 134, 136, the
connectors 122, 124, 126 of the present invention may be provided
as a two dimensional array 200 of coaxial connectors 210, FIG. 2A,
for example. As such, the connector array 200 may be provided via a
batch manufacturing process, such as the PolyStrata multilayer
additive build processes of the incorporated PolyStrata art, or via
other suitable technology, to provide an array 200 of approximately
as many as 50,000 connectors 210, for example. A variety of
different possible connector configurations may be utilized in the
array 200. For instance, the connector array 200 may include a
plurality of coaxial male surface-mount connectors 210 which
include a center conductor 212 and outer conductor 214 mounted to a
substrate 216, FIGS. 2A, 5A. To facilitate surface mounting, the
connector 210 may include a center conductor mounting foot 213 and
outer conductor mounting foot 215 electrically connected with the
center conductor 212 and outer conductor 214, respectively, FIGS.
2A, 5A. Solder 201 may be provided on a lower surface of the center
conductor and outer conductor mounting feet 213, 215.
[0028] Alternatively or additionally, the array 200 may include one
or more male and female blindmate interconnects 310, 320,
respectively, each including a respective center conductor 312, 336
and outer conductor 314, 334 to provide a coaxial structure, FIG.
5B. The conductive walls of any of the exemplary connectors 210,
310, 320 may include split-tube constructions, e.g., as female
blindmate interconnect 320, to act as flexures or may include
threads to provide a screw-on connector. Whereas the exemplary
connectors 210, 310, 320 are illustrated as having a coaxial
configuration, other connector types such as non-circular coax
(e.g. recta-coax) or multi-pin coax may be used, as well as other
connector types such as USB or hollow waveguide connections. An
advantage of the exemplary coaxial configuration of the connector
210 of FIG. 2A may be seen in terms of its voltage standing wave
ratio (VSWR), which, according to a high-frequency structure
simulator (HFSS) model, may be less than approximately 1.3:1 to 110
GHz, FIG. 2B. In addition, the connector 210 may have an insertion
loss of less than approximately 0.1 dB and a return loss of greater
than approximately 20 dB across the 1-110 GHz band for a ceramic
substrate based design, FIG. 2C. FIG. 5B schematically illustrates
how a male connector 310 can interface with a female connector 320
with the two vertically mating as shown on the right. While FIG. 5B
shows a female bullet adapter 320 mounting to a male connector
structure 310, it should be clear that connector 310 might more
readily be a transition to a surface mount structure such as that
shown in the connector 210 FIG. 5A. Alternatively, the right panel
of FIG. 5B may schematically represent a transition to a small
coaxial cable.
[0029] As a further optional configuration, the center conductor
412 may be mounted to a tilt element 430, such as flexure, spring
or gimbal, for example, to permit tilting of the center conductor
412 relative to the substrate 416 within the outer conductor 414 to
compensate for misalignment, FIG. 5C. For example, the tilt element
430, may include a gimbal 440 having opposing anchors 442 to anchor
the gimbal 440 to a metal 418 disposed within a via 419 of the
substrate 416, to provide a gimbal 440 in electrical connection
with both the center conductor 412 and metal 418. The gimbal 440
may be 50 .mu.m tall, be formed of a metal having a 10:1 aspect
ratio, and have a 20 .mu.m undercut to provide clearance to allow
the center conductor 412 to tilt. The gimbal 440, or other flexures
such as a spring, may be formed using a multilayer sequential build
technique such as disclosed in the incorporated Poly Strata art
(using sacrificial molds, planarization, and electroplating for
example). Alternatively or additionally, flexures may be provided
along the length of the center conductor 412 by modulating the
diameter of the center conductor 412 in a determined manner.
[0030] Turning to FIGS. 3A, 3B, further understanding of the
structures and methods relating to connector arrays in accordance
with the present invention may be had, in which detailed views of
the substrate 216, 316 with thru- and surface metallization are
shown. For example, FIG. 3A schematically illustrates a side
cross-sectional view of a portion of the connector array 200 of
FIG. 2A in which the substrate 216 is provided with a plurality of
center conductor vias 219 and outer conductor vias 218
therethrough, each of which may be filled with either a respective
metal plug 230, 232, e.g., copper, or surface metallization to
permit the connectors 210 to electrically communicate across the
substrate 216. The substrate 216 may comprise a 99.6% alumina
ceramic wafer. A ceramic may be used to maximize processing
temperature and also to provide a degree of thermal conductivity
between the center conductor(s) and the outer conductor or
conductors. Alternatively or additionally, the substrate 216 may
comprise shaped or patterned or photopatterned dielectrics, such as
benzocyclobutene (BCB), polyimide, Teflon.RTM. PTFE, SU-8
photoresist, parylene, or other dielectrics chosen for their
dielectric loss, dielectric constant, thermo-mechanical properties,
or ability to pattern or shape based on the requirements of the
connector 210. Moreover, independent of the material chosen, the
substrate 216 may be designed such that the connectors 210 may be
separated at singulation points 260 to provide a plurality of
discrete connectors 210 rather than an array 200.
[0031] The vias 218, 219 may conveniently have a generally
cylindrical or other suitable shape. At an upper surface 211 of the
substrate 216 generally cylindrical metal center conductors 212 may
be disposed in electrical communication with respective center
conductor metal plugs 230. Likewise, outer conductors 214 may be
disposed at the upper surface 211 of the substrate in electrical
communication with respective outer conductor metal plugs 232. The
center and outer conductors 212, 214 may have rounded tips to aid
in alignment. When formed out of plane of the substrate, such
rounding may be accomplished by chemical or electropolishing a
cylindrical form, tumbling in a abrasive powder, forming the
approximate shape in a stepped manner, or any other suitable means.
At a lower surface 217 of the substrate 216, center conductor
mounting feet 213 may be provided in electrical communication with
respective center conductor metal plugs 230, and outer conductor
mounting feet 215 may be provided in electrical connection with
outer conductor metal plugs 232 so the mounting feet 213, 215 are
in electrical communication with the center and outer conductors
212, 214, respectively. Thus parts that are symmetric or asymmetric
on either side of the substrate may formed depending on whether one
is creating a floating connector bullet, a connector end, a
connector adapter designed to go from a traditional coaxial or
micro-coaxial cable, or from a circuit board waveguide such a
co-planar waveguide or a microstrip to a connector. In addition, a
high density DC connector could be formed by only fabricating
center conductor pin 212 without the outer conductor 214, and both
RF and DC connectors may be fabricated simultaneously. It is also
possible to fabricate the center and outer conductors 212, 214
independently. An RF connector array of elements which share
(completely or partially) a common outer conductor could also be
fabricated using this approach.
[0032] The impedance through the substrate 216 may be maintained by
either increasing the outer conductor diameter or decreasing the
center conductor diameter or both. Other suitable techniques to
match impedance may be used, including those known in the art of
microwave structures. A two axis gimbal 250 can be constructed as a
flexure, similar to that described above with respect to FIG. 5C,
having two opposing anchors 252 to attach the gimbal 250 to the
substrate 216. The gimbal 250 may be 50 .mu.m tall, be formed of a
metal having a 10:1 aspect ratio, and have a 20 .mu.m undercut to
provide clearance to allow the center conductor 212 to tilt. The
flexure itself, such as gimbal 250, or the layer on which the
flexure is created may be constructed of the same or a different
metal, such as a metal chosen for its mechanical and spring like
properties. It should be noted that commercially available
connectors to 110 GHz are designed for fifty ohm impedance; the
agility of the PolyStrata process permits customization of the
impedance of connectors of the present invention.
[0033] While a gimbal or flexure can be constructed in a
multi-layer build process similar to PolyStrata to address angular
stress or misalignment, and elastic deformation can be leveraged
within the limits of the materials and designs for providing
contact force between mating components, one can also leverage
flexures and/or spring deflections both along the axis and/or
perpendicular to the axis of the coaxial connector center and/or
outer conductors to help ensure mechanical contact between
connected components over temperature cycles, mechanical shock, and
vibration. In the event that DC signals are not required over the
bandwidth of operation, one can design the connectors to provide
microwave continuity when the connector ends are in suitable
proximity by capacitive coupling or radiative coupling between
mating connector ends separated by an air-gap or dielectric layer.
For example, the region containing the mounting feet 213, 215 of
the connector 210 shown in FIG. 2A, which provides transition from
a coaxial mode to a CPW mode with the center conductor foot 213 and
ground plane (outer conductor foot 215), could be similarly
leveraged for capacitive or radiative coupling. For instance, two
of the CPW transition structures on the lower half, if aligned and
facing each other with a air or dielectric gap in between could
electrically communicate with each other in the case where center
conductor foot 213 acts as a quarter wave stub for each mating
half. An exemplary capacitively coupled connector is described in
C.M Lin & R.W. Grow, A Broad-Band Microwave Coaxial Connector
with Capacitive RF Coupling and Isolated DC Returns, IRE
Transactions on Microwave Theory and Techniques, Issue 6, Vol. 4,
454 (1958). While the reference shows capacitive coupling in the
middle of a double sided type N connector, one could divide the
picture along its left/right center, perpendicular to the coax, to
form two mating halves at the capacitive disk. It should be clear
to someone skilled in the art that many electromagnetic designs can
be realized with the ability to microstructure and batch fabricate
using a multilayer build process similar to those presented in the
approach outlined in the incorporated PolyStrata art.
[0034] In an alternative exemplary configuration, the connector
array 300 may comprise a plurality of female blindmate
interconnects 320 as shown in the side cross-sectional view of FIG.
3B. A substrate 316 may be provided with a plurality of center
conductor vias 319 and outer conductor vias 318 therethrough, each
of which may be interconnected, mated to, or filled with a
respective metal plug 330, 332, e.g., copper, or surface
metallization to permit the connectors 320 to electrically
communicate across the substrate 316. Such design properties may be
important if the connector is to be repeatedly used though a number
of pairing cycles. The substrate 316 may comprise similar materials
to the substrate 216 of FIG. 3A. The vias 318, 319 may conveniently
have a generally cylindrical shape or other suitable shape. At the
upper and lower surfaces 311, 317 of the substrate 316 generally
cylindrical female metal center conductors 312 may be disposed in
electrical communication with respective center conductor metal
plugs 330. Likewise, outer conductors 314 may be disposed in
electrical communication with respective outer conductor metal
plugs 332 at the upper and lower surfaces 311, 317. When produced
out of the plane of the substrate 316, the outer conductor 314 of
the female mating portion may be partitioned into a number of
segments to allow improved deflection while limiting deformation of
the metal itself. In addition, detents 352 may be provided on one
side of the outer conductors 314, such as an exterior surface, to
mate with detents in a part to which the connector 320 is to be
attached. The use of a smooth-walled male on one side and detent on
the other side may keep substantially all outer conductors 214
attached to the detent side. Such detents could also be used on
inner conductors 312, or even separate mechanical structures
included to help maintain alignment and/or connector retention when
mated with the corresponding connector counterpart or
counterparts.
[0035] The figures, such as FIGS. 2A, 5A, 5B, for example,
illustrate coaxial connectors 210, 310, 320 which are desirable for
the greatest bandwidth possible, for example spanning from DC to
over 200 GHz. Connector structures, such as connectors 210, 310,
however, could also provide interconnect for a hollow waveguide,
particularly at mm and sub-mm wave frequencies, and may be
circular, square, or rectangular in cross-section. In the case of
hollow waveguide, a similar structure to the waveguides could be
used, however no center conductor would need to be present. In such
cases a solid substrate is not required, as there is no need to
support the center pin. The structures could be all metallic or
comprise a surface metalized dielectric. If a substrate layer is
included, it would preferably be patterned to remove dielectric
from the hollow waveguide passage, or would include a material that
is highly transparent to microwaves, for example, made of quartz,
silica, Teflon, low-K materials.
[0036] Such connector structures, coaxial or hollow waveguide,
could be hermetic. In such cases, plugged via structures may be
used to pass an electrical signal from inside to outside a
substrate layer. In such cases, the substrate may contain a
metalized region outside the perimeter of the coax or waveguide
used to make a solder seal, although any alternative compatible
means to attach the connector structure to a hermetic housing could
be leveraged.
[0037] The connectors themselves, such as connectors 210, 310, 320,
could incorporate a selectively deposited or applied thin solder
layer at or near their mating surfaces. This would allow a modular
build of a complex system and testing of it. Once the system tests
well, a selective or non-selective application of heat would cause
the make-break interconnect to become a permanent junction
requiring yet another reflow of the solder at the mating surfaces
to remove the parts. A conductive epoxy could serve a similar
function, and for example, could be used in a partially cured
"B-stage" during assembly and test, and only reflowed to
permanently join the mating surfaces when desired. This could
improve reliability during temperature cycles, shock, and vibration
for the assembled system.
[0038] Turning now to FIGS. 6A-6D an exemplary process in
accordance with the present invention is illustrated. Beginning at
step 700, a dielectric substrate 716 may be provided having vias
718 which may be formed by laser drilling, DRIE (deep reactive ion
etching), water jet, photopatterning, or other suitable process
selected with regard to the chosen substrate material, FIG. 6A. The
vias 718 may be made of a size and periodicity to
electromagnetically contain the guided waves at the uppermost
frequency of interest and can be designed in software like HFSS.TM.
by Ansoft. Any alternative shape to the via fence approach may be
used if it suitably contains the electromagnetic wave and is able
to retain the substrate portions required. For example, a shape
like a "C" may be cut or patterned in the dielectric for the outer
conductor feedthrough, the center conductor being located on a via
inside the "C" shape and the outer conductor portions either on,
inscribing, or circumscribing the "C" shape. The vias 718 may be
surface metalized and/or solid plugged with a conductor material
702 by one or more of vapor deposition, plating, or conductive
epoxy, for example. The metal plugged or surface metalized via
substrate 716 may have multilayer photomolds applied, followed by
metal electroforming and/or planarization, step 730, FIG. 6B.
Specifically, a mold 732 may be provided on a selective surface of
the substrate 716 having passageways 734 disposed therethrough each
respectively in communication with a metalized via 718 of the
substrate 716. The passageways 734 may be cylindrical or annular in
shape, and in the latter case may communicate with two vias 718. As
part of Step 730, the passageways 734 may be plugged to provide
center pin conductors 736 and outer barrel conductors 738 disposed
in respective cylindrical and annular passageways 734. By omitting
the center conductor 736 and sizing the vias 718 to provide the
required waveguide size, a circular or rectangular waveguide
connector could also be fabricated using this approach.
[0039] Step 730 may be repeated multiple times as added layer upon
layers (per the PolyStrata or similar multilayer additive build
techniques) for increased aspect ratio, such as up to 10:1, for
example. Step 730 may also be repeated to add complexity, such as
providing detents, flares, or up or down tapering, as well as to
allow the metal conductors 736, 738 to act as flexures. Mechanical
analysis may provide a basis for selecting the base construction
material of the conductors 736, 738 from one or more of Cu, Ni,
Be:Cu, and/or NiCo, and the like, for example, based on a
deformation and/or contact force mechanical analysis. For instance,
3.times. standard hardness nickel (for example doped, alloyed, or
microstructured) may be selected for use in high aspect ratio
springs. While nickel core materials which may be used for building
these structures may exhibit loss due to lower electrical
conductivity and magnetic properties, above 10 GHz, substantially
all of the RF energy may propagate in a conformal gold, silver, or
other highly conductive surface coating. In particular, an analysis
of the skin depth requirements may allow electroless conformal
coatings of Cu/Pd/Au, Ni/Au, Ni/Ag/Au or other coatings as
typically used in the microwave connector industry to provide
low-loss coatings to 2-3 skin depths even at the low end of the
band, FIG. 4.
[0040] To achieve a smooth or rounded or radiused end surfaces for
the connectors, turning to FIG. 6C, at Step 760 the upper layer or
portion of the temporary mold 732 may be removed by etching such as
by chemical or plasma ashing to reveal part of the metal conductors
736, 738. Removal of the upper mold portion can be followed by
chemical polishing or electropolishing to round the exposed edges
of the metal conductors 736, 738 to allow easier alignment and
mating with the metal conductors 736, 738. The remaining mold
material may be removed subsequently, Step 790, FIG. 6D, and
process can be repeated to create connector or mounting structures
762 or other structures as desired on the opposing back side of the
substrate 716. If double sided processing is used, typically the
mold material will not be removed from either side of the substrate
716 until the end of the build process. However such smoothing or
rounding steps can be performed on either or both sides in the same
or similar manned as desired. Individual parts may then be
singulated using dicing or other separation techniques depending on
the dielectric substrate 716 used to provide single connectors 720.
Alternatively, 1D or 2D connector arrays can be made.
[0041] In yet a further aspect of the present invention, coaxial
right angle connectors 810 may be provided, FIGS. 7A, 7B. Such
connector structures can be used to make adapters to other
connectors, to make right angle connections, and connection to
circuit boards, coaxial cables, etc. A first, right angle connector
810 may be provided as a portion of a right angle coaxial structure
comprising a center conductor 812 and outer conductor 814 which may
be supported by a nonconducting substrate or support member 816. A
second connector 820 may comprise a center conductor 813 and outer
conductor 815 supported by a support member 817 and structured such
that the center conductor 813 and outer conductor 815 may
electrically communicate with the corresponding center conductor
812 and outer conductor 814 of the first right angle connector 810,
FIG. 7A. The center and outer conductors 812, 814, 813, 815 of the
first and second connectors 810, 820 may be joined in electrical
communication using a solder or conductive epoxy, for example, to
form a unitary connector or adapter 830. The pitch between center
and outer conductors 812, 814 of the right angle connector 810 may
differ before and after the right angle bend to facilitate the use
of the right angle connector 810 in a dilation layer. In addition,
the first and second connectors 810, 820 may be provided in a
one-dimensional or two-dimensional array which may be
interconnected to provide a one-dimensional or two-dimensional
array of conjoined connectors 830. Alternatively, the right angle
connector 810 may be mounted directly to a substrate 840, such as a
circuit board, chip or MMIC, for example, as a surface normal
interconnect to provide a ground-signal-ground or other transition
to adapt to a microstrip or coplanar waveguide on the substrate
840, FIG. 7B. Such connectors 810, 820 may also be combined with
monolithic dilations for EW, sensor, and small radar sized phased
array apertures (e.g., approximately 12'' and below).
[0042] Additional functionality may be incorporated into the
structures by incorporating active or passive electronics into the
connector structures themselves. For example, in FIG. 5A on the
backside or the front side of the substrate layer 216 one can apply
such active or passive electronics. For example if the substrate
layer 216 comprises a ceramic or silicon layer, a thin-film,
thick-film, or small surface mount resistor or resistors may be
provided on the substrate layer 216 to bridge the center and outer
conductor 212, 214, for example to create a 50-ohm termination
often desired in phased array antenna radiators. One could also
replace the substrate layer 216 with a layer containing active
devices or insert active devices into regions on the back side or
front side of the connector 210. For example if the substrate layer
216 was made of silicon, a layer of Si--Ge or other devices,
possibly including their affiliated actives, passives, their
interconnect could be incorporated. Other active devices such as
GaAs, GaN, InP, etc. could be incorporated directly or hybridly
(for example with solder or conductive epoxy) into the connector
structure or the connectors could be formed directly on their
wafers. While such active devices and their substrates at microwave
frequencies may be too thin or fragile for a make-break
interconnect on their surface alone, they may be mounted or
connected to a handle substrate to improve their mechanical
strength. One could thus provide signal detectors, bias monitors,
tuning functions such as resistance or capacitance, or other
functions directly in the connector structures. As the functions
can be built into or onto a substrate on which the connectors may
be grown, or added after they are formed, such functions can be
provided regardless of if they are added during or after the batch
manufacturing and then released and separated into individual
devices. Further forming such connectors directly on the front side
or back side of active device wafers could provide a method to
achieve a chip-scale interconnect allowing very high end microwave
circuits to be both tested and replaced in a circuit without the
need for soldering or compromising performance in using wirebonds
at mm-wave frequencies.
[0043] The substrate 216 in FIG. 5A can be the substrate on which
such connector structures are formed, or it may be part of a
non-conductive layer that is added in the multilayer build, for
example it may be formed of a photo patterned dielectric.
[0044] Lateral interconnects may be formed along the edge of a
device or circuit substrate and may or may not include a
perpendicular transition in the connector. For example, such
coaxial connectors may be placed or attached along the edge of a
microwave hybrid circuit allowing such circuits to be built as
separate modules and then interconnected to form more complex
devices and/or assemblies. The connectors may be formed or
co-fabricated as part of the microwave circuit or could be attached
in a 1D or 2D array along one or more edges. Thus a number of
microwave circuit board or circuits on ceramic or formed in
PolyStrata can be interconnected or joined in a plane. When not
formed as part of the circuit, lateral connectors may be formed
individually or as 1D arrays including stacked arrays in or on part
of a substrate in a batch manufacturing mode, where the format or
shape may be that of FIG. 7B and the batch manufacturing is similar
to that of FIG. 2A.
[0045] While the lateral interconnects may be used to allow modular
plug-n-play builds, a surface mount transitioning to surface normal
microconnector may be constructed using a different architecture.
The interconnects may use relatively high aspect ratio multilayer
metal and/or high strength heavy gold coated Ni or NiCo cores for
spring layers using plating processes that form relatively small
grains. Exemplary configurations may have an approximately 10:1
aspect ratio in triple hardness nickel springs, for instance. Such
aspect ratio may be obtained in one or multiple layers.
[0046] Using a batch manufacturing wafer or substrate scale
approach to three-dimensional manufacturing such connectors,
approximately 10,000 connectors may be made monolithically using
multilayer, double sided UV-LIGA (lithography, electroplating and
molding using ultraviolet light) on each 6'' laser drilled and
filled via ceramic substrates. This presumes the connectors will
consume approximately 1 to 1.25 mm on a side as may be the case for
a mm-wave capable miniature connector. Both split-tube and/or
pin/split-tube in tube constructions may be made for coaxial
interconnect as well as compression spring designs.
[0047] The exemplary devices and methods described may be
understood to provide a variety of benefits such as improved power
handling (e.g., exceeding the power handling of push-on floating
connectors while accounting for scaling laws), with increased power
handling provided by larger diameter structures. Additionally,
during operation and deployment connectors of the present invention
may be removed for system repair and service in the field, and
leveraging them in a system design such as a phased array may allow
module replacement and repair of the electronic system. Moreover,
whereas relatively small components, such as a conventional 1 mm
barrel may be challenging to handle without specialized tools or
fixtures, pre-alignment pins may be provided to guide parts
together allowing hand placement and/or tool (e.g., screwdriver)
leveraged removal. For example, an in-plane lateral connector may
be provided in any of the above device configurations which may be
used to snap together components including MMICs and/or modules
into higher level assemblies at the board level. Such an
interconnect can be formed with the device and/or mounted to
existing devices. In addition, a maximized and/or improved aspect
ratio as compared to related mechanical turning operations is
realized in the present invention. Still further devices and
methods of the present invention may provide increased mechanical
strength between the fused layers, and since mechanical strain may
be placed on metals, near bulk strength adhesion between said
layers may be desirable.
[0048] These and other advantages of the present invention will be
apparent to those skilled in the art from the foregoing
specification. For instance, the devices and methods of the present
invention have been exemplified as providing parts which include a
dielectric substrate which is incorporated in the final part.
Alternatively, the substrate may provide a mounting surface for the
PolyStrata build processes in which a dielectric layer(s) are
deposited in selected strata above the substrate, and the part so
formed and containing the dielectric layer(s) may be subsequently
removed from the substrate. Accordingly, it will be recognized by
those skilled in the art that changes or modifications may be made
to the above-described embodiments without departing from the broad
inventive concepts of the invention. It should therefore be
understood that this invention is not limited to the particular
embodiments described herein, but is intended to include all
changes and modifications that are within the scope and spirit of
the invention as set forth in the claims.
* * * * *