U.S. patent application number 13/558770 was filed with the patent office on 2012-11-29 for apparatus for forming a conductive transparent oxide film layer for use in a cadmium telluride based thin film photovoltaic device.
This patent application is currently assigned to PRIMESTAR SOLAR, INC.. Invention is credited to Russell Weldon Black, Scott Daniel Feldman-Peabody.
Application Number | 20120298651 13/558770 |
Document ID | / |
Family ID | 44674937 |
Filed Date | 2012-11-29 |
United States Patent
Application |
20120298651 |
Kind Code |
A1 |
Feldman-Peabody; Scott Daniel ;
et al. |
November 29, 2012 |
Apparatus for Forming a Conductive Transparent Oxide Film Layer for
Use in a Cadmium Telluride Based Thin Film Photovoltaic Device
Abstract
Methods for forming a TCO layer on a substrate are generally
provided and include sputtering a TCO layer on a substrate from a
target including cadmium stannate. A cap material (e.g., including
cadmium) is deposited onto an outer surface of an indirect anneal
system, and the TCO layer can be annealed at an anneal temperature
while in contact with or within about 10 cm of the cap material. An
anneal oven is also generally provided and includes an indirect
anneal system defining a deposition surface and an anneal surface
such that a cap material deposited on the anneal surface of the
indirect anneal system is positioned to be in contact with or
within about 10 cm of a thin film on the substrate. A cap material
source can be positioned to deposit the cap material onto the
deposition surface such that the anneal surface comprises the cap
material.
Inventors: |
Feldman-Peabody; Scott Daniel;
(Golden, CO) ; Black; Russell Weldon; (Longmont,
CO) |
Assignee: |
PRIMESTAR SOLAR, INC.
Arvada
CO
|
Family ID: |
44674937 |
Appl. No.: |
13/558770 |
Filed: |
July 26, 2012 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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12829544 |
Jul 2, 2010 |
8236601 |
|
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13558770 |
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Current U.S.
Class: |
219/388 |
Current CPC
Class: |
Y02E 10/50 20130101;
C23C 14/086 20130101; C23C 14/5806 20130101; H01L 31/1884 20130101;
C23C 14/56 20130101; C23C 14/5846 20130101 |
Class at
Publication: |
219/388 |
International
Class: |
F27D 11/02 20060101
F27D011/02 |
Claims
1. An anneal oven for annealing a thin film layer on a substrate,
the anneal oven comprising: a transport system configured to carry
a substrate through the anneal oven; a heating element configured
to heat the annealing oven to the annealing temperature; an
indirect anneal system defining a deposition surface and an anneal
surface, wherein a cap material deposited on the anneal surface of
the indirect anneal system is positioned to be in contact with or
within about 10 cm of a thin film on the substrate; and, a cap
material source positioned to deposit the cap material onto the
deposition surface such that the anneal surface comprises the cap
material, wherein the cap material source comprises cadmium.
2. The anneal oven as in claim 1, wherein the indirect anneal
system comprises a continuous belt about at least two rollers,
wherein the continuous belt defines the deposition surface and the
anneal surface.
3. The anneal oven as in claim 2, wherein the conveyor belt has a
tension control system configured to adjust the tension in the
continuous belt.
4. The anneal oven as in claim 3, wherein the tension control
system comprises a plurality of rollers, wherein at least one
roller is moveable to adjust the tension in the conveyor belt.
5. The anneal oven as in claim 3, wherein the tension control
system comprises a tension roll positioned between a pair of
directional rollers, wherein the tension roll is moveable to adjust
the tension of the continuous belt.
6. The anneal oven as in claim 1, wherein the indirect anneal
system comprises a plurality of slats forming a continuous loop
such that the plurality of slats forms a deposition surface and an
anneal surface.
7. The anneal oven as in claim 6, wherein the continuous loop of
the plurality of slats travels about at least two sprockets,
wherein at least one of the sprockets is moveable to adjust the
tension of the continuous loop of the plurality of slats.
Description
PRIORITY INFORMATION
[0001] The present application is a continuation of and claims
priority to U.S. patent application Ser. No. 12/829,544 titled
"Apparatus and Methods of Forming a Conductive Transparent Oxide
Film Layer for Use in a Cadmium Telluride Based Thin Film
Photovoltaic Device" of Feldman-Peabody, et al. filed on Jul. 2,
2010, which is incorporated by reference herein.
FIELD OF THE INVENTION
[0002] The subject matter disclosed herein relates generally to
forming a conductive transparent oxide film layer. More
particularly, the subject matter disclosed herein relates to
apparatus and methods of forming a conductive transparent oxide
film layer for use in cadmium telluride thin film photovoltaic
devices.
BACKGROUND OF THE INVENTION
[0003] Thin film photovoltaic (PV) modules (also referred to as
"solar panels") based on cadmium telluride (CdTe) paired with
cadmium sulfide (CdS) as the photo-reactive components are gaining
wide acceptance and interest in the industry. CdTe is a
semiconductor material having characteristics particularly suited
for conversion of solar energy to electricity. For example, CdTe
has an energy bandgap of about 1.45 eV, which enables it to convert
more energy from the solar spectrum as compared to lower bandgap
semiconductor materials historically used in solar cell
applications (e.g., about 1.1 eV for silicon). Also, CdTe converts
radiation energy in lower or diffuse light conditions as compared
to the lower bandgap materials and, thus, has a longer effective
conversion time over the course of a day or in cloudy conditions as
compared to other conventional materials. The junction of the
n-type layer and the p-type layer is generally responsible for the
generation of electric potential and electric current when the CdTe
PV module is exposed to light energy, such as sunlight.
Specifically, the cadmium telluride (CdTe) layer and the cadmium
sulfide (CdS) form a p-n heterojunction, where the CdTe layer acts
as a p-type layer (i.e., a positive, electron accepting layer) and
the CdS layer acts as a n-type layer (i.e., a negative, electron
donating layer).
[0004] A transparent conductive oxide ("TCO") layer is commonly
used between the window glass and the junction forming layers. For
example, the TCO layer may be sputtered from a cadmium stannate
(i.e., Cd.sub.2SnO.sub.4) target by either of two processes: hot
sputtering or cold sputtering. When hot sputtered, the TCO layer is
typically deposited at sputtering temperatures above about
250.degree. C. in a one step sputtering process. When cold
sputtered (e.g., at about room temperature), the TCO layer must be
annealed following sputtering of the layer in a second step to
convert the layer from an amorphous layer to a crystalline
layer.
[0005] Though the hot sputtering process is more streamlined (i.e.,
only requiring a single step), the hot sputtered TCO layers can
have a much higher resistivity than the cold sputtered TCO
layers--even when sputtered from the same material (e.g., cadmium
stannate)--making the hot sputtered TCO layer less attractive for
the end use. Although not wishing to be bound by any particular
theory, it is believed that this difference in resistivities
between the hot sputtered layer and the cold sputtered layer likely
stems from a difference in the as-deposited stoichiometry. For
example, when sputtering from a cadmium stannate target, it is
presently believed that cold sputtering produces a layer having the
stoichiometry Cd.sub.2SnO.sub.4, which is the desired stoichiometry
for cadmium stannate. However, other processing issues exist that
hinders the viability of cold sputtering to form the TCO layer,
especially from a cadmium stannate target. For example, the
annealing process can sublimate cadmium atoms off of the TCO layer,
altering the stoichiometry of the TCO layer, especially along its
outer surface.
[0006] To counteract this loss of cadmium atoms from the surface of
the TCO layer, the TCO layer is typically annealed in contact with
an anneal plate containing cadmium. For instance, an anneal plate
having cadmium sulfide on its surface contacting the TCO layer can
be used to provide additional cadmium to the TCO layer during
annealing to inhibit the loss of cadmium from the TCO layer.
[0007] However, contact plate is awkward for manufacturing use in a
large commercial-scale manufacturing setting, and becomes depleted
of cadmium during repeated use, requiring plate change. As such,
the use of such anneal plates adds manufacturing processes and
materials, effectively increasing the manufacturing cost and
complexity for formation of the PV modules. Thus, a need exists for
methods of forming a TCO layer having the conductivity of cold
sputtered layers with the processing ease found in those hot
sputtered layers.
BRIEF DESCRIPTION OF THE INVENTION
[0008] Aspects and advantages of the invention will be set forth in
part in the following description, or may be obvious from the
description, or may be learned through practice of the
invention.
[0009] Methods are generally provided for forming a conductive
oxide layer on a substrate. In one particular embodiment, the
method can include sputtering a transparent conductive oxide layer
on a substrate from a target including cadmium stannate at a
sputtering temperature of about 10.degree. C. to about 100.degree.
C. A cap material (e.g., including cadmium) can be deposited onto
an outer surface of an indirect anneal system, and the transparent
conductive oxide layer can be annealed at an anneal temperature of
about 500.degree. C. to about 700.degree. C. while in contact with
or within about 10 cm of the cap material deposited on the outer
surface of the indirect anneal system.
[0010] An anneal oven for annealing a thin film layer on a
substrate is also generally provided. The anneal oven can include a
transport system configured to carry a substrate through the anneal
oven and a heating element configured to heat the annealing oven to
the annealing temperature. An indirect anneal system defining a
deposition surface and an anneal surface can also be included
within the anneal oven such that a cap material deposited on the
anneal surface of the indirect anneal system is positioned to be in
contact with or within about 10 cm of a thin film on the substrate.
A cap material source can be positioned to deposit the cap material
onto the deposition surface such that the anneal surface comprises
the cap material.
[0011] These and other features, aspects and advantages of the
present invention will become better understood with reference to
the following description and appended claims. The accompanying
drawings, which are incorporated in and constitute a part of this
specification, illustrate embodiments of the invention and,
together with the description, serve to explain the principles of
the invention.
BRIEF DESCRIPTION OF THE DRAWING
[0012] A full and enabling disclosure of the present invention,
including the best mode thereof, directed to one of ordinary skill
in the art, is set forth in the specification, which makes
reference to the appended figures, in which:
[0013] FIG. 1 shows a general schematic of a cross-sectional view
of an exemplary cadmium telluride thin film photovoltaic device
according to one embodiment of the present invention;
[0014] FIG. 2 shows a flow diagram of an exemplary method of
manufacturing a photovoltaic module including a cadmium telluride
thin film photovoltaic device;
[0015] FIG. 3 shows a general schematic of a cross-sectional view
of an exemplary sputtering chamber according to one embodiment of
the present invention; and,
[0016] FIG. 4 shows a general schematic of an exemplary anneal oven
with a cap material defining a surface of a conveyor; and,
[0017] FIG. 5 shows a general schematic of another exemplary anneal
oven with a cap material defining a surface of a conveyor belt.
[0018] Repeat use of reference characters in the present
specification and drawings is intended to represent the same or
analogous features or elements.
DETAILED DESCRIPTION OF THE INVENTION
[0019] Reference now will be made in detail to embodiments of the
invention, one or more examples of which are illustrated in the
drawings. Each example is provided by way of explanation of the
invention, not limitation of the invention. In fact, it will be
apparent to those skilled in the art that various modifications and
variations can be made in the present invention without departing
from the scope or spirit of the invention. For instance, features
illustrated or described as part of one embodiment can be used with
another embodiment to yield a still further embodiment. Thus, it is
intended that the present invention covers such modifications and
variations as come within the scope of the appended claims and
their equivalents.
[0020] In the present disclosure, when a layer is being described
as "on" or "over" another layer or substrate, it is to be
understood that the layers can either be directly contacting each
other or have another layer or feature between the layers. Thus,
these terms are simply describing the relative position of the
layers to each other and do not necessarily mean "on top of" since
the relative position above or below depends upon the orientation
of the device to the viewer. Additionally, although the invention
is not limited to any particular film thickness, the term "thin"
describing any film layers of the photovoltaic device generally
refers to the film layer having a thickness less than about 10
micrometers ("microns" or ".mu.m").
[0021] It is to be understood that the ranges and limits mentioned
herein include all ranges located within the prescribed limits
(i.e., subranges). For instance, a range from about 100 to about
200 also includes ranges from 110 to 150, 170 to 190, 153 to 162,
and 145.3 to 149.6. Further, a limit of up to about 7 also includes
a limit of up to about 5, up to 3, and up to about 4.5, as well as
ranges within the limit, such as from about 1 to about 5, and from
about 3.2 to about 6.5.
[0022] Methods are generally disclosed for cold sputtering a
transparent conductive oxide layer ("TCO layer") on a substrate
followed by annealing the TCO layer in contact with or in close
proximity to a cadmium containing cap material of a conveyor belt
or roll. The cold sputtered TCO layer can include cadmium, such as
a TCO layer including cadmium stannate (i.e., Cd.sub.2SnO.sub.4) or
stoichiometric variation of cadmium, tin, and oxygen. Other
materials may also be present in the TCO layer, including other
oxides (e.g., tin oxide, zinc oxide, or indium tin oxide, or
mixtures thereof). Additionally, the TCO layer can include other
conductive, transparent materials.
[0023] In one particular embodiment, the TCO layer can be formed by
sputtering (e.g., DC sputtering or RF sputtering) on the substrate
from a target (e.g., a target including cadmium stannate or a
target including an alloy of cadmium and tin). For example, a
cadmium stannate layer can be formed by sputtering a hot-pressed
target containing cadmium stannate (Cd.sub.2SnO.sub.4) and/or
stoichiometric amounts of SnO.sub.2 and CdO onto the substrate in a
ratio of about 1 to about 2. Alternatively, a cadmium stannate
layer can be formed by sputtering a metal target of cadmium and tin
in an oxidizing atmosphere (e.g., a sputtering atmosphere
comprising oxygen at about 100% by volume).
[0024] The sputtering temperature for forming the TCO layer
containing cadmium stannate is relatively low, so that the
sputtering method can be referred to as "cold sputtering." For
example, the sputtering temperature can be about 10.degree. C. to
about 100.degree. C., such as about 20.degree. C. to about
50.degree. C. In one particular embodiment, the sputtering
temperature can be room temperature (e.g., about 20.degree. C. to
about 25.degree. C.).
[0025] After cold sputtering of the TCO layer onto the substrate,
the TCO layer is annealed to re-crystallize the TCO layer into a
more uniform thin film layer on the substrate in contact with or in
close proximity to a cadmium containing cap material of a conveyor
belt or roll. Without wishing to be bound by any particular theory,
it is believed that the cadmium containing cap material on a
conveyor belt or roll can provide cadmium atoms to the annealing
atmosphere and/or to the surface of the TCO layer via sublimation
from the cadmium containing cap material and can inhibit
sublimation of cadmium atoms from the surface of the TCO layer
during the annealing process. For instance, the cadmium containing
cap material may form an equilibrium-type relationship with the
surface of the substrate (i.e., the TCO layer) forcing more cadmium
atoms to remain in the TCO layer during the annealing process.
Additionally, the cadmium containing cap material can provide an
increased stoichiometric amount of cadmium to the surface of the
TCO layer, helping to maintain or even increase the cadmium content
of the cold sputtered TCO layer.
[0026] Cadmium can constitute any portion of the total annealing
pressure suitable to inhibit cadmium from sublimating off of the
surface of the substrate during annealing of the TCO layer. For
example, cadmium can constitute about 1% to about 50% by volume of
the annealing atmosphere, such as about 5% to about 25% by
volume.
[0027] The annealing atmosphere can include inert gases (e.g.,
argon, etc.); however, other gases may be present. In one
particular embodiment, a reducing gas may be included in the
annealing atmosphere. A reducing gas may help improve conductivity
of the TCO layer by increasing the oxygen vacancies in a TCO layer
of cadmium stannate. On particularly suitable reducing gas is
hydrogen sulfide (H.sub.2S), although any reducing gas may be used
such as hydrogen gas (H.sub.2), etc. For example, a reducing gas
may constitute about 1% to about 25% by volume of the annealing
atmosphere, such as about 5% to about 15% by volume.
[0028] In one embodiment, the annealing atmosphere may be
substantially free from other reactive gasses, such as oxygen,
nitrogen, and/or halogen-containing gasses. As used herein, the
term "substantially free" means no more than an insignificant trace
amount present and encompasses completely free (e.g., 0% up to
about 0.0001% by volume of the annealing atmosphere).
[0029] The overall pressure of the annealing atmosphere during
annealing can be from about 50 mTorr to about 1000 Torr (e.g., from
about 1 Torr to about 850 Torr, such as from about 10 Torr to about
800 Torr). In one particular embodiment, the overall pressure of
the annealing atmosphere can be about room pressure (e.g., about
760 Torr).
[0030] After annealing in the presence of cadmium, any excess
cadmium deposited onto the substrate during annealing can be
subsequently etched from the TCO layer. For example, a chemical
etch can be used to remove excess cadmium deposited during
annealing from the surface of the TCO layer. In one particular
embodiment, the TCO layer can be cooled after annealing and then
chemically etched to remove any excess deposited cadmium from its
surface. The etchant can be chosen to provide selective removal of
cadmium without substantially affecting the TCO layer. Suitable
selective etchants are those that can remove cadmium without
substantially removing or otherwise affecting the underlying TCO
layer (e.g., cadmium stannate). Particular selective etchants can
include, but are not limited to, hydrochloric acid, nitric acid, or
mixtures thereof.
[0031] As stated the TCO layer can be formed via sputtering.
Sputtering deposition generally involves ejecting material from a
target, which is the material source, and depositing the ejected
material onto the substrate to form the film. DC sputtering
generally involves applying a direct current to a metal target
(i.e., the cathode) positioned near the substrate (i.e., the anode)
within a sputtering chamber to form a direct-current discharge. The
sputtering chamber can have a reactive atmosphere (e.g., an oxygen
atmosphere, nitrogen atmosphere, fluorine atmosphere) that forms a
plasma field between the metal target and the substrate. Other
inert gases (e.g., argon, etc.) may also be present. The pressure
of the reactive atmosphere can be between about 1 mTorr and about
20 mTorr for magnetron sputtering. The pressure can be even higher
for diode sputtering (e.g., from about 25 mTorr to about 100
mTorr). When metal atoms are released from the target upon
application of the voltage, the metal atoms deposit onto the
surface of the substrate. For example, when the atmosphere contains
oxygen, the metal atoms released from the metal target can form a
metallic oxide layer on the substrate. The current applied to the
source material can vary depending on the size of the source
material, size of the sputtering chamber, amount of surface area of
substrate, and other variables. In some embodiments, the current
applied can be from about 2 amps to about 20 amps.
[0032] Conversely, RF sputtering involves exciting a capacitive
discharge by applying an alternating-current (AC) or
radio-frequency (RF) signal between the target (e.g., a ceramic
source material) and the substrate. The sputtering chamber can have
an inert atmosphere (e.g., an argon atmosphere) which may or may
not contain reactive species (e.g., oxygen, nitrogen, etc.) having
a pressure between about 1 mTorr and about 20 mTorr for magnetron
sputtering. Again, the pressure can be even higher for diode
sputtering (e.g., from about 25 mTorr to about 100 mTorr).
[0033] FIG. 3 shows a general schematic as a cross-sectional view
of an exemplary DC sputtering chamber 60 according to one
embodiment of the present invention. A DC power source 62 is
configured to control and supply DC power to the chamber 60. As
shown, the DC power source applies a voltage to the cathode 64 to
create a voltage potential between the cathode 64 and an anode
formed by the chamber wall, such that the substrate is in between
the cathode and anode. The glass substrate 12 is held between top
support 66 and bottom support 67 via wires 68 and 69, respectively.
Generally, the glass substrate is positioned within the sputtering
chamber 60 such that the TCO layer 14 is formed on the surface
facing the cathode 64.
[0034] A plasma field 70 is created once the sputtering atmosphere
is ignited, and is sustained in response to the voltage potential
between the cathode 64 and the chamber wall acting as an anode. The
voltage potential causes the plasma ions within the plasma field 70
to accelerate toward the cathode 64, causing atoms from the cathode
64 to be ejected toward the surface on the glass substrate 12. As
such, the cathode 64 can be referred to as a "target" and acts as
the source material for the formation of the TCO layer 14 on the
surface facing the cathode 64. The cathode 64 can be a metal alloy
target, such as elemental tin, elemental zinc, or mixtures thereof.
Additionally, in some embodiments, a plurality of cathodes 64 can
be utilized. A plurality of cathodes 64 can be particularly useful
to form a layer including several types of materials (e.g.,
co-sputtering). Since the sputtering atmosphere contains oxygen
gas, oxygen particles of the plasma field 70 can react with the
ejected target atoms to form an oxide layer on the TCO layer 14 on
the glass substrate 12.
[0035] Although only a single DC power source 62 is shown, the
voltage potential can be realized through the use of multiple power
sources coupled together. Additionally, the exemplary sputtering
chamber 60 is shown having a vertical orientation, although any
other configuration can be utilized.
[0036] For example, the TCO layer can be formed via sputtering at
the specified sputtering temperature (i.e., cold sputtering) from a
cadmium stannate target to form a cadmium stannate TCO layer on the
substrate. After sputtering the TCO layer, the substrate with the
TCO layer can then be transferred into an anneal oven.
[0037] Each of FIGS. 4 and 5 shows a side-view diagram of an
exemplary annealing oven 100. A substrate 12 can pass from the
sputtering chamber and into the anneal chamber 100 though the slit
101, past the indirect anneal system 124, and out of the anneal
chamber 100 through the slit 103. The substrate 12 is shown
traveling along rollers 105 through the anneal oven 100, although
any carrier system can be utilized to transport the substrate 12
though the anneal oven 100 (e.g., a conveyor system, etc.). The
sputtering chamber can be adjacent to the anneal chamber 100 or may
be separated from the anneal chamber 100, as long as the sputtering
atmosphere in the sputtering chamber is separated from the
annealing atmosphere in the anneal chamber 100.
[0038] The anneal oven 100 can be connected to a vacuum pump 102 to
control the annealing pressure of the annealing atmosphere within
the anneal oven 100. Heating elements 104 are configured to heat
the annealing atmosphere within the anneal oven 100 to the desired
annealing temperature (e.g., about 500.degree. C. to about
700.degree. C.), which can in-turn heat the substrate 12 and the
TCO layer 14 to the anneal temperature. Although shown inside the
anneal oven 100, any heating element 104, positioned inside or
outside of the anneal oven can be used to provide heat to the
anneal oven 100. In one particular embodiment, the inner walls 106
of the anneal oven 100 can be hot oven walls (i.e., heated to about
the annealing temperature) to provide heat to the annealing
atmosphere inside the anneal oven 100. Additionally, any number of
heating elements 104 can be utilized in conjunction with the anneal
oven 100.
[0039] Source gas lines 107, 108 can supply various gases to the
anneal oven 100, while valves 110, 111 can control the gas flow
rate of a particular gas through the source gas lines 107, 108 from
a gas source 113, 114, respectively, into the anneal oven 100. For
example, a first source gas line 107 controlled by valve 110 can
regulate the amount of inert gas in annealing atmosphere of the
anneal oven 100 supplied from the cadmium source tank 113, while a
second source gas line 108 controlled by valve 111 can regulate the
amount of optional gas (e.g., a reducing gas, an oxidizing gas,
etc.) in the annealing atmosphere of the anneal oven 100 supplied
from the inert gas source tank 114. Of course, any suitable design
of an anneal oven can be utilized in accordance with the present
disclosure, including any number of suitable source gas lines and
gas sources.
[0040] FIG. 4 shows a indirect anneal system 124 driven in an
endless loop within the anneal oven 100 around sprockets 126, with
the endless loop having a bottom leg that moves in a conveyance
direction of the substrates 12 through the anneal oven 100, and an
upper leg that moves in an opposite return direction past a cadmium
deposition head. The indirect anneal system 124 includes a
plurality of interconnected slats 128, each defining flat outer
surface. Thus, the interconnected slats 128 form a planar
deposition surface 129 defined by adjacent slats 128 along the
upper leg of the indirect anneal system 124 such that the outer
surfaces of the slats 128 lie in a common horizontal plane and
define an uninterrupted deposition surface for the deposition of
the cap material including cadmium. A cap material is shown in FIG.
4 being deposited via sputtering onto the planar deposition surface
129 defined by adjacent slats 128 along the upper leg of the
indirect anneal system 124 from a target 120 and the plasma
122.
[0041] The interconnected slats 128 also form a planar anneal
surface 130 defined by adjacent slats 128 along the bottom leg of
the indirect anneal system 124 such that the outer surfaces of the
slats 128 lie in a common horizontal plane and define an
uninterrupted annealing surface. As the substrates 12 pass into the
anneal oven 100, the TCO layer 14 on the substrate 12 can be
annealed within close proximity to or in contact with a cap
material including cadmium on the planar anneal surface 130.
[0042] A tension control 127 can move one or both of the sprockets
126 horizontally to adjust the tension in the indirect anneal
system 124 (i.e., out to increase tension or in to decrease
tension), in turn controlling the distance that the anneal surface
130 is from the outer surface of the TCO layer 14 on the substrate
12. For instance, in one embodiment, the planar anneal surface 130
can contact the TCO layer 14 during annealing or can be in close
proximity to the TCO layer 14 during annealing, such as about 10
centimeters (cm) or closer. For example, the planar anneal surface
130 can be about 1 millimeter (mm) to about 5 cm from the surface
of the TCO layer, such as about 5 mm to about 2.5 cm. In one
particular embodiment, the planar anneal surface 130 can rest on
top of the TCO layer 14 and move in unison with the substrate 12 as
it travels along rollers 105 through the anneal oven 100.
[0043] The slats 128 can be configured to withstand the anneal
temperatures and the deposition of the cap material. For example,
the slats 128 can be constructed from graphite, a ceramic (e.g.,
alumina, etc.), quartz, high temperature metallic materials (e.g.,
molybdenum, titanium, or alloys thereof), and the like.
[0044] FIG. 5 shows another exemplary embodiment of an annealing
oven 100 that is similar to that shown in FIG. 4, except for the
indirect anneal system 124. As shown in FIG. 5, the indirect anneal
system 124 includes a continuous belt 132 around rollers 136. The
continuous belt 132 defines a deposition surface 133 on an upper
leg of the indirect anneal system 124 configured to receive the cap
layer deposited via sputtering from the target 120 and plasma 122.
The continuous belt 132 also defines an anneal surface 134 on the
bottom leg of the indirect anneal system 124. As the substrates 12
pass into the anneal oven 100, the TCO layer 14 on the substrate 12
can be annealed within close proximity to or in contact with the
cap material on the surface of the continuous belt 132 including
cadmium on the anneal surface 134.
[0045] A tension control system 138 can adjust the tension in the
indirect anneal system 124, in turn controlling the distance that
the anneal surface 134 is from the outer surface of the TCO layer
14 on the substrate 12. As shown, a tension roll 140 can move
vertically between two directional rollers 139. As the tension roll
140 moves, the tension of the continuous belt 132 can be adjusted
(i.e., up to decrease tension and down to increase tension). In one
embodiment, the anneal surface 134 can contact the TCO layer 14
during annealing or can be in close proximity to the TCO layer 14
during annealing, such as about 10 cm or closer. For example, the
anneal surface 134 can be about 1 mm to about 5 cm from the surface
of the TCO layer, such as about 5 mm to about 2.5 cm. In one
particular embodiment, the anneal surface 134 can rest on top of
the TCO layer 14 and move in unison with the substrate 12 as it
travels along rollers 105 through the anneal oven 100.
[0046] The continuous belt 132 can be configured to withstand the
anneal temperatures and the deposition of the cap material. For
example, the continuous belt 132 can be constructed from a
high-temperature, non-reactive, flexible material, including but
not limited to, austenitic nickel-chromium-based superalloys (e.g.,
materials available under the trade name Inconel.RTM. from Special
Metals Corporation, Huntington, W. Va.).
[0047] Although shown utilizing sputtering deposition in each of
FIGS. 4 and 5, other deposition methods of depositing a cap
material onto the deposition surface can be utilized. For example,
the cap material can be deposited via close-space sublimation onto
the deposition surface, via spray pyrolysis, chemical vapor
deposition, thermal evaporation, etc.
[0048] The presently provided methods of sputtering and annealing a
TCO layer can be utilized in the formation of any film stack that
utilizes a TCO layer, particularly those including a cadmium
stannate TCO layer. For example, the TCO layer can be used during
the formation of any cadmium telluride device that utilizes a
cadmium telluride layer, such as in the cadmium telluride thin film
photovoltaic device disclosed in U.S. Publication No. 2009/0194165
of Murphy, et al. titled "Ultra-high Current Density Cadmium
Telluride Photovoltaic Modules."
[0049] FIG. 1 represents an exemplary cadmium telluride thin film
photovoltaic device 10 that can be formed according to methods
described herein. The exemplary device 10 of FIG. 1 includes a top
sheet of glass 12 employed as the substrate. In this embodiment,
the glass 12 can be referred to as a "superstrate," as it is the
substrate on which the subsequent layers are formed even though it
faces upward to the radiation source (e.g., the sun) when the
cadmium telluride thin film photovoltaic device 10 is in use. The
top sheet of glass 12 can be a high-transmission glass (e.g., high
transmission borosilicate glass), low-iron float glass, or other
highly transparent glass material. The glass is generally thick
enough to provide support for the subsequent film layers (e.g.,
from about 0.5 mm to about 10 mm thick), and is substantially flat
to provide a good surface for forming the subsequent film layers.
In one embodiment, the glass 12 can be a low iron float glass
containing less than about 0.015% by weight iron (Fe), and may have
a transmissiveness of about 0.9 or greater in the spectrum of
interest (e.g., wavelengths from about 300 nm to about 900 nm). In
another embodiment, borosilicate glass may be utilized so as to
better withstand high temperature processing.
[0050] The transparent conductive oxide (TCO) layer 14 is shown on
the glass 12 of the exemplary device 10 of FIG. 1. The TCO layer 14
allows light to pass through with minimal absorption while also
allowing electric current produced by the device 10 to travel
sideways to opaque metal conductors (not shown). For instance, the
TCO layer 14 can have a sheet resistance less than about 30 ohm per
square, such as from about 4 ohm per square to about 20 ohm per
square (e.g., from about 8 ohm per square to about 15 ohm per
square). In certain embodiments, the TCO layer 14 can have a
thickness between about 0.1 .mu.m and about 1 .mu.m, for example
from about 0.1 .mu.m to about 0.5 .mu.m, such as from about 0.25
.mu.m to about 0.35 .mu.m.
[0051] A resistive transparent buffer layer 16 (RTB layer) is shown
on the TCO layer 14 on the exemplary cadmium telluride thin film
photovoltaic device 10. The RTB layer 16 is generally more
resistive than the TCO layer 14 and can help protect the device 10
from chemical interactions between the TCO layer 14 and the
subsequent layers during processing of the device 10. For example,
in certain embodiments, the RTB layer 16 can have a sheet
resistance that is greater than about 1000 ohms per square, such as
from about 10 kOhms per square to about 1000 MOhms per square. The
RTB layer 16 can also have a wide optical bandgap (e.g., greater
than about 2.5 eV, such as from about 2.7 eV to about 3.0 eV).
[0052] Without wishing to be bound by a particular theory, it is
believed that the presence of the RTB layer 16 between the TCO
layer 14 and the cadmium sulfide layer 18 can allow for a
relatively thin cadmium sulfide layer 18 to be included in the
device 10 by reducing the possibility of interface defects (i.e.,
"pinholes" in the cadmium sulfide layer 18) creating shunts between
the TCO layer 14 and the cadmium telluride layer 22. Thus, it is
believed that the RTB layer 16 allows for improved adhesion and/or
interaction between the TCO layer 14 and the cadmium telluride
layer 22, thereby allowing a relatively thin cadmium sulfide layer
18 to be formed thereon without significant adverse effects that
would otherwise result from such a relatively thin cadmium sulfide
layer 18 formed directly on the TCO layer 14.
[0053] The RTB layer 16 can include, for instance, a combination of
zinc oxide (ZnO) and tin oxide (SnO.sub.2), which can be referred
to as a zinc tin oxide layer ("ZTO"). In one particular embodiment,
the RTB layer 16 can include more tin oxide than zinc oxide. For
example, the RTB layer 16 can have a composition with a
stoichiometric ratio of ZnO/SnO.sub.2 between about 0.25 and about
3, such as in about an one to two (1:2) stoichiometric ratio of tin
oxide to zinc oxide. The RTB layer 16 can be formed by sputtering,
chemical vapor deposition, spraying pryolysis, or any other
suitable deposition method. In one particular embodiment, the RTB
layer 16 can be formed by sputtering (e.g. DC sputtering or RF
sputtering) on the TCO layer 14 (as discussed below in greater
detail with respect to the deposition of the cadmium sulfide layer
18). For example, the RTB layer 16 can be deposited using a DC
sputtering method by applying a DC current to a metallic source
material (e.g., elemental zinc, elemental tin, or a mixture
thereof) and sputtering the metallic source material onto the TCO
layer 14 in the presence of an oxidizing atmosphere (e.g., O.sub.2
gas). When the oxidizing atmosphere includes oxygen gas (i.e.,
O.sub.2), the atmosphere can be greater than about 95% pure oxygen,
such as greater than about 99%.
[0054] In certain embodiments, the RTB layer 16 can have a
thickness between about 0.075 .mu.m and about 1 .mu.m, for example
from about 0.1 .mu.m to about 0.5 .mu.m. In particular embodiments,
the RTB layer 16 can have a thickness between about 0.08 .mu.m and
about 0.2 .mu.m, for example from about 0.1 .mu.m to about 0.15
.mu.m.
[0055] A cadmium sulfide layer 18 is shown on RTB layer 16 of the
exemplary device 10 of FIG. 1. The cadmium sulfide layer 18 is a
n-type layer that generally includes cadmium sulfide (CdS) but may
also include other materials, such as zinc sulfide, cadmium zinc
sulfide, etc., and mixtures thereof as well as dopants and other
impurities. In one particular embodiment, the cadmium sulfide layer
may include oxygen up to about 25% by atomic percentage, for
example from about 5% to about 20% by atomic percentage. The
cadmium sulfide layer 18 can have a wide band gap (e.g., from about
2.25 eV to about 2.5 eV, such as about 2.4 eV) in order to allow
most radiation energy (e.g., solar radiation) to pass. As such, the
cadmium sulfide layer 18 is considered a transparent layer on the
device 10.
[0056] The cadmium sulfide layer 18 can be formed by sputtering,
chemical vapor deposition, chemical bath deposition, and other
suitable deposition methods. In one particular embodiment, the
cadmium sulfide layer 18 can be formed by sputtering (e.g., direct
current (DC) sputtering or radio frequency (RF) sputtering) on the
resistive transparent layer 16. Sputtering deposition generally
involves ejecting material from a target, which is the material
source, and depositing the ejected material onto the substrate to
form the film. DC sputtering generally involves applying a voltage
to a metal target (i.e., the cathode) positioned near the substrate
(i.e., the anode) within a sputtering chamber to form a
direct-current discharge. The sputtering chamber can have a
reactive atmosphere (e.g., an oxygen atmosphere, nitrogen
atmosphere, fluorine atmosphere) that forms a plasma field between
the metal target and the substrate. The pressure of the reactive
atmosphere can be between about 1 mTorr and about 20 mTorr for
magnetron sputtering. When metal atoms are released from the target
upon application of the voltage, the metal atoms can react with the
plasma and deposit onto the surface of the substrate. For example,
when the atmosphere contains oxygen, the metal atoms released from
the metal target can form a metallic oxide layer on the substrate.
Conversely, RF sputtering generally involves exciting a capacitive
discharge by applying an alternating-current (AC) or
radio-frequency (RF) signal between the target (e.g., a ceramic
source material) and the substrate. The sputtering chamber can have
an inert atmosphere (e.g., an argon atmosphere) having a pressure
between about 1 mTorr and about 20 mTorr.
[0057] Due to the presence of the resistive transparent layer 16,
the cadmium sulfide layer 18 can have a thickness that is less than
about 0.1 .mu.m, such as between about 10 nm and about 100 nm, such
as from about 50 nm to about 80 nm, with a minimal presence of
pinholes between the resistive transparent layer 16 and the cadmium
sulfide layer 18. Additionally, a cadmium sulfide layer 18 having a
thickness less than about 0.1 .mu.m reduces any absorption of
radiation energy by the cadmium sulfide layer 18, effectively
increasing the amount of radiation energy reaching the underlying
cadmium telluride layer 22.
[0058] A cadmium telluride layer 20 is shown on the cadmium sulfide
layer 18 in the exemplary cadmium telluride thin film photovoltaic
device 10 of FIG. 1. The cadmium telluride layer 20 is a p-type
layer that generally includes cadmium telluride (CdTe) but may also
include other materials. As the p-type layer of device 10, the
cadmium telluride layer 20 is the photovoltaic layer that interacts
with the cadmium sulfide layer 18 (i.e., the n-type layer) to
produce current from the absorption of radiation energy by
absorbing the majority of the radiation energy passing into the
device 10 due to its high absorption coefficient and creating
electron-hole pairs. For example, the cadmium telluride layer 20
can generally be formed from cadmium telluride and can have a
bandgap tailored to absorb radiation energy (e.g., from about 1.4
eV to about 1.5 eV, such as about 1.45 eV) to create the maximum
number of electron-hole pairs with the highest electrical potential
(voltage) upon absorption of the radiation energy. Electrons may
travel from the p-type side (i.e., the cadmium telluride layer 20)
across the junction to the n-type side (i.e., the cadmium sulfide
layer 18) and, conversely, holes may pass from the n-type side to
the p-type side. Thus, the p-n junction formed between the cadmium
sulfide layer 18 and the cadmium telluride layer 20 forms a diode
in which the charge imbalance leads to the creation of an electric
field spanning the p-n junction. Conventional current is allowed to
flow in only one direction and separates the light induced
electron-hole pairs.
[0059] The cadmium telluride layer 20 can be formed by any known
process, such as vapor transport deposition, chemical vapor
deposition (CVD), spray pyrolysis, electro-deposition, sputtering,
close-space sublimation (CSS), etc. In one particular embodiment,
the cadmium sulfide layer 18 is deposited by a sputtering and the
cadmium telluride layer 20 is deposited by close-space sublimation.
In particular embodiments, the cadmium telluride layer 20 can have
a thickness between about 0.1 .mu.m and about 10 .mu.m, such as
from about 1 .mu.m and about 5 .mu.m. In one particular embodiment,
the cadmium telluride layer 20 can have a thickness between about 2
.mu.m and about 4 .mu.m, such as about 3 .mu.m.
[0060] A series of post-forming treatments can be applied to the
exposed surface of the cadmium telluride layer 20. These treatments
can tailor the functionality of the cadmium telluride layer 20 and
prepare its surface for subsequent adhesion to the back contact
layer(s) 22. For example, the cadmium telluride layer 20 can be
annealed at elevated temperatures (e.g., from about 350.degree. C.
to about 500.degree. C., such as from about 375.degree. C. to about
424.degree. C.) for a sufficient time (e.g., from about 1 to about
10 minutes) to create a quality p-type layer of cadmium telluride.
Without wishing to be bound by theory, it is believed that
annealing the cadmium telluride layer 20 (and the device 10)
converts the normally lightly p-type doped, or even n-type doped
cadmium telluride layer 20 to a more strongly p-type cadmium
telluride layer 20 having a relatively low resistivity.
Additionally, the cadmium telluride layer 20 can recrystallize and
undergo grain growth during annealing.
[0061] Annealing the cadmium telluride layer 20 can be carried out
in the presence of cadmium chloride in order to dope the cadmium
telluride layer 20 with chloride ions. For example, the cadmium
telluride layer 20 can be washed with an aqueous solution
containing cadmium chloride and then annealed at the elevated
temperature.
[0062] In one particular embodiment, after annealing the cadmium
telluride layer 20 in the presence of cadmium chloride, the surface
can be washed to remove any cadmium oxide formed on the surface.
This surface preparation can leave a Te-rich surface on the cadmium
telluride layer 20 by removing oxides from the surface, such as
CdO, CdTeO.sub.3, CdTe.sub.2O.sub.5, etc. For instance, the surface
can be washed with a suitable solvent (e.g., ethylenediamine also
known as 1,2 diaminoethane or "DAE") to remove any cadmium oxide
from the surface.
[0063] Additionally, copper can be added to the cadmium telluride
layer 20. Along with a suitable etch, the addition of copper to the
cadmium telluride layer 20 can form a surface of copper-telluride
on the cadmium telluride layer 20 in order to obtain a
low-resistance electrical contact between the cadmium telluride
layer 20 (i.e., the p-type layer) and the back contact layer(s).
Specifically, the addition of copper can create a surface layer of
cuprous telluride (Cu.sub.2Te) between the cadmium telluride layer
20 and the back contact layer 22. Thus, the Te-rich surface of the
cadmium telluride layer 20 can enhance the collection of current
created by the device through lower resistivity between the cadmium
telluride layer 20 and the back contact layer 22.
[0064] Copper can be applied to the exposed surface of the cadmium
telluride layer 20 by any process. For example, copper can be
sprayed or washed on the surface of the cadmium telluride layer 20
in a solution with a suitable solvent (e.g., methanol, water, or
the like, or combinations thereof) followed by annealing. In
particular embodiments, the copper may be supplied in the solution
in the form of copper chloride, copper iodide, or copper acetate.
The annealing temperature is sufficient to allow diffusion of the
copper ions into the cadmium telluride layer 20, such as from about
125.degree. C. to about 300.degree. C. (e.g. from about 150.degree.
C. to about 200.degree. C.) for about 5 minutes to about 30
minutes, such as from about 10 to about 25 minutes.
[0065] A back contact layer 22 is shown on the cadmium telluride
layer 20. The back contact layer 22 generally serves as the back
electrical contact, in relation to the opposite, TCO layer 14
serving as the front electrical contact. The back contact layer 22
can be formed on, and in one embodiment is in direct contact with,
the cadmium telluride layer 20. The back contact layer 22 is
suitably made from one or more highly conductive materials, such as
elemental nickel, chromium, copper, tin, aluminum, gold, silver,
technetium or alloys or mixtures thereof. Additionally, the back
contact layer 22 can be a single layer or can be a plurality of
layers. In one particular embodiment, the back contact layer 22 can
include graphite, such as a layer of carbon deposited on the
p-layer followed by one or more layers of metal, such as the metals
described above. The back contact layer 22, if made of or
comprising one or more metals, is suitably applied by a technique
such as sputtering or metal evaporation. If it is made from a
graphite and polymer blend, or from a carbon paste, the blend or
paste is applied to the semiconductor device by any suitable method
for spreading the blend or paste, such as screen printing, spraying
or by a "doctor" blade. After the application of the graphite blend
or carbon paste, the device can be heated to convert the blend or
paste into the conductive back contact layer. A carbon layer, if
used, can be from about 0.1 .mu.m to about 10 .mu.m in thickness,
for example from about 1 .mu.m to about 5 .mu.m. A metal layer of
the back contact, if used for or as part of the back contact layer
22, can be from about 0.1 .mu.m to about 1.5 .mu.m in
thickness.
[0066] The encapsulating glass 24 is also shown in the exemplary
cadmium telluride thin film photovoltaic device 10 of FIG. 1.
[0067] Other components (not shown) can be included in the
exemplary device 10, such as bus bars, external wiring, laser
etches, etc. For example, when the device 10 forms a photovoltaic
cell of a photovoltaic module, a plurality of photovoltaic cells
can be connected in series in order to achieve a desired voltage,
such as through an electrical wiring connection. Each end of the
series connected cells can be attached to a suitable conductor such
as a wire or bus bar, to direct the photovoltaically generated
current to convenient locations for connection to a device or other
system using the generated electric. A convenient means for
achieving such series connections is to laser scribe the device to
divide the device into a series of cells connected by
interconnects. In one particular embodiment, for instance, a laser
can be used to scribe the deposited layers of the semiconductor
device to divide the device into a plurality of series connected
cells.
[0068] FIG. 2 shows a flow diagram of an exemplary method 30 of
manufacturing a photovoltaic device according to one embodiment of
the present invention. According to the exemplary method 30, a TCO
layer is formed on a glass substrate at 32. At 34, a resistive
transparent layer is formed on the TCO layer. A cadmium sulfide
layer is formed on the resistive transparent layer at 36, and a
cadmium telluride layer is formed on the cadmium sulfide layer at
38. The cadmium telluride layer can be annealed in the presence of
cadmium chloride at 40, and washed to remove any oxides formed on
the surface at 42. The cadmium telluride layer can be doped with
copper at 44. At 46, back contact layer(s) can be applied over the
cadmium telluride layer, and an encapsulating glass can be applied
over the back contact layer at 48.
[0069] One of ordinary skill in the art should recognize that other
processing and/or treatments can be included in the method 30. For
instance, the method may also include laser scribing to form
electrically isolated photovoltaic cells in the device. These
electrically isolated photovoltaic cells can then be connected in
series to form a photovoltaic module. Also, electrical wires can be
connected to positive and negative terminals of the photovoltaic
module to provide lead wires to harness electrical current produced
by the photovoltaic module.
[0070] This written description uses examples to disclose the
invention, including the best mode, and also to enable any person
skilled in the art to practice the invention, including making and
using any devices or systems and performing any incorporated
methods. The patentable scope of the invention is defined by the
claims, and may include other examples that occur to those skilled
in the art. Such other examples are intended to be within the scope
of the claims if they include structural elements that do not
differ from the literal language of the claims, or if they include
equivalent structural elements with insubstantial differences from
the literal languages of the claims.
* * * * *