U.S. patent application number 13/320655 was filed with the patent office on 2012-05-17 for sos substrate having low surface defect density.
This patent application is currently assigned to Shin-etsu Chemical Co., Ltd.. Invention is credited to Shoji Akiyama, Atsuo Ito, Makoto Kawai, Yuji Tobisaka.
Application Number | 20120119323 13/320655 |
Document ID | / |
Family ID | 43222695 |
Filed Date | 2012-05-17 |
United States Patent
Application |
20120119323 |
Kind Code |
A1 |
Akiyama; Shoji ; et
al. |
May 17, 2012 |
SOS SUBSTRATE HAVING LOW SURFACE DEFECT DENSITY
Abstract
A method of making bonded SOS substrate with a semiconductor
film on or above a sapphire substrate by implanting ions from a
surface of the semiconductor substrate to form an ion-implanted
layer; activating at least a surface of one of the sapphire
substrate and the semiconductor substrate from which the ions have
been implanted; bonding the surface of the semiconductor substrate
and the surface of the sapphire substrate at a temperature of from
50.degree. C. to 350.degree. C.; heating the bonded substrates at a
maximum temperature of from 200.degree. C. to 350.degree. C.; and
irradiating visible light from a sapphire substrate side or a
semiconductor substrate side to the ion-implanted layer of the
semiconductor substrate to make the interface of the ion-implanted
layer brittle at a temperature of the bonded body higher than the
temperature at which the surfaces were bonded, to transfer the
semiconductor film to the sapphire substrate.
Inventors: |
Akiyama; Shoji; (Annaka-shi,
JP) ; Ito; Atsuo; (Tokyo, JP) ; Tobisaka;
Yuji; (Annaka-shi, JP) ; Kawai; Makoto;
(Annaka-shi, JP) |
Assignee: |
Shin-etsu Chemical Co.,
Ltd.
Tokyo
JP
|
Family ID: |
43222695 |
Appl. No.: |
13/320655 |
Filed: |
May 25, 2010 |
PCT Filed: |
May 25, 2010 |
PCT NO: |
PCT/JP2010/058824 |
371 Date: |
January 30, 2012 |
Current U.S.
Class: |
257/507 ;
257/E21.568; 257/E29.002; 438/458 |
Current CPC
Class: |
H01L 21/268 20130101;
H01L 21/265 20130101; H01L 21/26506 20130101; H01L 21/76254
20130101; H01L 21/2658 20130101 |
Class at
Publication: |
257/507 ;
438/458; 257/E29.002; 257/E21.568 |
International
Class: |
H01L 21/762 20060101
H01L021/762; H01L 29/02 20060101 H01L029/02 |
Foreign Application Data
Date |
Code |
Application Number |
May 29, 2009 |
JP |
2009-130969 |
Claims
1. A silicon-on-sapphire (SOS) substrate comprising a single
crystal silicon film on or above a sapphire substrate, wherein a
defect density of a surface of the single crystal silicon film
measured by a Secco defect detection method and a selective etching
defect detection method is 10.sup.4 pieces/cm.sup.2 or less.
2. The SOS substrate according to claim 1, wherein the thickness of
the single crystal silicon film exceeds 100 nm.
3. The SOS substrate according to claim 1, comprising a silicon
oxide film between the single crystal silicon film and the sapphire
substrate.
4. The SOS substrate according to claim 1, wherein a thickness
variation of the single crystal silicon film is 20 nm or less.
5. The SOS substrate according to claim 1, or wherein the SOS
substrate is obtained by the bonding method.
6. A bonded SOS substrate comprising a semiconductor film on a
surface of a sapphire substrate obtained by a method comprising the
steps of: providing the sapphire substrate and a semiconductor
substrate; implanting ions from a surface of the semiconductor
substrate to form an ion-implanted layer; activating at least a
surface selected from the surface of the sapphire substrate and the
surface of the semiconductor substrate from which the ions have
been implanted; bonding the surface of the semiconductor substrate
and the surface of the sapphire substrate at a temperature of from
50.degree. C. to 350.degree. C.; heating the bonded substrates at a
maximum temperature of from 200.degree. C. to 350.degree. C. to
form a bonded body; and irradiating visible light from a sapphire
substrate side or a semiconductor substrate side to the
ion-implanted layer of the semiconductor substrate for making an
interface of the ion-implanted layer brittle, while keeping a
temperature of the bonded body higher than the temperature at which
the surfaces of the semiconductor substrate and the sapphire
substrate were bonded, so as to transfer the semiconductor film to
the sapphire substrate.
7. The bonded SOS substrate according to claim 6, wherein a step of
activating comprises one or more selected from the group consisting
of ozone water treatment, UV ozone treatment, ion beam treatment
and plasma treatment.
8. The bonded SOS substrate according to claim 6, wherein the
temperature of the bonded body during irradiation of the visible
light is from 30.degree. C. to 100.degree. C. higher than the
temperature at which the bonded body was formed.
9. The bonded SOS substrate according to claim 6, comprising a step
of applying a mechanical impact to the interface of the
ion-implanted layer to split the bonded body along the interface
after the step of irradiating visible light.
10. The bonded SOS substrate according to claim 6, comprising a
step of applying a mechanical impact to a side near the interface
of the bonded body before the step of irradiating visible
light.
11. The bonded SOS substrate according to claim 6, wherein the
semiconductor substrate is a single crystal silicon substrate or a
silicon substrate on which an oxide film has been grown.
12. The bonded SOS substrate according to claim 6, wherein the
visible light is a laser beam.
13. The bonded SOS substrate according to claim 6, wherein the
visible light is of a RTA (Rapid Thermal Anneal) including spike
anneal.
14. The bonded SOS substrate according to claim 6, wherein the
visible light is flash lamp light.
15. The bonded SOS substrate according to claim 6, wherein the
implanted ions are hydrogen atom ions (H.sup.+) and a dose amount
thereof is from 1.times.10.sup.16 atoms/cm.sup.2 to
1.times.10.sup.17 atoms/cm.sup.2.
16. The bonded SOS substrate according to claim 6, wherein the
implanted ions are hydrogen atom molecule ions (H.sub.2.sup.+) and
a dose amount thereof is from 5.times.10.sup.15 atoms/cm.sup.2 to
5.times.10.sup.16 atoms/cm.sup.2.
17. The bonded SOS substrate according to claim 6, further
comprising a step of chemically etching and/or polishing a surface
of the transferred semiconductor film.
18. (canceled)
19. The SOS substrate according to claim 2, comprising a silicon
oxide film between the single crystal silicon film and the sapphire
substrate.
20. The SOS substrate according to claim or 2, wherein a thickness
variation of the single crystal silicon film is 20 nm or less.
21. The SOS substrate according to claim 2, wherein the SOS
substrate is obtained by the bonding method.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The invention relates to a silicon-on-sapphire SOS substrate
having a low surface defect density.
[0003] 2. Description of Related Art
[0004] Conventionally, a silicon-on-sapphire (SOS) substrate
containing sapphire having a high insulation property, a low
dielectric loss and a high thermal conductivity as a handle
substrate has come into practical use since 1960s. The SOS
substrate is an oldest silicon-on-insulator (SOI) substrate and
forms an SOI structure by heteroepitaxially growing silicon on an R
surface (1012) of sapphire.
[0005] However, recently, an SOI using a SIMOX method, the bonding
method and the like has become a main stream. Although an SOS
substrate, which is a SOI substrate having silicon on a sapphire
substrate, cannot cope, the SOS substrate has been used only for a
device such as a high frequency device requiring a low dielectric
loss. It is known that since a heteroepitaxial SOS substrate is
formed by heteroepitaxially growing silicon on sapphire of which
lattice constant is 12% different from that of silicon, many
defects due to the mismatch of lattice magnitude are generated
(see, for example, Yoshii et al., Japanese Journal of Applied
Physics, Vol. 21 (1982) Supplement 21-1, pp. 175-179).
[0006] Recently, use of a mobile communication represented by a
mobile phone has been widely spread so that a demand for the high
frequency device has been increased. Use of an SOS substrate has
been considered in this field. However, use of the heteroepitaxial
SOS substrate is limited to small individual parts, such as a
switch, at present since a defect density is high.
[0007] It has been reported that the surface defect density of the
heteroepitaxial SOS substrate is about 10.sup.9 pieces/cm.sup.2 in
a Secco defect detection method (a mixed solution of
K.sub.2Cr.sub.2O.sub.7 or Cr.sub.2O.sub.3 and HF), a selective
etching defect detection method (a mixed solution of HF, KI, I and
CH.sub.3OH) or the like (see, for example, Yoshii et al., Japanese
Journal of Applied Physics, Vol. 21 (1982) Supplement 21-1, pp.
175-179).
[0008] To reduce the defects of the heteroepitaxial SOS substrate,
there is proposed a method comprising the steps of ion-implanting
high concentration Si in the vicinity of the interface between a Si
film and a sapphire substrate, making a remaining Si surface
amorphous, and annealing at about 600.degree. C. to gradually
recrystalize an amorphous layer from a surface side having a less
amount of defects. This method is called a single solid phase
growth. Further, there is also proposed a method of repeating the
above method twice for trying to reduce defects further (see, for
example, Yoshii et al., Japanese Journal of Applied Physics, Vol.
21 (1982) Supplement 21-1, pp. 175-179). This method is called a
double solid phase growth.
[0009] However, even if the double solid phase growth method is
used, the defect density is about 10.sup.6 to 10.sup.7
pieces/cm.sup.2 so that it is difficult to make a recent highly
downscaled and sophisticated device. Further, it is also difficult
to make a relatively large size device such as a system chip having
many functions. It can be said that this is due to an essential
problem of the heteroepitaxial growth (an epitaxial growth of
materials having different lattice constants).
SUMMARY OF THE INVENTION
[0010] In view of the current circumstances, an object of the
invention is to solve a problem that a defect density increases due
to lattice constant mismatch between silicon and sapphire, thereby
providing an SOS substrate having a low defect density.
[0011] To solve the problem, the inventors have reached the
following manufacturing method.
[0012] According to the invention, provided is a method for
manufacturing an SOS substrate comprising a single crystal silicon
layer on or above a surface of a sapphire substrate (handle), the
method comprising the steps of: in this order, implanting ions into
a silicon substrate or a silicon substrate with an oxide film
thereon to form an ion-implanted layer; activating at least a
surface selected from the surface of the sapphire substrate and a
surface of the silicon substrate or the silicon substrate with the
oxide film thereon from which the ions have been implanted; bonding
the silicon substrate or the silicon substrate with the oxide film
thereon to the sapphire substrate; heating the bonded substrates at
a temperature of from 200.degree. C. to 350.degree. C. to form a
bonded body; and irradiating visible light from a sapphire
substrate side of the bonded body to the ion-implanted layer of the
silicon substrate or the silicon substrate with the oxide film
thereon for making an interface of the ion-implanted layer brittle
so as to transfer a silicon film to the sapphire substrate.
[0013] According to the present invention, an SOS substrate having
approximately the same defect density (about 10.sup.4
pieces/cm.sup.2; see Realize Science & Engineering Center Co.,
Ltd., "Science of SOI", Item 2 of Paragraph 2 in Chapter 2) as a
bonded SOI substrate is provided so that an integrated device can
be realized.
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] FIG. 1 exhibits steps of an embodiment of a method for
manufacturing a bonded SOS substrate of the invention.
[0015] FIGS. 2(a) & 2(b) show an overall plan view and an
enlarged plan view, respectively, of an outer peripheral section of
a bonded SOS substrate in accordance with the invention.
[0016] FIG. 3 is a graph of defect densities measured by changing
defect-detecting sites of a bonded SOS substrate of the invention
(a wafer outer peripheral part or a wafer central part) and defect
detecting methods (Secco or elective etching).
[0017] FIGS. 4(a) & 4(b) show a sectional view of the wafer
central part and a sectional view of a wafer outer peripheral part,
respectively, of a bonded SOS substrate in accordance with the
invention.
DETAILED DESCRIPTION OF THE INVENTION
[0018] According to the invention, an SOS substrate comprises a
single crystal silicon film formed on or above a sapphire substrate
and the defect density of the surface of the single crystal silicon
film which is measured by a Secco defect detection method and a
selective etching defect detection method is 10.sup.4
pieces/cm.sup.2 or less.
[0019] The Secco defect detection method and the selective etching
defect detection method are well-known by a person skilled in the
art so that an explanation of these detection methods is omitted.
These detection methods are typically carried out after a single
crystal silicon film is polished to a predetermined thickness by
the CMP polishing.
[0020] According to the invention, the thickness of the single
crystal silicon film in the SOS substrate can be more than 100 nm.
The thickness within such a range is advantageous in that the
defect density of the bulk part is not so high as compared with the
defect density in the vicinity of the interface between a silicon
film and a sapphire substrate. Thus, the silicon film is not likely
to be affected by the defects in the vicinity of the interface.
Further, when the silicon film is thick, there is an advantage that
the silicon film can be easily treated because electric properties
are relatively insensitive to a thickness variation. The upper
limit of the thickness can be, for example, 500 nm.
[0021] According to the invention, the SOS substrate can keep the
thickness variation of a single crystal silicon film in the range
of 20 nm or less. When the silicon film is thick, it is
advantageous in that the silicon film can be treated easily because
the electric properties are relatively insensitive to the thickness
variation. According to the invention, the SOS substrate can
further improve the electric properties because the thickness
variation is small. According to the invention, in the method for
manufacturing the SOS substrate, splitting and transferring are
regulated by an ion-implanted interface so that it becomes easy to
keep the film thickness variation within the above range after
transferring.
[0022] The film thickness of the single crystal silicon film is
measured by an optical interference type film thickness meter and
is an average value within a diameter of about 1 mm which is the
spot diameter of measuring beam light. The thickness variation is a
value defined by the square root of the square sum of the offset of
the film thickness from an average value of film thickness when 361
measuring points are radially provided.
[0023] According to the invention, the SOS substrate preferably
comprises a silicon oxide film between the single crystal silicon
film and the sapphire substrate. This is because the channeling of
the implanted ions can be suppressed. Such an SOS substrate can be
obtained, for example, by using the bonding method, which will be
described later, where an insulation film such as a silicon oxide
film is formed on a surface of a silicon wafer prior to the step of
ion-implanting.
[0024] According to the invention, the SOS substrate can be
particularly preferably used in the manufacture of various types of
devices in which an SOI layer is allowed to function as a partial
depletion.
[0025] Examples of such semiconductor devices include a CPU and a
system chip provided with many arithmetic processing functions, a
high frequency device such as a microwave device and a millimeter
wave device requiring a small dielectric loss, and a substrate for
an electric engineering device such as a liquid crystal device.
[0026] According to the invention, even if the SOS substrate has a
diameter of 100 mm or more, it can keep the defect density within
the above range. When the defect density is within the range, the
upper limit of the diameter can be, for example, 300 mm.
[0027] The SOS substrate is preferably manufactured by the bonding
method. The bonding method is advantageous in that the correlation
between the defect density in the vicinity of a sapphire/silicon
interface and the defect density in the bulk part can be made small
as compared with the epitaxial growth method.
[0028] The bonding method may include a method of thermal splitting
by the relocation effect of crystals and the aggregation effect of
injected hydrogen bubbles when a bonded body is heated under an
inert gas atmosphere at about 500.degree. C., and a method of
splitting at an hydrogen ion-implanted interface by making the
temperature of one surface of the bonded substrates differ from
that of the other surface thereof. The bonding method is preferably
the method for manufacturing the SOS substrate according to the
invention.
[0029] The manufacturing method of the SOS substrate according to
the invention will be described in detail based on FIG. 1.
[0030] First, as a semiconductor substrate, for example, a silicon
substrate or a silicon substrate 1 with an oxide film thereon
(unless otherwise distinguished, simply described as a silicon
wafer hereinafter) is subjected to ion implantation to form an
ion-implanted layer 2.
[0031] The ion-implanted layer 2 is formed inside a silicon wafer.
Hydrogen ions (H.sup.+) or hydrogen molecule ions (H.sub.2.sup.+)
of a predetermined dose is implanted by using implantation energy
with which the ion-implanted layer can be formed to a desired depth
from the surface of the silicon wafer. As a condition, for example,
the implantation energy can be 30 to 100 keV.
[0032] The dose amount of the hydrogen ion (H.sup.+) implanted to
the silicon wafer is preferably 1.0.times.10.sup.16 atom/cm.sup.2
to 1.0.times.10.sup.17 atom/cm.sup.2. When the dose amount is less
than 1.0.times.10.sup.16 atom/cm.sup.2, an interface may not become
brittle. When the dose amount is more than 1.0.times.10.sup.17
atom/cm.sup.2, the interface may have bubbles during heating after
bonding so that transferring may be insufficient. The dose amount
is more preferably 6.0.times.10.sup.16 atom/cm.sup.2.
[0033] When hydrogen molecule ion (H.sub.2.sup.+) is used as the
implanted ions, the dose amount thereof is preferably
5.0.times.10.sup.15 atoms/cm.sup.2 to 5.0.times.10.sup.16
atoms/cm.sup.2. When the dose amount is less than
5.0.times.10.sup.15 atoms/cm.sup.2, an interface may not become
brittle. When the dose amount is more than 5.0.times.10.sup.16
atoms/cm.sup.2, the interface may have bubbles during heating after
bonding so that transferring may be insufficient. The dose amount
is more preferably 2.5.times.10.sup.16 atom/cm.sup.2.
[0034] Further, when an insulating film such as a silicon oxide
film having about several nanometers to 500 nm is formed on the
surface of the silicon wafer and hydrogen ions or hydrogen molecule
ions are implanted through the insulating film, channeling of the
implanted ions can be suppressed.
[0035] Next, the surface of the silicon wafer 1 and/or the surface
of the sapphire substrate 3 is activated. Suitable methods of
surface activation include plasma treatment, ozone water treatment,
UV ozone treatment and ion beam treatment.
[0036] In the plasma treatment, a sapphire substrate and/or a
silicon wafer which has been subjected to cleaning such as RCA
cleaning is placed in a vacuum chamber, and exposed to high
frequency plasma of about 100 W for about 5 to 10 seconds after
introduction of plasma gas at a reduced pressure. Thus, the surface
of the sapphire substrate and/or the surface of the silicon wafer
is subjected to the plasma treatment. As the plasma gas, when the
surface of the silicon wafer is desirably oxidized, plasma of
oxygen gas can be used. When the surface of the silicon wafer is
desirably not oxidized, a hydrogen gas, an argon gas, a mixed gas
of a hydrogen gas and an argon gas, or a mixed gas of a hydrogen
gas and a helium gas can be used. When the sapphire substrate is
treated, any of the gases can be used.
[0037] In the plasma treatment, the organic substance on the
surface of the silicon wafer and/or the sapphire substrate is
oxidized and removed, and further the OH radical on the surface is
increased for surface activation. Although the treatment of both of
the surfaces, the surface of the silicon wafer from which the ions
are implanted and a bonding surface of the sapphire substrate, is
more preferable, the treatment of any one of the surfaces may be
done.
[0038] In the ozone treatment, it is characterized that an ozone
gas is introduced into pure water and then activates a surface of
the wafer by active ozone.
[0039] In the UV ozone treatment, UV light having a short
wavelength (wavelength of about 195 nm) is irradiated on the
atmosphere or an oxygen gas to generate active ozone for surface
activation.
[0040] In the ion beam treatment, an ion beam such as Ar ion beam
is applied to the wafer surface in a high vacuum
(<1.times.10.sup.-6 Torr) so as to expose a dangling bond having
a high degree of activity for surface activation.
[0041] The surface of the silicon wafer to be subjected to the
surface activation treatment is preferably a surface from which the
ions have been implanted.
[0042] In the invention, although the thickness of the silicon
wafer is not particularly limited, a silicon wafer having a
thickness close to that of an ordinary SEMI/JEIDA standard can
provide easy handling.
[0043] The sapphire substrate preferably has a smaller energy loss
until light in a visible light region (wavelength 400 nm to 700 nm)
reaches the ion-implanted layer of the bonded silicon wafer. A
substrate is not particularly limited insofar as it has the
transmittance of 70% or more in the visible light region. The
substrate is preferably of quartz, glass or sapphire in
consideration of excellence in insulation and transparency.
[0044] In the invention, although the thickness of the sapphire
substrate is not particularly limited, a sapphire wafer having a
thickness close to that of the ordinary SEMI/JEIDA standard can
provide easy handling.
[0045] Next, the surface of the silicon wafer 1 and the surface of
the sapphire substrate 3 are bonded, where the surface or surfaces
subjected to plasma and/or ozone treatment are used as bonding
surfaces.
[0046] Next, the bonded substrates are heated at a maximum
temperature of from 200.degree. C. to 350.degree. C. to obtain a
bonded body 6. A reason why the step of heating is comprised is to
prevent a crystal defect from being generated by dislocation of a
bonded interface 9. The dislocation is caused by an abrupt
temperature increase when the bonded interface 9 becomes a high
temperature by irradiation of visible light in the later step. The
maximum temperature is from 200.degree. C. to 350.degree. C. When
the maximum temperature is less than 200.degree. C., a bonding
strength does not increase. When the maximum temperature is more
than 350.degree. C., there is a possibility that the bonded
substrates may be damaged.
[0047] Heating time is preferably 12 hours to 72 hours although the
time also depends on temperature to some extent.
[0048] Next, prior to irradiation of the visible light, a
mechanical impact may be applied to a side near the bonded
interface 9 of the bonded body 6. The mechanical impact to the
vicinity of the bonded interface allows the splitting to start at
one position when visible light is irradiated. Because the
splitting spreads to the overall surface of the wafer from the
position, there is an advantage that a film can be easily
transferred.
[0049] Subsequently, the substrate is cooled to a room temperature
when desired, and subjected to annealing by irradiating visible
light from the sapphire substrate 3 side or the semiconductor
substrate 1 side of the bonded body 6 toward the ion-implanted
layer 2 of the silicon wafer 5.
[0050] In the description, "visible light" is light having a
maximal wavelength within the range of 400 to 700 nm. The visible
light may be coherent light or incoherent light.
[0051] The temperature of the bonded body 6 during irradiation of
the visible light is preferably 30.degree. C. to 100.degree. C.
higher than the temperature for bonding.
[0052] A reason for preferably irradiating light at the higher
temperature can be explained as follows without limiting the scope
of the invention. When the substrates bonded at high temperature
are returned to a room temperature after they have been heated and
obtained a sufficient bonding strength, the substrates are warped
due to a difference in the thermal expansion coefficient for both
of the substrates. Thus, the experiments by the inventors have
found that when light is irradiated to the substrates, a defect is
generated in the semiconductor film and the substrates themselves
are damaged in some cases. It is because a stress is rapidly
released during transfer of a film and the substrates tend to
return to a flat state.
[0053] The irradiation of light at the higher temperature can avoid
the damage of the substrate.
[0054] To irradiate light in the state that the substrates are
flat, it is preferable to raise the temperature of the substrates
to the temperature close to the temperature during bonding. It is
important that the wafer is heated during irradiation.
[0055] When annealing is carried out using a laser beam as an
example of the visible light, the laser beam reaches the silicon
substrate 1 without heating the sapphire substrate 3 because the
laser beam passes through the sapphire substrate 3 with almost no
absorption by the sapphire substrate 3. The reached laser beam
selectively heats only the vicinity (including the bonded
interface) of the bonded interface 9 of silicon, especially the
part made amorphous by the hydrogen ion implantation, thereby
prompting embrittlement of the ion-implanted part.
[0056] Further, only a very small part of the silicon substrate 1
(only the silicon in the vicinity of the bonded interface 9) is
heated instantly so that the substrates are not cracked and not
warped after cooled.
[0057] The wavelength of the laser used here is preferably a
wavelength which is relatively easily absorbed by silicon (700 nm
or less), and absorbed by amorphous silicon but hardly absorbed by
a single crystal silicon part so that the part made amorphous by
the hydrogen ion implantation can be selectively heated. A suitable
wavelength region may be from 400 nm to 700 nm, preferably from 500
nm to 600 nm. A laser in this wavelength region includes, but is
not limited to, a secondary harmonic wave of an Nd:YAG laser
(wavelength .lamda.=532 nm), a secondary harmonic wave of a
YVO.sub.4 laser (wavelength .lamda.=532 nm).
[0058] It is noted that, when an ion-implanted part 2 is
excessively heated by irradiation of the laser, a thermal splitting
is partially generated so that a bulging defect called a blister is
generated. This is visually observed from the sapphire substrate
side of the bonded SOS substrate. Once splitting begins by the
blister, a stress is localized in the bonded SOS substrate, thereby
causing breakage of the bonded SOS substrate. Accordingly, it is
important to irradiate the laser to the extent that the thermal
splitting is not generated and to carry out a mechanical splitting
thereafter. Alternatively, it is important to apply the mechanical
impact to the side of the bonded SOS substrate at the vicinity of
the bonded interface 9 prior to the irradiation of the laser and to
cause a thermal impact due to irradiation of the laser to generate
the destruction of the ion-implanted interface from the start point
of the mechanical impact to the overall interface of the bonded
SOS.
[0059] As for an irradiation condition of the laser, when a laser
having an output of 50 W to 100 W and an oscillation frequency of
25 mJ at 3 kHz is used, irradiation energy per area is preferably 5
J/cm.sup.2 to 30 J/cm.sup.2 in our experience. When the energy is 5
J/cm.sup.2 or less, there is a possibility that the embrittlement
does not occur in the ion-implanted interface. When the energy is
more than 30 J/cm.sup.2, there is a possibility that the substrate
is damaged because the embrittlement is excessively strong. In the
irradiation, a spot-shaped laser beam is scanned over the wafer so
that it is difficult to specify the scanning time. The scanning
time is desirably selected in such a manner that the irradiation
energy after treatment is within the above range.
[0060] Further, it is also possible to apply an RTA (Rapid Thermal
Anneal) including spike anneal in the place of said laser anneal.
The RTA system is equipment which contains a halogen lamp as a
light source and can heat the wafer to a target temperature at a
very rapid rate of 30.degree. C./sec to 200.degree. C./sec. The
wavelength emitted from the halogen lamp has high emission
intensity in the visible light region according to black radiation.
The spike anneal does not have a particular boundary and is the
anneal which has a particularly rapid temperature increase rate
(for example, 100.degree. C./sec or more) in the RTA. Since a
temperature increases at a very rapid rate and sapphire is not
heated in such a wavelength band (by radiation), silicon becomes
heated before sapphire does, which is preferable to make the
ion-implanted interface brittle. In the RTA, a process has been
finished when sufficient heat is transmitted to sapphire.
[0061] Further, it is also possible to apply a flash lamp anneal in
the place of said laser anneal. As for the wavelength of the flash
lamp used here, a flash lamp having a peak intensity in the
wavelength region of from 400 nm to 700 nm, which is the wavelength
region in which light is efficiently absorbed by silicon, is
preferable although it is inevitable that the flash lamp has a
certain degree of wavelength region as long as it is a lamp. When
the wavelength is less than 400 nm, even single crystal silicon
also has a high absorption coefficient. When the wavelength is more
than 700 nm, even amorphous silicon also has a low absorption
coefficient. A suitable wavelength region is from about 400 to
about 700 nm. As for a lamp light source which meets the wavelength
region, heating by a xenon lamp is typically employed. The xenon
lamp has a peak intensity (at 700 nm or less) in the vicinity of
500 nm, which is suitable for the object of the invention.
[0062] When xenon lamp light is used, the light may be irradiated
through a wavelength filter which cuts the light other than the
light in a visible light region. Further, a filter or like which
has a high absorption coefficient in single crystal silicon and
shields visible light of 450 nm or less, is also effective for
stabilizing a process. To suppress the generation of blister
described above, it is preferable to irradiate the overall surface
of the bonded SOS substrate all at once by the xenon lamp light.
All irradiation at once can prevent the localization of stress in
the bonded SOS substrate so that the destruction of the bonded SOS
substrate can be easily prevented. Accordingly, it is important to
irradiate the xenon lamp light to the extent that no thermal
splitting is generated and to carry out the mechanical splitting
thereafter. Alternatively, it is important that the mechanical
impact is applied to the side at the vicinity of the bonded
interface of the bonded SOS substrate prior to irradiation of the
xenon lamp light so that the thermal impact due to the irradiation
of the xenon lamp light generates destruction of the ion-implanted
interface from the start point of the mechanical impact to the
overall interface of the bonded SOS substrate.
[0063] When it is not confirmed that the silicon film has been
transferred to the sapphire substrate after irradiation of the
laser beam, the RTA, or irradiation of the flash lamp, application
of the mechanical impact to the interface can split the bonded body
along the interface of the ion-implanted layer, thereby
transferring the single crystal silicon film to the sapphire
substrate.
[0064] To apply the mechanical impact to the interface of the
ion-implanted layer, for example, a jet of a fluid, such as a gas
or a liquid, can be blown continuously or intermittently to a side
surface of the bonded wafer. Any method in which a mechanical
splitting can be generated by an impact is applicable without
particular limitation.
[0065] According to the invention, the SOS substrate 8 in which the
single crystal silicon film 4 is formed on the sapphire substrate 3
can be obtained as a result of splitting.
[0066] Since a damaged layer of about 150 nm remains on a surface
of the single crystal silicon film just after splitting, it is
preferable to carry out CMP polishing. Removal of the damaged layer
in its entirety by polishing increases the film thickness
variation. Accordingly, in an actual process, a method of removing
almost all the damaged layer by chemical etching and then
mirror-polishing the surface of the damaged layer is
reasonable.
[0067] An etching solution for chemical etching is preferably a
solution of one or more selected from a group consisting of ammonia
hydrogen peroxide, ammonia, KOH, NaOH, CsOH, TMAH, EDP and
hydrazine. In generally, since the etching rate of an organic
solvent is slow as compared with that of an alkaline solution, the
organic solvent is suitable when it is necessary to control an
accurate etching amount.
[0068] Since the CMP polishing is carried out to mirror-polish the
surface, 30 nm or more of polishing is typically carried out.
[0069] After the CMP polishing and the mirror finish polishing,
cleaning by a wet process such as RCA cleaning or spin cleaning,
and/or cleaning by a dry process such as UV/ozone cleaning, HF
vapor cleaning, may be carried out.
EXAMPLE 1
[0070] A silicon substrate (thickness 625 .mu.m) having a diameter
of 150 mm on which an oxide film had been grown to 200 nm was
subjected to implantation of hydrogen ions at 57 keV and a dose
amount of 6.0.times.10.sup.16 atoms/cm.sup.2. Both surfaces of a
sapphire substrate were subjected to ion beam activation treatment.
Then the silicon substrate was bonded to the sapphire substrate at
150.degree. C. After the bonded substrates were subjected to heat
treatment at 225.degree. C. for 24 hours for primary bonding, a
green laser having a wavelength of 532 nm was irradiated from the
sapphire substrate side at 200.degree. C. A laser condition at the
time was 20 J/cm.sup.2. After the overall surface of the substrate
was irradiated, a silicon film was transferred to the sapphire
substrate by splitting along the bonded interface to which a
mechanical impact was applied. The transfer of the silicon film
onto the overall surface of the sapphire substrate could be
confirmed. After the silicon layer of the substrate was made to a
thickness of 200 nm by CMP polishing, the number of defects of the
central parts and the outer peripheral part of the substrate was
counted by a Secco defect detection method and a selective etching
method. The number of pits which could be confirmed by an optical
microscope was from about 3.times.10.sup.3 pieces/cm.sup.2 to about
5.times.10.sup.3 pieces/cm.sup.2. The photographs of appearance of
a bonded SOS prepared by the method are shown in FIGS. 2(a) &
2(b). Since splitting and transferring were regulated by an ion
implanted interface, the film thickness variation after the
transfer was suppressed to be 5 nm or less. The film thickness
variation after the mirror finish polishing (CMP) was 20 nm or
less.
EXAMPLE 2
[0071] A silicon substrate (thickness 625 .mu.m) having a diameter
of 150 mm on which an oxide film had been grown to 200 nm was
subjected to implantation of hydrogen ions at 57 keV and a dose
amount of 6.0.times.10.sup.16 atoms/cm.sup.2. Both surfaces of a
sapphire substrate were subjected to plasma activation treatment.
Then the silicon substrate was bonded to the sapphire substrate at
200.degree. C. After the bonded substrates were subjected to heat
treatment at 225.degree. C. for 24 hours for primary bonding, light
from a xenon plash lamp was irradiated from the sapphire substrate
side at 250.degree. C. After the overall surface of the substrate
was irradiated, a silicon film was transferred to the sapphire
substrate by splitting along a bonded interface to which a
mechanical impact was applied. The transfer of the silicon film
onto the overall surface of the sapphire substrate could be
confirmed. After the silicon layer of the substrate was made to a
thickness of 200 nm by etching (an ammonia hydrogen peroxide
solution) and CMP polishing, the number of defects of the central
part and the outer peripheral part of the substrate was counted by
a Secco defect detection method and a selective etching method. The
number of defects was from about 4.times.10.sup.3 pieces/cm.sup.2
to about 8.times.10.sup.3 pieces/cm.sup.2. The defect densities are
summarized in Table 1 and FIG. 3 together with the result of
Example 1.
TABLE-US-00001 TABLE 1 Example 1 Example 2 location center
periphery center periphery center periphery center periphery of
defect density defect Secco Secco selective selective Secco Secco
selective selective detection etching etching etching etching
method defect 4.5 .times. 10.sup.3 4.9 .times. 10.sup.3 3.0 .times.
10.sup.3 3.5 .times. 10.sup.3 8.0 .times. 10.sup.3 7.2 .times.
10.sup.3 4.1 .times. 10.sup.3 4.0 .times. 10.sup.3 density
(no./cm.sup.2)
[0072] In addition, as to all the samples, since splitting and
transferring were regulated by an ion implanted interface, the film
thickness variation after the transfer was suppressed to be 5 nm or
less. The film thickness variation after the mirror finish
polishing (CMP) was 20 nm.
EXAMPLE 3
[0073] A silicon substrate (thickness 625 .mu.m) having a diameter
of 150 mm on which an oxide film had been grown to 200 nm was
subjected to implantation of hydrogen ions at 57 keV and a dose
amount of 6.0.times.10.sup.16 atoms/cm.sup.2. Both surfaces of a
sapphire substrate were subjected to UV ozone activation treatment.
Then, the silicon substrate was bonded to the sapphire substrate at
100.degree. C. After the bonded substrates were subjected to heat
treatment at 225.degree. C. for 24 hours for primary bonding, light
from a xenon flash lamp were irradiated from the sapphire substrate
side at 175.degree. C. After the overall surface of the substrate
was irradiated, a silicon film was transferred to the sapphire
substrate by splitting along a bonded interface to which a
mechanical impact is applied. The film thickness was made to about
250 nm by EDP polishing and CMP polishing. Since splitting and
transferring were regulated by an ion implanted interface, the film
thickness variation after the transfer was suppressed to be 5 nm or
less. The film thickness variation after the mirror finish
polishing (CMP) was 20 nm or less. Cross-sectional TEM
(transmission electron microscope) photographs of the substrate
were taken at two positions, i.e. at a center and on an outer
periphery. No defect was observed at all in a field of view having
a narrow TEM level. FIG. 4 shows the photographs.
EXAMPLE 4
[0074] A silicon substrate (thickness 625 .mu.m) having a diameter
of 150 mm on which an oxide film had been grown to 200 nm was
subjected to implantation of hydrogen ions at 57 keV and a dose
amount of 6.0.times.10.sup.16 atoms/cm.sup.2. Both surfaces of a
sapphire substrate were subjected to UV ozone activation treatment.
Then the silicon substrate was bonded to the sapphire substrate at
100.degree. C. After the bonded substrates were subjected to heat
treatment at 225.degree. C. for 24 hours for primary bonding, a RTA
treatment was applied from the sapphire substrate side at
175.degree. C. A temperature increasing rate was 50.degree. C./sec
and a temperature was reduced when the silicon layer reached
800.degree. C. A silicon film was transferred to the sapphire
substrate by splitting along a bonded interface to which a
mechanical impact was applied. The film thickness was made to about
250 nm by EDP polishing and CMP polishing. Since splitting and
transferring were regulated by an ion implanted interface, the film
thickness variation after the transfer was suppressed to be 5 nm or
less. The film thickness variation after the mirror finish
polishing (CMP) was 20 nm or less.
EXAMPLE 5
[0075] A silicon substrate (thickness 625 .mu.m) having a diameter
of 150 mm on which an oxide film had been grown to 200 nm was
subjected to implantation of hydrogen ions at 57 keV and a dose of
amount 6.0.times.10.sup.16 atoms/cm.sup.2. Both surfaces of a
sapphire substrate were subjected to UV ozone activation treatment.
Then, the silicon substrate was bonded to the sapphire substrate.
After the bonded substrates were subjected to heat treatment at
225.degree. C. for 24 hours for primary bonding, light from a
halogen lamp was irradiated from the sapphire substrate side, and
the bonded body was spike-annealed at 100.degree. C. After the
overall surface of the substrate was irradiated, a silicon film was
transferred to the sapphire substrate by splitting along a bonded
interface to which a mechanical impact was applied. The film
thickness was made to about 250 nm by CMP polishing. Since
splitting and transferring were regulated by an ion-implanted
interface, the film thickness variation after the transfer was
suppressed to be 5 nm or less. The film thickness variation after
the mirror finish polishing (CMP) was 20 nm or less.
* * * * *