U.S. patent application number 12/868071 was filed with the patent office on 2011-11-24 for printed circuit board and method of manufacturing the same.
This patent application is currently assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD.. Invention is credited to Seog Moon Choi, Kwang Soo Kim, Sung Keun Park, Sang Hyun Shin.
Application Number | 20110284382 12/868071 |
Document ID | / |
Family ID | 44971561 |
Filed Date | 2011-11-24 |
United States Patent
Application |
20110284382 |
Kind Code |
A1 |
Park; Sung Keun ; et
al. |
November 24, 2011 |
PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME
Abstract
Disclosed herein is a printed circuit board, including: a metal
substrate; an anodic oxide layer formed by anodizing the metal
substrate; circuit layers formed on the anodic oxide layer; and a
first sol-gel layer formed by applying a photocatalytic material
between circuit wirings of the circuit layers and then curing the
applied photocatalytic material. The printed circuit board is
advantageous in that it can be realized into a high-voltage package
printed circuit board because a sol-gel layer is formed between
circuit wirings of circuit layers.
Inventors: |
Park; Sung Keun;
(Gyunggi-do, KR) ; Shin; Sang Hyun; (Gyunggi-do,
KR) ; Kim; Kwang Soo; (Gyunggi-do, KR) ; Choi;
Seog Moon; (Seoul, KR) |
Assignee: |
SAMSUNG ELECTRO-MECHANICS CO.,
LTD.
Gyunggi-do
KR
|
Family ID: |
44971561 |
Appl. No.: |
12/868071 |
Filed: |
August 25, 2010 |
Current U.S.
Class: |
205/50 ;
205/125 |
Current CPC
Class: |
H01L 2224/48091
20130101; C25D 5/48 20130101; H01L 25/0655 20130101; C25D 5/02
20130101; H01L 2924/13091 20130101; H01L 23/49894 20130101; H01L
2924/13034 20130101; H05K 3/108 20130101; H01L 23/142 20130101;
H05K 2203/0315 20130101; H01L 2924/181 20130101; C23C 26/00
20130101; C25D 11/02 20130101; H05K 1/0256 20130101; H01L
2224/73265 20130101; H05K 1/053 20130101; H05K 3/06 20130101; C25D
7/123 20130101; C25D 11/24 20130101; H01L 2924/13055 20130101; H01L
2924/1305 20130101; H01L 2924/13055 20130101; H01L 2924/00
20130101; H01L 2924/00014 20130101; H01L 2924/00 20130101; H01L
2924/00012 20130101; H01L 2924/00014 20130101; C25D 11/20 20130101;
C25D 11/18 20130101; H01L 21/4846 20130101; H01L 2924/19107
20130101; H01L 2924/13034 20130101; H01L 2224/48091 20130101; H01L
2924/181 20130101; H01L 2924/1305 20130101 |
Class at
Publication: |
205/50 ;
205/125 |
International
Class: |
C25D 5/02 20060101
C25D005/02; C25D 7/00 20060101 C25D007/00 |
Foreign Application Data
Date |
Code |
Application Number |
May 24, 2010 |
KR |
10-2010-0048232 |
Claims
1. A printed circuit board, comprising: a metal substrate; an
anodic oxide layer formed by anodizing the metal substrate; circuit
layers formed on the anodic oxide layer; and a first sol-gel layer
formed by applying a photocatalytic material between circuit
wirings of the circuit layers and then curing the applied
photocatalytic material.
2. The printed circuit board according to claim 1, wherein the
photocatalytic material is alumina or titanium dioxide.
3. The printed circuit board according to claim 1, wherein the
anodic oxide layer is formed only on one side and both lateral
sides of the metal substrate.
4. A method of manufacturing a printed circuit board, comprising:
providing a metal substrate; anodizing the metal substrate to form
an anodic oxide layer; forming circuit layers on one side of the
anodic oxide layer; and applying a photocatalytic material between
circuit wirings of the circuit layers and then curing the applied
photocatalytic material to form a first sol-gel layer.
5. The method according to claim 4, wherein, in the forming of the
anodic oxide layer, the anodic oxide layer is formed by anodizing
only one side and both lateral sides of the metal substrate.
6. The method according to claim 4, wherein the forming of the
circuit layers comprises: forming a seed layer on the anodic oxide
layer; forming a circuit plating layer on the seed layer by
electrolytic plating; applying an etching resist for forming
circuit patterns onto the circuit plating layer and then etching
the seed layer and the circuit plating layer; and removing the
etching resist.
7. The method according to claim 4, wherein the forming of the
circuit layers comprises: forming a seed layer on the anodic oxide
layer; applying a plating resist for forming circuit patterns onto
the seed layer; forming a circuit plating layer on the seed layer;
and removing the plating resist to expose the seed layer, and then
etching the exposed seed layer.
8. The method according to claim 4, wherein the forming of the
first sol-gel layer comprises: applying a photocatalytic material
onto the anodic oxide layer formed on the other side of the metal
substrate and then curing the applied photocatalytic material to
form a second sol-gel layer; removing the second sol-gel layer; and
removing the anodic oxide layer formed on the other side of the
metal substrate.
9. The method according to claim 4, wherein the photocatalytic
material is alumina or titanium dioxide.
10. The method according to claim 4, wherein the photocatalytic
material is applied by spraying, dipping or aerosol deposition.
11. The method according to claim 4, wherein the applied
photocatalytic material is cured at a temperature of
100.about.200.degree. C. .
Description
CROSS REFERENCE TO RELATED APPLICATION
[0001] This application claims the benefit of Korean Patent
Application No. 10-2010-0048232, filed May 24, 2010, entitled
"Printed circuit board and the method of manufacturing thereof",
which is hereby incorporated by reference in its entirety into this
application.
BACKGROUND OF THE INVENTION
[0002] 1. Technical Field
[0003] The present invention relates to a printed circuit board and
a method of manufacturing the same.
[0004] 2. Description of the Related Art
[0005] Recently, alongside the rapid advancement of semiconductor
technology necessary for signal processing, the development of
semiconductor devices has been remarkable. Simultaneously,
semiconductor packages, such as SIPs (system in packages), CSPs
(chip sized packages), FCPs (flip chip packages) and the like,
which are formed by mounting an electronic device, such as a
semiconductor device, on a printed circuit board, have been under
active development. Recently, with the advance of semiconductor
technology, the size of the die has been decreased, so that the
size of a package substrate for mounting a semiconductor device has
also been decreased, with the result that the area in which a bond
pad formed on a substrate to be connected with an electronic device
can be realized has also been decreased.
[0006] Power devices, for example, silicon-controlled rectifiers
(SCRs), power transistors, insulated gate bipolar transistors
(IGBTs), metal-oxide semiconductor field-effect transistors
(MOSFETs), power rectifiers, power regulators, inverters,
converters, and high-power semiconductor chips formed of
combinations thereof, are designed such that they are operated at a
voltage of 30.about.1000 V or at a voltage of more than 1000 V.
Since high-power semiconductor chips, unlike low-power
semiconductor chips such as logic devices and memory devices,
operate at high voltage, they are required to have a high heat
dissipation capacity and excellent insulating properties at high
pressure.
[0007] FIG. 1 is a sectional view showing a conventional high-power
semiconductor package 100. The conventional high-power
semiconductor package 100 includes: a substrate 140 including a
base layer 110, an insulation layer 120 and a circuit layer 130; a
high-power semiconductor chip 150a and a low-power semiconductor
chip 150b mounted on the circuit layer 130 of the substrate 140;
and bonding pads respectively formed in the high-power
semiconductor chip 150a and the low-power semiconductor chip 150b
and connected with the circuit layer 130 by wires 170. Here, the
circuit layer 130 is connected to leads serving as external
terminals after the wire bonding process, and then an epoxy molding
process is performed, completing the high-power semiconductor
package 100. Generally, since a high-power semiconductor package
emits a large amount of heat when it operates, a radiation plate
180 is provided on the base layer 110 of the high-power
semiconductor package. The radiation plate 180 is generally made of
a metal having high thermal conductivity. The radiation plate 180
may be adhered on the base layer 110 by an adhesive layer 185.
Therefore, the conventional high-power semiconductor package 100
provided with the radiation plate 180 is problematic in that the
base layer 110 is additionally required in order to provide the
radiation plate 180, its thickness cannot be easily adjusted
because the radiation plate 180 is additionally provided, and its
size cannot be easily decreased. Further, the conventional
high-power semiconductor package 100 is problematic in that the
rapidity and reliability of the processes are deteriorated because
the process of attaching the base layer 110 must be performed in
addition to the process of mounting a semiconductor chip using a
lead frame and a wire bonding process. Further, the conventional
high-power semiconductor package 100 is problematic in that the
total manufacturing cost thereof is increased because the base
layer 180 is provided and the adhesive layer 185 is used.
Furthermore, the conventional high-power semiconductor package 100
is problematic in that the desired heat dissipation effect cannot
be sufficiently realized because the rate of heat radiation
possible using the radiation plate 180 is limited.
[0008] Meanwhile, in the case of a printed circuit board for a
semiconductor package, conventionally, an anodic oxide layer formed
on an aluminum substrate has been used as an insulation layer. In
this case, there is a problem in that an electric short occurs
between the circuit wirings of a circuit layer. Moreover, there is
a problem in that an electric short occurs due to the instability
of the insulation layer during a process of precipitating residues
of a metal layer for forming a circuit layer or additives (Mg, Si,
Cu and the like) in anodic oxidation.
SUMMARY OF THE INVENTION
[0009] Accordingly, the present invention has been devised to solve
the above-mentioned problems, and the present invention provides a
printed circuit board, which can improve heat radiation performance
and can prevent an electric short from occurring between the
circuit wirings of a circuit layer because a sol-gel layer is
formed between the circuit wirings of the circuit layer and which
can increase the heat radiation effect because an anodic oxide
layer is removed from one side of a metal substrate, that is, the
one side thereof not provided with a circuit layer, and provides a
method of manufacturing the same.
[0010] An aspect of the present invention provides a printed
circuit board, including: a metal substrate; an anodic oxide layer
formed by anodizing the metal substrate; circuit layers formed on
the anodic oxide layer; and a first sol-gel layer formed by
applying a photocatalytic material between circuit wirings of the
circuit layers and then curing the applied photocatalytic
material.
[0011] Here, the photocatalytic material may be alumina or titanium
dioxide.
[0012] Further, the anodic oxide layer may be formed only on one
side and both lateral sides of the metal substrate.
[0013] Another aspect of the present invention provides a method of
manufacturing a printed circuit board, including: providing a metal
substrate; anodizing the metal substrate to form an anodic oxide
layer; forming circuit layers on one side of the anodic oxide
layer; and applying a photocatalytic material between circuit
wirings of the circuit layers and then curing the applied
photocatalytic material to form a first sol-gel layer.
[0014] Here, in the forming of the anodic oxide layer, the anodic
oxide layer may be formed by anodizing only one side and both
lateral sides of the metal substrate.
[0015] Further, the forming of the circuit layers may include:
forming a seed layer on the anodic oxide layer; forming a circuit
plating layer on the seed layer by electrolytic plating; applying
an etching resist for forming circuit patterns onto the circuit
plating layer and then etching the seed layer and the circuit
plating layer; and removing the etching resist.
[0016] Further, the forming of the circuit layers may include:
forming a seed layer on the anodic oxide layer; applying a plating
resist for forming circuit patterns onto the seed layer; forming a
circuit plating layer on the seed layer; and removing the plating
resist to expose the seed layer, and then etching the exposed seed
layer.
[0017] Further, the forming of the first sol-gel layer may include:
applying a photocatalytic material onto the anodic oxide layer
formed on the other side of the metal substrate and then curing the
applied photocatalytic material to form a second sol-gel layer;
removing the second sol-gel layer; and removing the anodic oxide
layer formed on the other side of the metal substrate.
[0018] Further, the photocatalytic material may be alumina or
titanium dioxide.
[0019] Further, the photocatalytic material may be applied by
spraying, dipping or aerosol deposition.
[0020] Further, the applied photocatalytic material may be cured at
a temperature of 100.about.200.degree. C.
[0021] Various objects, advantages and features of the invention
will become apparent from the following description of embodiments
with reference to the accompanying drawings.
[0022] The terms and words used in the present specification and
claims should not be interpreted as being limited to typical
meanings or dictionary definitions, but should be interpreted as
having meanings and concepts relevant to the technical scope of the
present invention based on the rule according to which an inventor
can appropriately define the concept of the term to describe the
best method he or she knows for carrying out the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The above and other objects, features and advantages of the
present invention will be more clearly understood from the
following detailed description taken in conjunction with the
accompanying drawings, in which:
[0024] FIG. 1 is a sectional view showing a conventional high-power
semiconductor package;
[0025] FIG. 2 is a sectional view showing a printed circuit board
according to a first embodiment of the present invention;
[0026] FIG. 3 is a sectional view showing a printed circuit board
according to a second embodiment of the present invention;
[0027] FIGS. 4 to 11 are sectional views showing a method of
manufacturing a printed circuit board according to a third
embodiment of the present invention; and
[0028] FIGS. 12 to 19 are sectional views showing a method of
manufacturing a printed circuit board according to a fourth
embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0029] The objects, features and advantages of the present
invention will be more clearly understood from the following
detailed description of preferred embodiments taken in conjunction
with the accompanying drawings. Throughout the accompanying
drawings, the same reference numerals are used to designate the
same or similar components, and redundant descriptions thereof are
omitted. Further, in the following description, the terms "first",
"second", "one side", "the other side" and the like are used to
differentiate a certain component from other components, but the
configuration of such components should not be construed to be
limited by the terms. Further, in the description of the present
invention, when it is determined that the detailed description of
the related art would obscure the gist of the present invention,
the description thereof will be omitted.
[0030] Hereinafter, preferred embodiments of the present invention
will be described in detail with reference to the attached
drawings.
[0031] FIG. 2 is a sectional view showing a printed circuit board
according to a first embodiment of the present invention. As shown
in FIG. 2, the printed circuit board according to a first
embodiment of the present invention includes: a metal substrate 10;
an anodic oxide layer 20 formed by anodizing the metal substrate
10; circuit layers 30 and 31 formed on the anodic oxide layer 20;
and a first sol-gel layer 50 formed by applying a photocatalytic
material between circuit wirings of the circuit layers 30 and 31
and then curing the applied photocatalytic material.
[0032] The metal substrate 10 is made of a material which can be
formed into the anodic oxide layer 10 by anodizing, and which
exhibits a heat radiation effect. The metal substrate 10 may be
made of aluminum, magnesium, titanium or the like. The raw material
of the metal substrate 10 is not particularly limited as long as it
can be formed into the anodic oxide layer by anodizing and has heat
radiation characteristics.
[0033] The anodic oxide layer 20 is formed by anodizing the metal
substrate 10. That is, the anodic oxide layer 20 is formed in a
uniform thickness by accelerating the oxidation of the metal
substrate 10 using the metal substrate 10 as an anode in a specific
solution such as a sulfuric acid solution or the like. Here, the
thickness of the anodic oxide layer 20 is determined depending on
the degree and period of anodizing, and the anodizing of the metal
substrate 10 is performed within the range necessary for forming
the anodic oxide layer 20 having insulation characteristics.
[0034] The circuit layers 30 and 31 are formed on the anodic oxide
layer 20. The circuit layers 30 and 31 may be formed in a
subtractive manner or an additive manner, and may be formed in
various manners in addition to the subtractive or additive
manner.
[0035] The first sol-gel layer 50 is formed by applying a
photocatalytic material between circuit wirings of the circuit
layers 30 and 31 and then curing the applied photocatalytic
material. Here, the first sol-gel layer 50 is formed by a sol-gel
process. The sol-gel process is a process of preparing "sol-gel
derived ceramics". Particularly, in the sol-gel process, the
reaction rate of reactants and the structure of a final product are
changed depending on various factors, such as the ratio of water
and alkoxide, the pH of a solution, the kind and amount of a
solvent and the like. In the sol-gel process, reactions which are
sensitive to such a degree that experimental results can be changed
with respect to each experimenter arise. In the formation of the
first sol-gel layer 50, it is important to control a heat treatment
temperature and a cooling rate. Meanwhile, in the sol-gel process,
an alcohol solvent dispersed with nanosized ceramic powder is
coated and then heat-treated, and, in this case, only the ceramic
powder excluding organic components is coated, thus forming the
first sol-gel layer 50. The first sol-gel layer 50 formed in this
way has predetermined adhesivity and serves to prevent the metal
substrate 10 from being damaged. The first sol-gel layer 50 may be
formed by spraying, dipping or aerosol deposition. The first
sol-gel layer 50 may be formed using a photocatalytic material.
That is, the first sol-gel layer 50 may be formed by applying the
photocatalytic material and then curing the applied photocatalytic
material. The photocatalytic material may be made of titanium
dioxide (TiO.sub.2) or alumina (Al.sub.2O.sub.3).
[0036] The curing of the photocatalytic material is performed to
remove organic components, and may be performed at a temperature of
100.about.200.degree. C.
[0037] FIG. 3 is a sectional view showing a printed circuit board
according to a second embodiment of the present invention. As shown
in FIG. 3, the printed circuit board according to a second
embodiment of the present invention includes: a metal substrate 10;
an anodic oxide layer 20 formed by anodizing the metal substrate
10; circuit layers 30 and 31 formed on the anodic oxide layer 20;
and a first sol-gel layer 50 formed by applying a photocatalytic
material between circuit wirings of the circuit layers 30 and 31
and then curing the applied photocatalytic material. Here, the
anodic oxide layer 20 is formed only on one side and both lateral
sides of the metal substrate 10. Therefore, the printed circuit
board according to a second embodiment of the present invention is
advantageous in that the anodic oxide layer 20 is not formed on the
other side of the metal substrate 10, so that the other side
thereof is exposed, thereby improving the heat radiation effect
thereof.
[0038] In the second embodiment of the present invention, in order
to further improve the radiation performance of the printed circuit
board, the other side of the metal substrate 10 may be exposed by
removing the anodic oxide layer 20 formed thereon. Although the
anodic oxide layer generally has higher radiation performance than
an insulation layer, the radiation performance of the printed
circuit board can be further improved by directly exposing the
other side of the metal substrate 10. Detailed description of
constituents other than the anodic oxide layer 20 will be omitted
because it overlaps with their descriptions in the first embodiment
of the present invention.
[0039] FIGS. 4 to 11 are sectional views showing a method of
manufacturing a printed circuit board according to a third
embodiment of the present invention. Particularly, in the method,
circuit layers 30 and 31 are formed in a subtractive manner.
Hereinafter, the method of manufacturing a printed circuit board
according to a third embodiment of the present invention will be
described with reference to FIGS. 4 to 11. The description of the
constitution and function of the printed circuit board overlapping
with those of the first and second embodiments of the present
invention will be omitted.
[0040] The method of manufacturing a printed circuit board
according to a third embodiment of the present invention includes
the processes of: (A) providing a metal substrate 10; (B) anodizing
the metal substrate 10 to form an anodic oxide layer 20; (C)
forming circuit layers 30 and 31 on one side of the anodic oxide
layer; and (D) applying a photocatalytic material between circuit
wirings of the circuit layers 30 and 31 and then curing the applied
photocatalytic material to form a first sol-gel layer 50.
[0041] Hereinafter, the method of manufacturing a printed circuit
board according to a third embodiment of the present invention will
be described in more detail with reference to FIGS. 4 to 11.
[0042] FIG. 4 shows the processes of: (A) providing a metal
substrate 10; and (B) forming an anodic oxide layer 20 by anodizing
the metal substrate 10. Here, the metal substrate 10 is anodized to
form the anodic oxide layer 20 over the entire surface thereof, and
may be made of a material having heat radiation properties. For
example, the metal substrate may be made of aluminum, magnesium,
titanium or the like. The anodic oxide layer 20 has a uniform
thickness because the oxidation of the metal substrate 10 was
accelerated using the metal substrate 10 as an anode in a specific
solution such as a sulfuric acid solution or the like. Here, the
thickness of the anodic oxide layer 20 is determined depending on
the period and degree of anodizing, and the anodizing of the metal
substrate 10 is performed within the range necessary for forming
the anodic oxide layer 20 having insulation characteristics.
[0043] FIGS. 5 to 8 show the process of (C) forming circuit layers
30 and 31 on the anodic oxide layer 20. Particularly, in this
embodiment, since the circuit layers 30 and 31 are formed in a
subtractive manner, a method of manufacturing a printed circuit
board in a subtractive manner will be described. The process of
forming the circuit layers 30 and 31 includes the steps of: (C-1)
forming a seed layer 31 on the anodic oxide layer 20; (C-2) forming
a circuit plating layer 30 on the seed layer 31 by electrolytic
plating; (C-3) applying an etching resist 40 for forming circuit
patterns onto the circuit plating layer 30 and then etching the
seed layer 31 and the circuit plating layer 30; and (C-4) removing
the etching resist 40.
[0044] FIG. 5 shows the steps of (C-1) forming a seed layer 31 on
the anodic oxide layer 20 and (C-2) forming a circuit plating layer
30 on the seed layer 31 by electrolytic plating. The seed layer 31
serves as an incoming line for electrolytic plating, and may be
formed by wet plating (electroless plating) or dry plating
(sputtering) in order to form the circuit plating layer 30 thereon
later. The seed layer 31 is formed, and then the circuit plating
layer 30 is formed on the seed layer 31 by electrolytic plating,
thus forming the circuit layers 30 and 31 having the desired
thickness.
[0045] FIGS. 6 and 7 show the step of (C-3) applying an etching
resist 40 for forming circuit patterns onto the circuit plating
layer 30 and then etching the seed layer 31 and the circuit plating
layer 30. As shown in FIG. 6, the etching resist 40 is applied onto
the circuit plating layer 30 in order to form the circuit layers 30
and 31. As shown in FIG. 7, the seed layer 31 and the circuit
plating layer 30 are etched to form a circuit pattern. In this
case, the circuit pattern may be formed by wet etching or dry
etching. However, the etching of the seed layer 31 and the circuit
plating layer 30 is not limited thereto, and the circuit pattern
may be formed by other etching methods.
[0046] FIG. 8 shows the step of (C-4) removing the etching resist
40. As shown in FIG. 8, the etching resist 40 is removed, thus
forming the desired circuit layers 30 and 31 on the anodic oxide
layer 20.
[0047] FIGS. 9 to 11 shows the process of (D) applying a
photocatalytic material between circuit wirings of the circuit
layers 30 and 31 and then curing the applied photocatalytic
material to form a first sol-gel layer 50. Here, the process of
forming the first sol-gel layer 50 may include the steps of: (D-1)
applying a photocatalytic material onto the anodic oxide layer 20
formed on the other side of the metal substrate and then curing the
applied photocatalytic material to form a second sol-gel layer 51;
(D-2) removing the second sol-gel layer; and (D-3) removing the
anodic oxide layer 20 formed on the other side of the metal
substrate.
[0048] FIG. 9 shows the steps of: (D) applying a photocatalytic
material between circuit wirings of the circuit layers 30 and 31
and then curing the applied photocatalytic material to form a first
sol-gel layer 50; and (D-1) applying a photocatalytic material onto
the anodic oxide layer 20 formed on the other side of the metal
substrate and then curing the applied photocatalytic material to
form a second sol-gel layer 51. In the step of (D), a printed
circuit board may be finally formed, or may be formed by
simultaneously or sequentially attaching the first sol-gel layer 50
and the second sol-gel layer 51 to both sides of the metal
substrate 10. Descriptions of the formation of the first sol-gel
layer 50 and the second sol-gel layer 51 and the application and
curing of the photocatalytic material will be omitted because they
are the same as their descriptions in the first and second
embodiments of the present invention.
[0049] FIG. 10 shows the step of (D-2) removing the second sol-gel
layer 51. Here, the removing of the second sol-gel layer 51 is
conducted in order to improve the radiation performance of the
printed circuit board. FIG. 11 shows the step of (D-3) removing the
anodic oxide layer 20 formed on the other side of the metal
substrate. Here, the radiation performance of the printed circuit
board can be more improved because the metal substrate 10 is
directly exposed by removing the anodic oxide layer 20.
[0050] FIGS. 12 to 19 are sectional views showing a method of
manufacturing a printed circuit board according to a fourth
embodiment of the present invention. Particularly, in the method,
circuit layers 30 and 31 are formed in an additive manner.
Hereinafter, the method of manufacturing a printed circuit board
according to a fourth embodiment of the present invention will be
described with reference to FIGS. 12 to 19. The description of the
manufacturing processes overlapping with those of the third
embodiment of the present invention will be omitted.
[0051] The method of manufacturing a printed circuit board
according to a fourth embodiment of the present invention includes
the processes of: (A) providing a metal substrate 10; (B) anodizing
the metal substrate 10 to form an anodic oxide layer 20; (C)
forming circuit layers 30 and 31 on one side of the anodic oxide
layer; and (D) applying a photocatalytic material between circuit
wirings of the circuit layers 30 and 31 and then curing the applied
photocatalytic material to form a first sol-gel layer 50.
[0052] Hereinafter, the method of manufacturing a printed circuit
board according to a fourth embodiment of the present invention
will be described in more detail with reference to FIGS. 12 to
19.
[0053] FIG. 12 shows the processes of: (A) providing a metal
substrate 10; and (B) forming an anodic oxide layer 20 by anodizing
the metal substrate 10. Detailed description of these processes
will be omitted because they are the same as those of the third
embodiment of the present invention.
[0054] FIGS. 13 to 16 show the process of (C) forming circuit
layers 30 and 31 on the anodic oxide layer 20. Particularly, in
this embodiment, since the circuit layers 30 and 31 are formed in
an additive manner, a method of manufacturing a printed circuit
board in a subtractive manner will be described. The process of
forming the circuit layers 30 and 31 includes the steps of: (C-1)
forming a seed layer 31 on the anodic oxide layer 20; (C-2)
applying a plating resist 41 for forming circuit patterns onto the
seed layer 31; (C-3) forming a circuit plating layer 30 on the seed
layer 31; and (C-4) removing the plating resist 41 to expose the
seed layer 31 and then etching the exposed seed layer 31.
[0055] FIG. 13 shows the steps of (C-1) forming a seed layer 31 on
the anodic oxide layer 20 and (C-2) applying a plating resist 41
for forming circuit patterns onto the seed layer 31. The seed layer
31 serves as an incoming line for electrolytic plating, and may be
formed by wet plating (electroless plating) or dry plating
(sputtering) in order to form the circuit plating layer 30 thereon
later. The seed layer 31 is formed, and then the circuit plating
layer 30 is formed on the seed layer 31 by electrolytic plating.
The plating resist 41 is applied onto the seed layer 31 in order to
form the desired circuit patterns.
[0056] FIG. 14 shows the step of (C-3) forming a circuit plating
layer 30 on the seed layer 31. Here, the circuit plating layer 30
is formed on the portion of the seed layer 31 which was not coated
with the plating resist 41.
[0057] FIG. 15 shows the step of removing the plating resist 41 to
expose the seed layer 31, and FIG. 16 shows the step of etching the
exposed seed layer 31. Here, the plating resist 41 is removed, and
then the seed layer 31 exposed between circuit patterns is
selectively etched, thereby finally forming circuit layers 30 and
31.
[0058] FIG. 17 shows the steps of: (D) applying a photocatalytic
material between circuit wirings of the circuit layers 30 and 31
and then curing the applied photocatalytic material to form a first
sol-gel layer 50; and (D-1) forming a second sol-gel layer 51 on
the other side of the metal substrate 10, on which the circuit
layers 30 and 31 are not formed. Subsequently, as shown in FIG. 18,
the second sol-gel layer 51 formed on the other side of the metal
substrate 10 is removed, thus completing a printed circuit board
(step D-2). Moreover, as shown in FIG. 19, the anodic oxide layer
20 formed on the other side of the metal substrate 10 is removed to
expose the other side thereof, thus improving the radiation
performance of the printed circuit board. Detailed description of
other processes will be omitted because they are the same as those
shown in FIGS. 9 to 11 of the third embodiment of the present
invention.
[0059] As described above, according to the present invention, an
anodic oxide layer formed on a metal substrate is used as an
insulation layer, thus improving the radiation performance of the
printed circuit board.
[0060] Further, according to the present invention, a sol-gel layer
is formed between circuit wirings of circuit layers, thus realizing
a high-voltage package printed circuit board.
[0061] Further, according to the present invention, a sol-gel layer
is formed between circuit wirings of circuit layers, thus
preventing the instability of the insulation layer during a process
of precipitating residues of a metal layer for forming a circuit
layer or additives (Mg, Si, Cu and the like) in anodic
oxidation.
[0062] Furthermore, according to the present invention, the
insulation voltage of the printed circuit board can be improved
depending on the raw material and thickness of a sol coating layer
without changing the process conditions of anodization which forms
the anodic oxide layer.
[0063] Although the preferred embodiments of the present invention
have been disclosed for illustrative purposes, those skilled in the
art will appreciate that various modifications, additions and
substitutions are possible, without departing from the scope and
spirit of the invention as disclosed in the accompanying claims.
Simple modifications, additions and substitutions of the present
invention belong to the scope of the present invention, and the
specific scope of the present invention will be clearly defined by
the appended claims.
* * * * *