U.S. patent application number 12/929260 was filed with the patent office on 2011-06-16 for printed circuit board manufacturing system.
This patent application is currently assigned to Samsung Electro-Mechanics Co., Ltd.. Invention is credited to Seok-Hwan Ahn, Chung-Woo Cho, Soon-Jin Cho, Byung-Bae Seo, Ki-Young Yoo.
Application Number | 20110138616 12/929260 |
Document ID | / |
Family ID | 40294327 |
Filed Date | 2011-06-16 |
United States Patent
Application |
20110138616 |
Kind Code |
A1 |
Cho; Chung-Woo ; et
al. |
June 16, 2011 |
Printed circuit board manufacturing system
Abstract
A printed circuit board manufacturing system that uses a
substrate that includes a pad and an insulation layer covering the
pad. The system includes an image sensor part acquiring an image of
the substrate, a control part generating a control signal to form a
via hole, and a laser applying part applying a laser, considering
the control signal, to the part of the insulation layer that
corresponds to the location information of the pad.
Inventors: |
Cho; Chung-Woo; (Suwon-si,
KR) ; Cho; Soon-Jin; (Suwon-si, KR) ; Seo;
Byung-Bae; (Cheongju-si, KR) ; Yoo; Ki-Young;
(Suwon-si, KR) ; Ahn; Seok-Hwan; (Suwon-si,
KR) |
Assignee: |
Samsung Electro-Mechanics Co.,
Ltd.
Suwon
KR
|
Family ID: |
40294327 |
Appl. No.: |
12/929260 |
Filed: |
January 11, 2011 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
12010195 |
Jan 22, 2008 |
|
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12929260 |
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Current U.S.
Class: |
29/829 |
Current CPC
Class: |
H05K 2201/09918
20130101; H05K 3/4644 20130101; H05K 1/0269 20130101; H05K 3/0035
20130101; H05K 3/4679 20130101; H05K 2201/0108 20130101; Y10T
29/49124 20150115; H05K 3/0008 20130101 |
Class at
Publication: |
29/829 |
International
Class: |
H05K 3/00 20060101
H05K003/00 |
Foreign Application Data
Date |
Code |
Application Number |
Jul 25, 2007 |
KR |
10-2007-0074788 |
Claims
1. A printed circuit board manufacturing system, using a substrate
that comprises a pad and an insulation layer covering the pad,
comprising: an image sensor part to acquire an image of the
substrate; a control part to generate a control signal to form a
via hole; and a laser applying part to apply a laser, considering
the control signal, to a part of the insulation layer that
corresponds to location information of the pad.
2. The printed circuit board manufacturing system of claim 1,
wherein the control part extracts a center coordinate of an area
that corresponds to the pad in the image of the substrate.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a U.S. divisional application filed
under 37 USC 1.53(b) claiming priority benefit of U.S. Ser. No.
12/010,195 filed Jan. 22, 2008, which claims earlier priority
benefit to Korean Patent Application No. 10-2007-0074788 filed with
the Korean Intellectual Property Office on Jul. 25, 2007, the
disclosures of which are incorporated herein by reference.
BACKGROUND
[0002] 1. Field
[0003] The present invention relates to a printed circuit board
manufacturing system and a manufacturing method thereof.
[0004] 2. Description of the Related Art
[0005] Miniaturization of electronic device is accomplished by
miniaturization of electronic parts. Miniaturization of electronic
parts does not mean minimized function. Electronic parts must have
same functions in limited size. For this, researches for larger
integrity have been accomplished.
[0006] For larger integrity, structure of printed circuit board is
improved from single-layered to multi-layered. Multi-layered
printed circuit board may be manufactured by forming a circuit
pattern substrate and then forming another circuit pattern
substrate on it. Multi-layered printed circuit board may require
interconnections between circuits on each substrate layers.
[0007] This interconnection may be provided by pads and vias.
Connections between pads and vias will be described referring to
FIGS. 1a and 1b. FIGS. 1a and 1b are a front view and an enlarged
cross-sectional view of printed circuit board according to prior
art. In FIGS. 1a and 1b are illustrated an insulation plate 100, a
fiducial mark 110, a pad 120 and a via 130.
[0008] Align distance between the pad 120 and the via 130 is notes
as d. This align distance d is defined as distance between center
of pad 120 and center of via 130. For large d, electronic
connection between the pad 120 and the via 130 may not be
guaranteed.
[0009] Guaranteeing the electronic connection between the pad 120
and the via 130 may require large-sized pad. This may be an
obstruction for integration of circuitry on substrate, by limiting
flexibility of substrate design.
[0010] FIGS. 2a and 2b are a front view of a substrate that
undergoes shape compensation according to prior art. In FIGS. 2a
and 2b are illustrated an insulation plate 200, 202, a fiducial
mark 210, 212, a pad 220, 222.
[0011] Referring to FIG. 2 (a), the shape of the insulation plate
200 in design data is shown. Referring to FIG. 2 (b), the shape of
the insulation plate 202 in manufactured result is overlapped on
the shape of the insulation plate 200.
[0012] In this case, using the information of pad 220 in design
data may not guarantee the electronic connection between via and
pad.
[0013] There were some researches on linear scale compensation by
measuring location of fiducial marks 210, 212 for improved via-pad
conformity. Meanwhile, linear scale compensation on the information
about limited numbers of fiducial marks can not deal with the
complicated non-linear deformation of substrates that occurs during
the manufacturing process.
SUMMARY
[0014] An aspect of the invention is to provide a printed circuit
board manufacturing system and a manufacturing method thereof,
providing improved process conformity by generating a control
signal for via hole forming on a measured pad location
information.
[0015] One aspect of the invention provides a method of
manufacturing printed circuit board, comprising: providing a
substrate that comprises a pad and an insulation layer covering the
pad; acquiring an image of the substrate; acquiring location
information of the pad by analyzing the image of the substrate;
forming a via hole by removing a part of the insulation layer that
corresponds the location information of the pad; and forming a via
by filling the via hole with a conductive material.
[0016] Acquiring location information of the pad may comprises
extracting a center coordinate of area that corresponds to the pad
in the image of the substrate.
[0017] Forming the via hole comprises laser drilling process.
Forming the via by laser drilling process may comprises generating
a control signal for via hole forming based on the location
information of the pad and applying laser to the part of the
insulation layer that corresponds to the location information of
the pad, considering the control signal.
[0018] Another aspect of the invention provides a printed circuit
board manufacturing system, using a substrate that comprises a pad
and an insulation layer covering the pad, comprising; an image
sensor part for acquiring an image of the substrate, a control part
for generating a control signal for via hole forming and a laser
applying part for applying laser, considering the control signal,
to the part of the insulation layer that corresponds to the
location information of the pad.
[0019] Additional aspects and advantages of the present invention
will be set forth in part in the description which follows, and in
part will be obvious from the description, or may be learned by
practice of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
[0020] FIGS. 1a and 1b are a front view and an enlarged
cross-sectional view of printed circuit board according to prior
art.
[0021] FIGS. 2a and 2b are a front view of a substrate that
undergoes shape compensation according to prior art.
[0022] FIG. 3 is a flowchart of printed circuit board manufacturing
method according to a disclosed embodiment of the invention.
[0023] FIGS. 4a, 4b, 4c and 4d are a diagram of printed circuit
board manufacturing method according to a disclosed embodiment of
the invention.
[0024] FIG. 5 is a schematic illustration of printed circuit board
manufacturing system according to a disclosed embodiment of the
invention.
[0025] FIGS. 6a, 6b and 6c are distribution illustrations of number
of via holes to distance between real via hole and ideally
conformed via hole according to prior art and a disclosed
embodiment of the invention.
DESCRIPTION OF EMBODIMENTS
[0026] Embodiments of a printed circuit board manufacturing system
and a manufacturing method thereof according to certain aspects of
the invention will be described below in more detail with reference
to the accompanying drawings. In the description with reference to
the accompanying drawings, those components are rendered the same
reference number that are the same or are in correspondence
regardless of the figure number, and redundant explanations are
omitted. Also, the basic principles will first be described before
discussing the preferred embodiments of the invention.
[0027] Reference will now be made in detail to the embodiments of
the present general inventive concept, examples of which are
illustrated in the accompanying drawings, wherein like reference
numerals refer to the like elements throughout. The embodiments are
described below in order to explain the present general inventive
concept by referring to the figures.
[0028] FIG. 3 is a diagram of printed circuit board manufacturing
method according to a disclosed embodiment of the invention. FIG. 4
is a flowchart of printed circuit board manufacturing method
according to a disclosed embodiment of the invention. In FIG. 3 and
FIG. 4, are illustrated a first insulation layer 400, a pad 402, a
second insulation layer 404, a via hole 406, a via 408, an image
sensor 410, a laser applying part 420, a laser source 422 and a
galvanometer 424.
[0029] Providing substrate including pad S310 will be described,
referring to FIG. 4 (a). The first insulation layer 400 may be
composed of polymer resin (polyimide, epoxy and the likes). The pad
402 is a part of circuit pattern formed in the first insulation
layer 400. The pad 402 may be connected electronically to other
circuit patterns formed in the first insulation layer 400.
[0030] The circuit pattern comprising the pad 402 may be formed by
subtractive process and additive process. The subtractive process
is patterning process by removing unnecessary part of conductive
material applied on an insulation layer. The additive process is
patterning process by non-electrical plating method applied on an
insulation layer. The semi-additive process is patterning process
using electrical plating process and etching process after
non-electrical plating. In addition, pre-formed circuit pattern may
be buried to the first insulation layer. The pattern may be
composed of metal material as Cu and may have Au coating or Sn
coating on it.
[0031] The second insulation layer 404 is covering the pad 402. The
second insulation layer 404 may be formed by applying insulation
material on the first insulation layer 400 comprising the pad 402.
The second insulation layer 404 may be composed of same materials
that composing the first insulation layer 400.
[0032] Meanwhile, a printed circuit board made by present
embodiment may be multi-layered and there may be another insulation
layer, comprising circuit pattern, under the first insulation layer
400.
[0033] Acquiring image of substrate including pad S320 will be
described referring FIG. 4 (b). the image of the substrate may be
acquired by the image sensor 410 installed in front of the
substrate.
[0034] For example, the image sensor 410 may be a CCD camera.
Because that materials composing the first and the second
insulation layer 400, 404 differ from materials composing the pad
402 in optical characteristics, the first and the second insulation
layer 400, 404 may be distinguished from pad 402 in the image of
the substrate. In addition, high transparency of the second
insulation layer 404 for wavelength used by the image sensor 410
may provide relatively clear image.
[0035] The acquired image of the substrate may include information
about circuit pattern including the pad 402. Then, defining an area
about the pad 402, in the image of total circuit pattern image, may
be required.
[0036] location information of the pad may be acquired by
extracting center coordinate of the pad area, defined like this.
For example, the center coordinate of the pad area may be extracted
by converting the pad area to black and white image and calculating
center of mass in the converted area.
[0037] In the step S320 the location of the pas 402 may be directly
measured, not conjectured by scale compensation.
[0038] Meanwhile, a substrate may comprise a fiducial mark, and
location information of the fiducial mark may be acquired from the
image of the substrate. The location information of the fiducial
mark may be an origin in the location information of the pad. Also,
the location information of the fiducial mark may be an assistant
information that identifies the align direction of the
substrate.
[0039] Forming via hole by laser drilling S330 will be described
referring FIG. 4 (c). The via hole 406 is formed by applying laser
to the second insulation layer 404, using the laser applying part
420 comprising the laser source 422 and the galvanometer 424.
[0040] As mentioned above, information about laser applying point
may be acquired by analyzing the image of the substrate from the
image sensor 410. This step S330 may improve conformity between the
pad 402 and the via hole 406 by forming the via hole 406, using the
measured location information of the pad.
[0041] A CO2 laser, a YAG laser and excimer laser may be used as a
laser source in the present embodiment. Also, a pulse laser may be
utilized for the laser source stability.
[0042] Forming via by filling via hole with conductive material
S340 will be described referring FIG. 4 (d). The via 408 may be
formed by filling the via hole 406 with a conductive material.
[0043] The via 408 may be utilized to provide electrical connection
to circuits on the substrate that will be formed in subsequent
process and to form external electrode. In case that additional
circuit pattern layer is formed on the substrate comprising the via
408, additional process forming a insulation layer covering the via
408 and process forming circuit pattern on the insulation layer may
be required.
[0044] Conductive material filling process may be accomplished by
electrical plating, screen printing and etc. the conductive
material may be metal like Cu and Au, and conductive polymer.
Conductive material comprising corrosion-resistive element like Ni
may be utilized when the via 408 forms the external electrode.
[0045] FIG. 5 is a schematic illustration of printed circuit board
manufacturing system according to a disclosed embodiment of the
invention. In FIG. 5 are illustrated a substrate 500, a pad 502, a
via hole 504, an image sensor part 510, a laser applying part 520,
a control part 530 and a support part 540.
[0046] The image sensor part 510 acquires the image of the
substrate including the pad and transfer the image to the control
part. As mentioned above, the image sensor part 510 may be
configured with a CCD camera.
[0047] Meanwhile, the wavelength utilized by the image sensor part
may not be in visible light band. To distinguish the circuit
pattern comprising the pad 502 form the insulation layer, infrared
and x-ray band light may be applied to the substrate in image
acquisition.
[0048] The control part 530 generates a control signal for via hole
forming by analyzing the image from the image sensor part 510.
[0049] The location information of the pad 502 may be acquired by
analyzing the image of the substrate. For this, the image
processing mentioned above, referring to FIG. 3 and FIG. 4, may be
accomplished.
[0050] The control signal for via hole forming may comprise a
control signal for galvanometer angle control and a control signal
for laser power control. Controlling the driving angle of the
galvanometer, laser beam could be controlled. The laser power
reduction, for outside of the via hole area, may prevent
unnecessary removal of the insulation layer.
[0051] The laser applying part 520 may apply the laser to the
substrate 500 according to the control signal for via hole forming
from the control part 530. In this embodiment, the laser applying
part 520 comprises the laser source 522 and the galvanometer
524.
[0052] The galvanometer 524 scans the laser in x-y directions on
the substrate by controlling the angle of a reflection body coupled
to a driving motor. The laser source generates laser beam that
could remove the insulation layer of the substrate 500.
[0053] As mentioned above, the control signal for via hole forming
comprises a control signal for angle control of the galvanometer
524 and a control signal for power control of the laser source
522.
[0054] Meanwhile, a laser applying part comprising a galvanometer
is used in this embodiment and the configuration of optical system
may be modified. For example, an optical system that moves a
reflection body and a laser source in x-y plane may be
configured.
[0055] Meanwhile, the printed circuit board manufacturing system
500 may comprise an image acquisition stage by the image sensor 510
and a laser process stage by the laser applying part 520. These two
stages may handle different substrates simultaneously.
[0056] The support part 540 supports the substrate 500 during the
processes. If necessary, the substrate 500 may be carried with the
support part coupled.
[0057] FIG. 6 is distribution illustrations of number of via holes
to distance between real via hole and ideally conformed via hole
according to prior art and a disclosed embodiment of the invention.
In FIG. 6 are illustrated a substrate 600, an ideally conformed via
hole 602 and a real via hole 604.
[0058] The ideally conformed via hole 602 is a perfectly conformed
via hole to a pad on the substrate. The center location of the
ideally conformed via hole 602 matches perfectly with the center
location of the pad on the substrate. The real via hole 604 may be
separated from the ideally conformed via hole 602, by distance d2,
due to the errors in process.
[0059] FIG. 6 (b) illustrates a distribution of number of the via
holes to distance d2, according to prior art. FIG. 6 (c)
illustrates a distribution of number of the via holes to distance
d2, according to a embodiment of the present invention.
[0060] Referring to FIG. 6 (b), most via holes have separation
distance larger than 10 micrometer. Meanwhile, Referring to FIG. 6
(c), the separation distance remains smaller than 10 micrometer.
Like this, the conformity between a via and a pad may be improved
by considering measured pad location information for via hole
forming process.
[0061] Meanwhile, FIG. 6 (c) may be understood as an example, not
limiting the benefit of the present invention.
[0062] According to certain embodiments of the invention as set
forth above, the printed circuit board manufacturing system and a
manufacturing method thereof may allow provides improved process
conformity, even if the substrate has partial or nonlinear
deformation, by considering the location information of the pad in
the via hole forming. The improved conformity may allow more
flexibility to substrate design and more integrity for circuitries
on printed circuit board.
[0063] While the above description has pointed out novel features
of the invention as applied to various embodiments, the skilled
person will understand that various omissions, substitutions, and
changes in the form and details of the device or process
illustrated may be made without departing from the scope of the
invention. Therefore, the scope of the invention is defined by the
appended claims rather than by the foregoing description. All
variations coming within the meaning and range of equivalency of
the claims are embraced within their scope.
* * * * *