U.S. patent application number 12/426276 was filed with the patent office on 2010-02-25 for method for manufacturing printed circuit boards.
This patent application is currently assigned to FOXCONN ADVANCED TECHNOLOGY INC.. Invention is credited to HUNG-YI CHANG, YU-CHENG HUANG, CHENG-HSIEN LIN, CHUNG-JEN TSAI.
Application Number | 20100044237 12/426276 |
Document ID | / |
Family ID | 41695342 |
Filed Date | 2010-02-25 |
United States Patent
Application |
20100044237 |
Kind Code |
A1 |
TSAI; CHUNG-JEN ; et
al. |
February 25, 2010 |
METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARDS
Abstract
A method for manufacturing a PCB is related. The method includes
providing a substrate with two opposite conductive layers and
defining a through hole passing through the two conductive layers;
forming a first electrically conductive metal layer on an inner
surface of the substrate in the through hole using an electro-less
plating process; forming a second electrically conductive metal
layer on the first electrically conductive metal layer using an
electro-plating process till the through hole being filled.
Inventors: |
TSAI; CHUNG-JEN; (Tayuan,
TW) ; HUANG; YU-CHENG; (Tayuan, TW) ; CHANG;
HUNG-YI; (Tayuan, TW) ; LIN; CHENG-HSIEN;
(Tayuan, TW) |
Correspondence
Address: |
PCE INDUSTRY, INC.;ATT. Steven Reiss
288 SOUTH MAYO AVENUE
CITY OF INDUSTRY
CA
91789
US
|
Assignee: |
FOXCONN ADVANCED TECHNOLOGY
INC.
Tayuan
TW
|
Family ID: |
41695342 |
Appl. No.: |
12/426276 |
Filed: |
April 19, 2009 |
Current U.S.
Class: |
205/125 |
Current CPC
Class: |
H05K 3/421 20130101;
H05K 3/427 20130101; H05K 3/423 20130101; H05K 2203/025 20130101;
H05K 2201/09563 20130101; H05K 2203/0346 20130101; H05K 2201/0394
20130101 |
Class at
Publication: |
205/125 |
International
Class: |
C25D 5/02 20060101
C25D005/02; C25D 7/00 20060101 C25D007/00 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 19, 2008 |
CN |
200810304044.8 |
Claims
1. A method for manufacturing a PCB, the method comprising:
providing a substrate including a base and two conductive layers
formed on opposite surfaces of the base, the substrate defining a
through hole passing through the two conductive layers; forming a
first electrically conductive metal layer on an inner surface of
the substrate in the through hole using an electro-less plating
process; forming a second electrically conductive metal layer on
the first electrically conductive metal layer using an
electro-plating process filling the through hole.
2. The method as claimed in claim 1, further comprising applying a
protecting layer onto outer surfaces of the substrate while
exposing the through hole before forming the first electrically
conductive metal layer.
3. The method as claimed in claim 1, wherein the first electrically
conductive metal layer includes a first portion formed on the outer
surfaces of the substrate and a second portion formed on the inner
surface, the method further comprising applying a protecting layer
onto the first portion of the first electrically conductive metal
layer while exposing the second portion thereof before forming the
second electrically conductive metal layer.
4. The method as claimed in claim 2, wherein the protecting layer
is a dry photoresist film, liquid photoresist layer or binder
layer.
5. The method as claimed in claim 3, wherein the protecting layer
is a dry photoresist film, liquid photoresist layer or binder
layer.
6. The method as claimed in claim 3, further comprising removing
the protecting layer and the first portion of the first
electrically conductive metal layer.
7. The method as claimed in claim 1, further comprising smoothening
opposite ends of the second electrically conductive metal layer,
the opposite ends thereof protruding from the two opposite
conductive layers.
8. A method for manufacturing a PCB, comprising: providing a
substrate, the substrate including a base and two conductive layers
formed on opposite surfaces of the base and defining a blind hole
passing through one of the two conductive layer and the base;
forming a first electrically conductive metal layer on an inner
surface of the substrate in the blind hole using an electro-less
plating process; forming a second electrically conductive metal
layer on the first electrically conductive metal layer using an
electro-plating process till the through hole being filled.
9. The method as claimed in claim 8, further comprising applying a
protecting layer onto outer surfaces of the substrate while
exposing the blind hole before forming the first electrically
conductive metal layer.
10. The method as claimed in claim 8, wherein the first
electrically conductive metal layer includes a first portion formed
on an outer surfaces of the substrate and a second portion formed
on the inner surface, the method further comprising applying a
protecting layer onto the first portion of the first electrically
conductive metal layer while exposing the second portion thereof
before forming the second electrically conductive metal layer.
11. The method as claimed in claim 9, wherein the protecting layer
is a dry photoresist film, liquid photoresist layer or binder
layer.
12. The method as claimed in claim 10, wherein the protecting layer
is a dry photoresist film, liquid photoresist layer or binder
layer.
13. The method as claimed in claim 10, further comprising removing
the protecting layer and the first portion of the first metal
layer.
14. The method as claimed in claim 8, further comprising
smoothening opposite ends of the second electrically conductive
metal layer, the opposite ends thereof protruding from the two
opposite conductive layers.
Description
BACKGROUND
[0001] 1. Technical Field
[0002] The present disclosure generally relates to printed circuit
boards, and particularly, relates to a method for manufacturing
printed circuit boards (PCBs).
[0003] 2. Description of Related Art
[0004] As technology progresses, microphones, portable computers
and other electronic products have achieved ever greater levels of
miniaturization by the use of double-sided PCBs and multilayer PCBs
having via-holes and buried-holes.
[0005] Usually, a through hole metalizing process is employed in a
traditional method for manufacturing double-sided PCBs or
multilayer PCBs to establish electrical connection between circuits
of different layers. The through hole metalizing process generally
includes a step of filling electrically conductive material into a
through hole of a PCB substrate having a base and two copper layers
formed on opposite surfaces of the base. As such, the conductive
material electrically connects the copper layers to each other.
[0006] However, the thermal expansion index of the electrically
conductive material may be different from that of the copper
layers. As a result, because of heating and cooling of the PCB,
interspaces are formed between the conductive material and the PCB
substrate. Thus, in wet etching process, etchant may be lodged into
the interspaces and corrode the PCB substrate.
[0007] What is needed, therefore, is a method for manufacturing a
printed circuit board to overcome the above-described problem.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Many aspects of the embodiments can be better understood
with reference to the following drawings. The components in the
drawings are not necessarily drawn to scale, the emphasis instead
being placed upon clearly illustrating the principles of
embodiments. Moreover, in the drawings, like reference numerals
designate corresponding parts throughout the different views.
[0009] FIG. 1 is a flow chart showing a method for manufacturing a
PCB according to a first embodiment.
[0010] FIG. 2 is a cross-sectional view of a substrate defining a
through hole according to the first embodiment.
[0011] FIG. 3 is similar to FIG. 2, but showing a protecting layer
is applied on an outer surface of the substrate with the through
hole exposed.
[0012] FIG. 4 is similar to FIG. 3, but showing a first
electrically conductive metal layer formed on an inner surface of
the substrate defined in the though hole.
[0013] FIG. 5 is similar to FIG. 4, but showing a second
electrically conductive metal layer formed on the first
electrically conductive metal layer and the through hole completely
filled by the second electrically conductive metal layer.
[0014] FIG. 6 is similar to FIG. 5, but showing the protecting
layer removed.
[0015] FIG. 7 is similar to FIG. 6, but showing two ends of the
second electrically conductive metal layer smoothened.
[0016] FIG. 8 is a cross-sectional view of a substrate defining a
blind hole according to a second embodiment.
[0017] FIG. 9 is similar to FIG. 8, but showing a first
electrically conductive metal layer formed on an inner surface
defined in the through hole and an outer surface of the
substrate.
[0018] FIG. 10 is similar to FIG. 9, but showing a protecting layer
applied on an outer surface of the substrate.
[0019] FIG. 11 is similar to FIG. 10, but showing a second
electrically conductive metal layer formed in the blind hole and
the blind hole is filled by the second electrically conductive
metal layer.
[0020] FIG. 12 is similar to FIG. 11, but showing the protecting
material attached on the first electrically conductive metal layer
removed.
[0021] FIG. 13 is similar to FIG. 12, but showing a portion of the
first electrically conductive metal layer formed on the outer
surface removed.
DETAILED DESCRIPTION
[0022] Referring to FIGS. 1-7, a method for manufacturing a PCB
provided in a first embodiment includes the following steps.
[0023] In step 1, as shown in FIG. 2, a double-sided substrate 10
is provided. The substrate 10 includes a base 13, a first
electrically conductive layer 11 and a second electrically
conductive layer 12 formed on two opposite surfaces of the base 13.
The first conductive layer 11 has a first outer surface 111, and
the second conductive layer 12 has a second outer surface 121. The
substrate 10 defines a through hole 101 therein passing through the
first, second conductive layers 11, 12 and the base 13, and has an
inner surface 1011 in the through hole 101.
[0024] The base 13 is an insulating resin layer, and the first
conductive layer 11 and the second conductive layer 12 are made of
copper. For purpose of manufacturing thin electrical traces, the
thickness of the first conductive layer 11 and the second
conductive layer 12 is less than or equal to 10 micrometers, and
the diameter of the through hole 101 is in the range from 50
micrometers to 100 micrometers. Additionally, the base 13 can be an
overlapping structure of a unit including an insulating resin layer
and two conductive layers disposed on two opposite surfaces of the
resin layer.
[0025] In step 2, as shown in FIG. 4, a first electrically
conductive metal layer 20 is formed on the inner surface 1011 of
the substrate 10 using an electro-less plating process.
[0026] In detail, as shown in FIG. 3, a protecting layer 31 is
applied onto and fully cover each of the first and second outer
surfaces 111, 121 of the substrate 10 except the through hole 101.
The two protecting layers 31 are configured for protecting the
first and second conductive layers 11, 13 from being plated. In the
present embodiment, the two protecting layers 31 are dry
photoresist films attached on the substrate 10 using a laminating
process. Additionally, the two protecting layers 31 can be liquid
photoresist layers applied using a coating process, or a known
binder layer capable of being manually stripped from the substrate
10. Furthermore, for purpose of improving adhesion force between
the protecting layers 31 and the first, second conductive layers
11, 12, prior to applying the protecting layers 31 onto the
substrate 10, the first and second outer surfaces 111, 112 can be
firstly cleared using a lye and secondly etched using a known
etchant.
[0027] As shown in FIG. 4, the substrate 10 is subsequently plated
using an electro-less plating process. In actual operation, before
plating, the inner surface 1011 is cleared using a lye and etched
to improve an adhesion force of metal layer contained in the
electro-less plating process. Hence, a first electrically
conductive metal layer 20 is formed on the inner surface 1011 of
the substrate 10. The first electrically conductive metal layer 20
is made of copper and the thickness thereof is general less than 6
micrometers.
[0028] In step 3, as shown in FIG. 5, a second electrically
conductive metal layer 40 is directly formed on the first
electrically conductive metal layer 20 using an electro-plating
process until the through hole 101 is entirely filled with the
second electrically conductive metal layer 40. In actual operation,
a portion of the obtained second electrically conductive metal
layer 40 adjacent to the first electrically conductive metal layer
20 is thicker than the central portion thereof. In the present
embodiment, the second electrically conductive metal layer 40
defines a first end 41 and an opposite second end 42. Both the
first and second ends 41, 42 are arc-shaped in cross-section, and
respectively extend beyond the first and second outer surfaces 111,
112.
[0029] As shown in FIG. 6, the protecting layers 31 on the
substrate 10 are removed using a typical etching process.
Thereafter, as shown in FIG. 7, the second electrically conductive
metal layer 40 is smoothened using a roller 90 until both the first
and second ends 41, 42 have a flat end surface. Additionally, when
being a binder layer, the protecting layer 31 can be manually
stripped, and the second electrically conductive metal layer 40 can
be polished.
[0030] In the present embodiment, both the first and second
electrically conductive metal layers 20, 40 are compact, and have
approximate similar thermal expansion indexes to those of the two
conductive layers 11, 12. Therefore, interspace is prevented from
being formed between the two electrically conductive metal layers
20, 40 and the two conductive layers 11, 12, the inner surface 1011
is protected from corrosion in wet process.
[0031] Referring to FIGS. 8-12, a method for manufacturing a PCB is
provided in a second embodiment, differing from the first
embodiment is that the substrate 50 defining a blind hole 501
passing through only the first conductive layer 51 and the base 53,
and exposing a portion of the second conductive layer 52. The
substrate 50 defines an inner surface 5011 in the blind hole 501
and an outer surface 511 on the first conductive layer 51.
[0032] As shown in FIG. 9, the method includes a step of forming a
first electrically conductive metal layer 60 on the substrate 50
using an electro-less plating process. The first electrically
conductive metal layer 60 includes a first portion 61 formed on the
outer surface 511 and a second portion 63 formed on the inner
surface 5011 defined in the blind hole 501.
[0033] As shown in FIG. 10, the method includes a step of applying
protecting layers 71 onto the substrate 50. The first portion 61 of
the first metal layer 60 and the second conductive layer 52 are
covered by the protecting layers 71 while the second portion 63 is
exposed. The protecting layers 71 are dry photoresist films.
Alternatively, the protecting layers 71 can be liquid photoresist
layers or binder layers.
[0034] As showing in FIG. 11, the method includes a step of forming
a second electrically conductive metal layer 80 on the second
portion 63 using an electro-plating process until the blind hole
501 is filled with conductive metal layer 80.
[0035] Referring to FIG. 12, the method includes a step of removing
a portion of the protecting layer 71 attached on the first portion
61 from the substrate 50 using a typical etching process or by
manual stripping. Another portion of the protecting layer 71
attached on the second conductive layer 52 is kept for
manufacturing electrical traces in subsequent process using a
traditional exposing and developing method. Additionally, when the
protecting layers 71 are binder layers, another portion of the
protecting layers 71 attached on the second conductive layer 52
should be removed.
[0036] Referring to FIGS. 12.about.13, the first portion 61 of the
first electrically conductive metal layer 60 is removed. Therefore,
the thickness of the first conductive layer 51 remains
unchanged.
[0037] While certain embodiments have been described and
exemplified above, various other embodiments will be apparent to
those skilled in the art from the foregoing disclosure. The present
invention is not limited to the particular embodiments described
and exemplified but is capable of considerable variation and
modification without departure from the scope of the appended
claims.
* * * * *