U.S. patent application number 12/505639 was filed with the patent office on 2010-02-11 for semiconductor device fabricating method, and semiconductor fabricating device.
This patent application is currently assigned to FUJITSU MICROELECTRONICS LIMITED. Invention is credited to Toshiyuki Karasawa, Kenji Nakano, Tetsuya Shirasu.
Application Number | 20100035523 12/505639 |
Document ID | / |
Family ID | 41653376 |
Filed Date | 2010-02-11 |
United States Patent
Application |
20100035523 |
Kind Code |
A1 |
Shirasu; Tetsuya ; et
al. |
February 11, 2010 |
SEMICONDUCTOR DEVICE FABRICATING METHOD, AND SEMICONDUCTOR
FABRICATING DEVICE
Abstract
A method for fabricating a semiconductor device includes:
supporting a semiconductor substrate formed with a polishing target
film by a polishing head; and polishing the polishing target film
while restricting movement in a radial direction of the
semiconductor substrate by a retainer formed on the polishing head
with a tilted surface formed on an inner peripheral section of the
retainer, wherein when the polishing target film is polished, an
outer peripheral surface of the semiconductor substrate comes into
contact with the tilted surface formed on the inner peripheral
section of the retainer.
Inventors: |
Shirasu; Tetsuya; (Tokyo,
JP) ; Karasawa; Toshiyuki; (Tokyo, JP) ;
Nakano; Kenji; (Tokyo, JP) |
Correspondence
Address: |
WESTERMAN, HATTORI, DANIELS & ADRIAN, LLP
1250 CONNECTICUT AVENUE, NW, SUITE 700
WASHINGTON
DC
20036
US
|
Assignee: |
FUJITSU MICROELECTRONICS
LIMITED
Tokyo
JP
|
Family ID: |
41653376 |
Appl. No.: |
12/505639 |
Filed: |
July 20, 2009 |
Current U.S.
Class: |
451/40 ; 451/285;
451/54 |
Current CPC
Class: |
B24B 37/32 20130101 |
Class at
Publication: |
451/40 ; 451/54;
451/285 |
International
Class: |
B24B 1/00 20060101
B24B001/00; B24B 7/20 20060101 B24B007/20; B24B 9/06 20060101
B24B009/06 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 8, 2008 |
JP |
2008-205525 |
Claims
1. A method for fabricating a semiconductor device, comprising:
supporting a semiconductor substrate formed with a polishing target
film by a polishing head; and polishing the polishing target film
while restricting movement in the radial direction of the
semiconductor substrate by a retainer formed on the polishing head
with a tilted surface formed on an inner peripheral section of the
retainer, wherein when the polishing target film is polished, an
outer peripheral surface of the semiconductor substrate comes into
contact with the tilted surface formed on the inner peripheral
section of the retainer.
2. The method according to claim 1, wherein the tilted surface has
a tilt angle of 10 to 40 degrees with respect to the normal
direction of the lower surface of the polishing head.
3. The method according to claim 2, wherein the tilted surface has
the tilt angle of 15 to 35 degrees with respect to the normal
direction of the lower surface of the polishing head.
4. A semiconductor device, comprising: a polishing head that
supports a semiconductor substrate formed with a polishing target
film; and a retainer, that is provided on the polishing head, with
a tilted surface on an inner peripheral section to restrict
movement of the semiconductor substrate in the radial direction,
wherein when the polishing target film is polished, an outer
peripheral surface of the semiconductor substrate comes into
contact with the tilted surface formed on the inner peripheral
section of the retainer.
5. The semiconductor device according to claim 4, wherein the
tilted surface has a tilt angle of 10 to 40 degrees with respect to
the normal direction of the lower surface of the polishing
head.
6. The semiconductor device according to claim 5, wherein the
tilted surface has the tilt angle of 15 to 35 degrees with respect
to the normal direction of the lower surface of the polishing
head.
7. A semiconductor device, comprising: a polishing head that
supports a semiconductor substrate formed with a polishing target
film; and a retainer that is provided on the polishing head with a
member, having a hardness higher than the semiconductor substrate,
on an inner peripheral section to restrict movement of the
semiconductor substrate in the radial direction, wherein when the
polishing target film is polished, an outer peripheral surface of
the semiconductor substrate comes into contact with the member
formed on the inner peripheral section of the retainer.
8. The semiconductor device according to claim 7, wherein the
member having the hardness higher than the semiconductor substrate
includes titanium.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is based upon and claims the benefit of
priority of the prior Japanese Patent Application No. 2008-205525,
filed on Aug. 8, 2008, the entire contents of which are
incorporated herein by reference.
FIELD
[0002] The present invention relates to a semiconductor device
fabricating method and a semiconductor fabricating device and, more
specifically, to a semiconductor device fabricating method and a
semiconductor fabricating device with a film polishing process.
BACKGROUND
[0003] There is a technology of polishing a film to be polished
formed on a semiconductor substrate by Chemical Mechanical
Polishing (CMP).
[0004] For example, when forming an interlayer insulator film on a
semiconductor substrate formed with a transistor and others, the
resulting interlayer insulator film is then formed with a groove by
photolithography, for example. A conductive film is then formed in
such a manner as to embed the groove therewith. The conductive film
herein is the film to be polished (hereinafter, referred to as
"polishing target film". Next, by CMP, the polishing target film is
polished until the surface of the interlayer insulator film is
exposed. With such a method, a wiring pattern having the conductive
film is formed in the groove.
[0005] The problem with such a semiconductor device fabricating
method is that the polishing target film may have scratches on the
surface. When the polishing target film suffers from scratches on
the surface, the resulting semiconductor device may not be
reliable.
SUMMARY
[0006] According to aspects of the embodiments disclosed herein, a
method for fabricating a semiconductor device includes: supporting
a semiconductor substrate formed with a polishing target film by a
polishing head; and polishing the polishing target film while
restricting movement in a radial direction of the semiconductor
substrate by a retainer formed on the polishing head with a tilted
surface formed on an inner peripheral section of the retainer,
wherein when the polishing target film is polished, an outer
peripheral section of the semiconductor substrate comes into
contact with the tilted surface formed on the inner peripheral
section of the retainer.
[0007] The object and advantages of the invention will be realized
and attained by means of the elements and combinations particularly
pointed out in the claims.
[0008] It is to be understood that both the foregoing general
description and the following detailed description are exemplary
and explanatory and are not restrictive of the invention, as
claimed.
BRIEF DESCRIPTION OF DRAWINGS
[0009] FIG. 1 is a plan view of a semiconductor fabricating device
of a first embodiment;
[0010] FIG. 2 is a cross sectional view of the semiconductor
fabricating device of the first embodiment;
[0011] FIGS. 3A and 3B are each an enlargement of a cross sectional
view of the semiconductor fabricating device of the first
embodiment;
[0012] FIGS. 4A to 4C are diagrams depicting, step by step, a
semiconductor device fabricating method of the first embodiment
with cross sectional views of the resulting semiconductor
device;
[0013] FIG. 5 is a schematic cross sectional view of a retainer
ring whose inner peripheral section is been partially worn away due
to a semiconductor substrate;
[0014] FIG. 6 is a cross sectional view of a semiconductor
fabricating device of a second embodiment;
[0015] FIG. 7 is an enlargement of a cross sectional view of the
semiconductor fabricating device of the second embodiment;
[0016] FIG. 8 is a cross sectional view of the semiconductor
fabricating device of a modified example of the second
embodiment;
[0017] FIG. 9 is an enlargement of a cross sectional view of the
semiconductor fabricating device of the modified example of the
second embodiment;
[0018] FIG. 10 is a cross sectional view of a semiconductor
substrate coming into contact with a retainer ring; and
[0019] FIGS. 11A to 11C are each a cross sectional view of the
retainer ring of FIG. 10 whose inner peripheral section has been
worn away due to the semiconductor substrate.
DESCRIPTION OF EMBODIMENTS
[0020] FIG. 10 is a cross sectional view of a semiconductor
substrate coming into contact with a retainer ring. A semiconductor
substrate 210 formed with a polishing target film is supported by a
polishing head (not illustrated). The polishing head may be
provided with a retainer ring 212 for restricting the movement of
the semiconductor substrate 210 in the radial direction (in-plane
direction). At the time of polishing the polishing target film, the
outer peripheral section of the semiconductor substrate 210 may
come into contact with an inner peripheral surface 214 of the
retainer ring 212.
[0021] When the outer peripheral section of the semiconductor
substrate 210 comes into contact with the inner peripheral surface
214 of the retainer ring 212, the inner peripheral surface 214 of
the retainer ring 212 may become partially worn away. Recently,
semiconductor substrates have become larger in size, which may lead
to an increase in friction between the semiconductor substrate and
a polishing pad (not illustrated). As a result, when the outer
peripheral section of the semiconductor substrate 210 comes into
contact with the inner peripheral surface of the retainer ring 212,
the force applied to the inner peripheral surface of the retainer
ring 212 tends to be large. This may cause a deep recess to be
formed in the inner peripheral section of the retainer ring
212.
[0022] FIGS. 11A to 11C are each a cross sectional view of the
retainer ring whose inner peripheral section has been partially
worn away due to the semiconductor substrate 210.
[0023] As illustrated in FIGS. 11A to 11C, due to the wearing away,
a deep recess (groove) 216 may be formed in the inner peripheral
section of the retainer ring 212. The portions enclosed by broken
lines in FIGS. 11A to 11C are portions that may break off easily
due to their shape. When the retainer ring 212 is partially worn
away in this way, portions of the retainer ring 212 may break off
more easily, and the resulting broken pieces of the retainer ring
212 may cause scratches on the surface of the polishing target
film.
[0024] With the semiconductor device and fabricating method thereof
disclosed herein, the inner peripheral section of a retainer may be
partially tilted, and with such a configuration, when a polishing
target film is polished, the outer peripheral section of the
semiconductor substrate thus comes into contact with the tilted
portion of the inner peripheral section of the retainer. Because
the outer peripheral section of the semiconductor substrate comes
into contact with the tilted portion of the inner peripheral
section of the retainer as such, the force applied to the inner
peripheral section of the retainer may be favorably released so
that the recess formed in the inner peripheral section of the
retainer may be shallower. Also, because a shallower recess is
formed in the tilted surface of the retainer, even if the inner
peripheral portion of the retainer is partially worn away due to
the semiconductor substrate, portions of the retainer breaking off
may be reduced if not prevented. Thus, portions breaking off the
retainer are reduced, thereby reducing the possibility of scratch
damage on the surface of the polishing target film.
[0025] The inventors have come up with, as a result of extensive
study, an idea of reducing possible scratches as disclosed
below.
First Embodiment
[0026] A semiconductor device fabricating method and a
semiconductor fabricating device of a first embodiment are
disclosed by referring to FIGS. 1 to 5.
[0027] Semiconductor Fabricating Device
[0028] First of all, by referring to FIGS. 1 to 3B, a semiconductor
fabricating device (polishing device) with a semiconductor device
fabricating method of this embodiment shall be disclosed. FIG. 1 is
a plan view of the semiconductor fabricating device of the
embodiment. FIG. 2 is a cross sectional view of the semiconductor
fabricating device of this embodiment. FIGS. 3A and 3B are each an
enlarged cross sectional view of the semiconductor fabricating
device of the embodiment.
[0029] As illustrated in FIG. 1, a polishing table 102 that can
rotate is provided on a base 100.
[0030] A polishing pad 104 is provided on the polishing table 102.
The polishing pad 104 may be formed by laminating a plurality of
polyurethane foam layers, for example.
[0031] The base 100 is provided with an arm 106.
[0032] The arm 106 may be provided with a polishing head 108 that
can rotate. By moving the arm 106 as desired, the polishing head
108 may also be moved as desired.
[0033] The polishing head 108 supports a semiconductor substrate 10
formed with a polishing target film 36 (refer to FIG. 4B). While
rotating the semiconductor substrate 10, the polishing head 108
pushes the polishing target film 36 formed on the semiconductor
substrate 10 against the polishing pad 104.
[0034] The lower surface side of the polishing head 108 is provided
with a retainer 116. The retainer 116 serves to restrict the
movement of the semiconductor substrate 10 in the radial direction
(in-plane direction). In this embodiment, the retainer 116 is in
the shape of a ring (the shape of a cylinder). The ring-shaped
retainer 116 is hereinafter referred to as a "retainer ring" (guide
ring). The retainer ring 116 may be made of resin. For example the
retainer ring 116 may be Poly Phenylene Sulfide Resin (PPS),
Vespel.TM., and the like. The retainer ring 116 is so designed as
to have an inner diameter slightly larger than the outer diameter
of the semiconductor substrate 10. The retainer ring 116 may have
an inner diameter of 301 mm, an outer diameter of 348 mm, and a
height of 20 mm, for example.
[0035] The lower surface side of the polishing head 108 may be also
provided with a pressurization technique (air chamber) 118. The air
chamber 118 may be provided inside the retainer ring 116. The lower
surface side of the air chamber 118 may be provided with an elastic
film (membrane) 120. The membrane 120 may be an elastic material
including rubber, for example. The membrane 120 may be provided for
applying a constant force to the semiconductor substrate 10. The
lower surface side of the membrane 120 is attached to the
semiconductor substrate 10 formed with the polishing target film
36. With such a configuration, the semiconductor substrate 10 is
supported by the polishing head 108. When supporting the
semiconductor substrate 10 by the polishing head 108, the polishing
target film 36 formed on the semiconductor substrate 10 (refer to
FIG. 4B) is positioned as to be on the lower side of the
semiconductor substrate 10. The normal of the main surface of the
semiconductor substrate 10 has the same direction as the normal of
the lower surface of the polishing head 108.
[0036] When air is directed into the air chamber 118, the air
chamber 118 expands, the membrane 120 moves downward, and the
semiconductor substrate 10 is pushed against the polishing pad 104.
By controlling as appropriate the amount of air guided into the air
chamber 118, the pressure to push the semiconductor substrate 10
against the polishing pad 104 may also be controlled as
appropriate.
[0037] The lower portion of the inner peripheral section of the
retainer ring 116 is formed with a tilted surface 122. In this
embodiment, when the outer peripheral surface of the semiconductor
substrate 10 comes into contact with the inner peripheral surface
of the retainer ring 116, the outer peripheral surface of the
semiconductor substrate 10 may be so disposed as to come into
contact with the tilted surface 122 formed in the retainer ring
116. For example, if the semiconductor substrate 10 has a thickness
of 775 .mu.m, then, the height h of the tilted surface 122 may be
380 .mu.m or more to allow the outer peripheral surface of the
semiconductor substrate 10 come into contact with the tilted
surface 122 of the retainer ring 116 when the outer peripheral
surface of the semiconductor substrate 10 comes into contact with
the inner peripheral section of the retainer ring 116.
[0038] FIG. 3A is a schematic diagram illustrating a tilt angle
.theta. of the tilted surface 122 formed on the inner peripheral
section of the retainer ring 116. FIG. 3B is a schematic diagram
illustrating the state in which the inner peripheral section of the
retainer ring 116 is in contact with the outer peripheral surface
of the semiconductor substrate 10.
[0039] If the tilted surface 122 is set with the tilt angle .theta.
relatively large with respect to the normal direction of the lower
surface of the polishing head 108 (refer to FIG. 3A), when the
outer peripheral surface of the semiconductor substrate 10 comes
into contact with the inner peripheral section of the retainer ring
116, the force applied to the retainer ring 116 may be released. By
setting the tilted surface 122 with a relatively large tilt angle
.theta. with respect to the normal direction of the lower surface
of the polishing head 108, deep wearing away of the inner
peripheral section of the retainer ring 116 may be reduced if not
prevented. As such, the tilt angle .theta. of the tilted surface
122 formed on the inner peripheral section of the retainer ring 116
is preferably set at a relatively large angle. However, if the tilt
angle .theta. of the tilted surface 122 is too large with respect
to the normal direction of the lower surface of the polishing head
108, the retainer ring 116 may not be able to restrict the
semiconductor substrate 10 from moving in the radial direction. If
this is the case, the semiconductor substrate 10 may come off from
the polishing head 108. In consideration thereof, the tilt angle
.theta. of the tilted surface 122 is preferably not excessively
large with respect to the normal direction of the main surface of
the semiconductor substrate 10. The preferable range of the tilt
angle .theta. of the tilted surface 122 formed on the inner
peripheral section of the retainer ring 116 is 10 to 40 degrees,
for example, with respect to the normal direction of the lower
surface of the polishing head 108. With the tilt angle .theta. of
the tilted surface 122 being 10 degrees or more, the force applied
to the retainer ring 116 may be sufficiently released so that the
recess will not be too deep in the inner peripheral section of the
retainer ring 116. Moreover, with the tilt angle .theta. of the
tilted surface 122 being 40 degrees or less, the semiconductor
substrate 10 may be restricted, with reliability, from moving in
the radial direction.
[0040] A more preferable range for the tilt angle .theta. of the
tilted surface 122 formed on the inner peripheral section of the
retainer ring 116 is 15 to 35 degrees, for example, with respect to
the normal direction of the lower surface of the polishing head
108. With the tilt angle .theta. of the tilted surface 122 being 15
degrees or more, the force to be applied to the retainer ring 116
may be fully released so that the recess may not be too deep in the
inner peripheral section of the retainer ring 116. Moreover, with
the tilt angle .theta. of the tilted surface 122 being 35 degrees
or less, the semiconductor substrate 10 may be restricted from
moving in the radial direction with a high reliability.
[0041] Disclosed herein is an example where the tilted surface 122
formed on the inner peripheral section of the retainer ring 116 has
the tilt angle .theta. of 10 to 40 degrees, and more preferably 15
to 35 degrees with respect to the normal direction of the lower
surface of the polishing head 108, but the tilt angle .theta. of
the tilted surface 122 is not restricted to such a size range.
Alternatively, the tilt angle .theta. of the tilted surface 122 may
be set, as appropriate, to fall in the range of 1 to 70 degrees
with respect to the normal direction of the lower surface of the
polishing head 108. However, in view of the above, the tilted
surface 122 formed on the inner peripheral section of the retainer
ring 116 preferably has the tilt angle .theta. of 10 to 40 degrees,
and more preferably 15 to 35 degrees with respect to the normal
direction of the lower surface of the polishing head 108.
[0042] The polishing table 102 includes a nozzle 110 formed
thereon. The nozzle 110 is provided for supplying a slurry
(abrasive), pure water, and the like onto the polishing pad
104.
[0043] The polishing table 102 is provided with, on the side
section thereof, a dresser 112 for dressing the polishing pad
104.
[0044] The dresser 112 may be provided with a diamond disk 114. The
diamond disk 114 may include diamond particles of about 150 .mu.m
in size fixed to a base made of stainless steel, for example.
[0045] As such, the semiconductor fabricating device of the
embodiment is configured.
[0046] Semiconductor Device Fabricating Method
[0047] Next, a semiconductor device fabricating method of the
embodiment shall be disclosed by referring to FIGS. 1 to 5. FIGS.
4A to 4C are diagrams illustrating, step by step, a semiconductor
device fabricating method of this embodiment with cross sectional
views of the resulting semiconductor device. FIG. 5 is a schematic
cross-sectional view of the retainer ring whose inner peripheral
section is partially worn away due to the semiconductor
substrate.
[0048] First of all, as illustrated in FIG. 4A, an interlayer
insulator film 34 is formed on the semiconductor substrate 10
formed with a transistor (not illustrated) and the like. A silicon
wafer with a diameter of 300 mm, for example, may be used for the
semiconductor substrate 10. The semiconductor substrate 10 may have
a thickness of about 775 .mu.m, for example.
[0049] Next, a photo resist film (not illustrated) is formed over
the semiconductor substrate 10 by spin coating.
[0050] Next, the photo resist film is subjected to patterning by
photolithography.
[0051] Next, the interlayer insulator film 34 is subjected to
etching using the photo resist film as a mask. As such, a groove 38
is formed for embedding therein a wiring pattern 40 (refer to FIG.
4C), or a contact hole (not illustrated) for embedding therein a
conductor plug (not illustrated).
[0052] Next, a barrier metal film (not illustrated) may be formed
over the resulting surface by sputtering, for example. The barrier
metal film may be, for example, a laminated film including a
tantalum (Ta) film and a titanium nitride (TiN) film. The Ta may
have a thickness of 10 nm, and the TiN film may have a thickness of
5 nm, for example.
[0053] Next, a seed film (not illustrated) is formed over the
resulting surface by sputtering, for example. The seed film may be,
for example, a Cu film. The Cu film may have a thickness of 60 nm,
for example.
[0054] Next, a conductive film may be formed by electroplating, for
example. The conductive film may be a Cu film. The Cu film may have
a thickness of 1 .mu.m, for example.
[0055] As such, the resulting polishing target film 36 includes the
barrier metal film and the conductive film (refer to FIG. 4B).
[0056] Next, the semiconductor substrate 10 formed with the
polishing target film 36 is supported by the polishing head 108.
For supporting the semiconductor substrate 10 by the polishing head
108, the polishing target film 36 formed on the semiconductor
substrate 10 (refer to FIG. 4B) is so disposed as to be on the
lower side of the semiconductor substrate 10.
[0057] Next, by CMP, the polishing target film 36 is polished until
the surface of the interlayer insulator film 34 is exposed (refer
to FIG. 4C). For polishing the polishing target film 36, while the
polishing table 102 and the polishing head 108 are each rotated,
the polishing target film 36 formed on the semiconductor substrate
10 is pushed against the polishing pad 104. When the polishing
target film 36 is polished as such, a slurry is provided onto the
polishing pad 104 via the nozzle 110 (refer to FIG. 1). The
polishing target film 36 is pushed against the polishing pad 104
with a pressure of about 2.8 psi, for example, and the retainer
ring 116 is pushed against the polishing pad 104 with a pressure of
about 5.5 psi, for example. The polishing head 108 may be rotated
at a rotation frequency of 80 rotations per minute, and the
polishing table 102 may be rotated at a rotation frequency of 76
rotations per minute, for example. The slurry for provision onto
the polishing pad 104 may include an abrasive, a pH regulator, a
dispersant, an oxidizer, and the like. The abrasive in the slurry
may be a colloidal silica with a primary particle size of 70 nm,
for example. The abrasive in the slurry may have a concentration of
1 wt % or lower, for example. The amount of supply of the slurry
may be 300 ml/min, for example. Note here that such requirements
for polishing the polishing target film 36 are not restricted to
those disclosed above, and may be set as appropriate.
[0058] When the semiconductor substrate 10 is restricted from
moving in the radial direction by the retainer ring 116, the outer
peripheral surface of the semiconductor substrate 10 comes into
contact with the tilted surface 122 formed on the inner peripheral
section of the retainer ring 116. Because the outer peripheral
surface of the semiconductor substrate 10 comes into contact with
the tilted surface 122 formed on the inner peripheral section of
the retainer ring 116 as such, the force to be applied to the inner
peripheral section of the retainer ring 116 may be released to some
degree. In this embodiment, because the force to be applied to the
inner peripheral section of the retainer ring 116 may be released
to some degree as such, a recess (groove) 124 to be formed to the
inner peripheral section of the retainer ring 116 may be shallower,
as illustrated in FIG. 5. Moreover, because the recess 124 is
formed in the tilted surface 122 formed in the retainer ring 116,
even if the recess 124 is formed, the shape of the resulting
retainer ring 116 will not break easily. As such, the polishing
target film 36 may be polished until the surface of the interlayer
insulator film 34 is exposed so that the wiring pattern 40 with the
conductive film is embedded into the groove 38 (refer to FIG.
4C).
[0059] As such, according to the first embodiment, the inner
peripheral section of the retainer ring 116 is formed with the
tilted surface 122, and when the polishing target film 36 is
polished, the outer peripheral surface of the semiconductor
substrate 10 comes into contact with the tilted surface 122 formed
on the inner peripheral section of the retainer ring 116. In this
embodiment, because the outer peripheral surface of the
semiconductor substrate 10 comes into contact with the tilted
surface 122 formed on the inner peripheral section of the retainer
ring 116 as such, the force to be applied to the inner peripheral
section of the retainer ring 1116 may be released to some degree.
As such, in this embodiment, the depth of the recess 124 may be
reduced in the inner peripheral section of the retainer ring 116.
Moreover, in this embodiment, because the recess 124 is formed in
the tilted surface 122 formed on the retainer ring 116, even if the
inner peripheral section of the retainer ring 116 is partially worn
away, portions of the retainer ring 116 may not break off as easily
as before due to the resulting shape. As such, in this embodiment,
breaking off of the retainer ring 116 is accordingly reduced,
thereby reducing the possibility of scratch damage on the surface
of the polishing target film 36.
Second Embodiment
[0060] By referring to FIGS. 6 and 7, a semiconductor device
fabricating method and a semiconductor fabricating device of a
second embodiment are disclosed. FIG. 6 is a cross sectional view
of the semiconductor fabricating device of the second embodiment,
and FIG. 7 is an enlargement of a cross sectional view of the
semiconductor fabricating device of the second embodiment. Any
components similar to those in the semiconductor device fabricating
method and the semiconductor fabricating device in the first
embodiment of FIGS. 1 to 5 are provided with the same reference
numeral, and therefore are only partially described or their
description is omitted.
[0061] With the semiconductor device fabricating method and the
semiconductor fabricating device of the second embodiment, the main
characteristics lie in a member 126 provided on the inside of a
retainer ring 116a with a hardness higher than the hardness of the
semiconductor substrate 10.
[0062] Semiconductor Fabricating Device
[0063] First of all, the semiconductor fabricating device of this
embodiment is disclosed by referring to FIG. 6.
[0064] As illustrated in FIG. 6, the retainer ring 116a is formed
with, on the inner peripheral section thereof, a recess (mating
portion) 128. The mating portion 128 may have a depth of about 5
mm, for example. The mating portion may have a height of 3 mm or
more, and more preferably, 5 mm or more, for example. The mating
portion 128, preferably, does not exceed the height of the inner
peripheral section of the retainer ring 116a.
[0065] A high-hardness member 126 having a hardness higher than the
semiconductor substrate 10 is fitted into the mating portion 128.
The high-hardness member 126 is formed in the shape of a ring (the
shape of a cylinder). The high-hardness material 126 may be made of
a material including titanium, for example. For example, the
high-hardness material 126 may be made of a titanium alloy.
[0066] As illustrated in FIG. 6, when the polishing target film 36
(refer to FIG. 4B) is polished, the outer peripheral surface of the
semiconductor substrate 10 comes into contact with the
high-hardness member 126. Because the high-hardness member 126 has
the hardness higher than the semiconductor substrate 10, portions
of the hard-hardness member 126 may not be deeply worn away due to
the semiconductor substrate 10. Because portions of the
hard-hardness member 126 are not worn away due to contact with the
semiconductor substrate 10 as such, the resulting retainer ring
116a may not be partially worn away due to the semiconductor
substrate 10. Accordingly, also in this embodiment, breaking off of
portions of the retainer ring 116a is accordingly reduced, thereby
reducing the possibility of scratch damage on the surface of the
polishing target film 36.
[0067] Semiconductor Device Fabricating Method
[0068] Next, the semiconductor device fabricating method in this
embodiment is disclosed by referring to FIGS. 1, 4A to 4C, 6, and
7.
[0069] First of all, the processes in this embodiment are similar
to those in the semiconductor device fabricating method in the
first embodiment disclosed by referring to FIGS. 4A and 4B from the
process of forming the interlayer insulator film 34 on the
semiconductor substrate 10 formed with a transistor (not
illustrated) and the like, to the process of forming the polishing
target film 36 on the semiconductor substrate 10, and thus are not
described again.
[0070] Next, the semiconductor substrate 10 formed with the
polishing target film 36 is supported by the polishing head 108.
When the semiconductor substrate 10 is supported by the polishing
head 108 as such, the polishing target film 36 formed on the
semiconductor substrate 10 (refer to FIG. 4B) is disposed to be on
the lower side of the semiconductor substrate 10.
[0071] Next, by CMP, the polishing target film 36 is polished until
the surface of the interlayer insulator film 34 is exposed (refer
to FIG. 4C). For polishing the polishing target film 36, while the
polishing table 102 and the polishing head 108 are each being
rotated, the polishing target film 36 formed on the semiconductor
substrate 10 is pushed against the polishing pad 104. When the
polishing target film 36 is polished as such, a slurry is provided
onto the polishing pad 104 via the nozzle 110 (refer to FIG. 1).
The polishing target film 36 is pushed against the polishing head
104 with the pressure of about 2.8 psi, for example, and the
retainer ring 116a is pushed against the polishing pad 104 with the
pressure of about 5.5 psi, for example. The polishing head 108 may
be rotated at the rotation frequency of 80 rotations per minute,
and the polishing table 102 may be rotated at the rotation
frequency of 76 rotations per minute, for example. The slurry for
provision onto the polishing pad 104 may include an abrasive, a pH
regulator, a dispersant, an oxidizer, and the like. The abrasive in
the slurry may be colloidal silica with a primary particle size of
70 nm, for example. The abrasive in the slurry may have a
concentration of 1 wt % or lower, for example. The amount of supply
of the slurry may be 300 ml/min, for example. Note here that such
requirements for polishing of the polishing target film 36 are not
restricted to those described above, and may be set as
appropriate.
[0072] When the semiconductor substrate 10 is restricted from
moving in the radial direction by the retainer ring 116a, the outer
peripheral surface of the semiconductor substrate 10 comes into
contact with the inner peripheral section of the high-hardness
member 126 having a hardness higher than the semiconductor
substrate 10. As such, the polishing target film 36 is polished
until the surface of the interlayer insulator film 34 is exposed so
that the wiring pattern 40 with the conductive film is embedded
into the groove 38 (refer to FIG. 4C).
[0073] As such, according to the second embodiment, the inner
peripheral section of the retainer ring 116a is formed with the
high-hardness member 126, and when the polishing target film 36 is
polished, the inner peripheral section of the high-hardness member
126 provided on the inner peripheral section of the retainer ring
116a as such is in contact with the outer peripheral surface of the
semiconductor substrate 10. Accordingly, also in this embodiment,
the retainer ring 116a may not be partially worn away due to the
semiconductor substrate 10 so that breaking off of portions of the
resulting retainer ring 116a may be reduced. As such, also in this
embodiment, the possibility of scratch damage on the surface of the
polishing target film 36 may be favorably reduced.
Modified Example
[0074] A semiconductor device fabricating method and a
semiconductor fabricating device in a modified example of the
second embodiment is disclosed next by referring to FIGS. 8 and 9.
FIG. 8 is a cross sectional view of the semiconductor fabricating
device in this modified example. FIG. 9 is an enlargement of a
cross sectional view of the semiconductor fabricating device in
this modified example.
[0075] With the semiconductor device fabricating method and the
semiconductor fabricating device in this modified example, the main
characteristics lie in a high-hardness film (high-hardness member)
126a disposed at least on the inner peripheral section of the
retainer ring 116 with a hardness that is higher than the
semiconductor substrate 10.
[0076] As illustrated in FIG. 8, at least on the inner peripheral
section of the retainer ring 116, the high-hardness film
(high-hardness member) 126a is formed with the hardness that is
higher than the semiconductor substrate 10. In this example, the
high-hardness film 126a is formed on surfaces of the retainer ring
116, i.e., the inner peripheral surface, the bottom surface, and
the outer peripheral surface, for example. The high-hardness film
126a is made of, as appropriate, a material having the hardness
higher than the semiconductor substrate 10. In this example, the
high-hardness material 126a may be made of a material including
titanium, for example. The high-hardness material 126a may be
formed by Physical Vapor Deposition (PVD), for example.
[0077] When the retainer ring 116 serves to restrict the
semiconductor substrate 10 from moving in the radial direction, the
outer peripheral surface of the semiconductor substrate 10 comes
into contact with the high-hardness film (high-hardness member)
126a having the hardness higher than the semiconductor substrate
10.
[0078] As such, in this example, the high-hardness member 126a is
disposed at least on the inner peripheral section of the retainer
ring 116, and when the polishing target film 36 is polished, the
high-hardness member 126a disposed on the inner peripheral section
of the retainer ring 116 as such is in contact with the outer
peripheral surface of the semiconductor substrate 10. Also in this
modified example, partial wearing away of the retainer ring 116 due
to the semiconductor substrate 10 is reduced so that breaking off
of portions of the resulting retainer ring 116 may be reduced. As
such, also in this embodiment, the possibility of scratch damage on
the surface of the polishing target film 36 may be favorably
reduced.
Modified Embodiment
[0079] The embodiments disclosed above are not restrictive, and
other various modifications are also possible.
[0080] In the embodiments disclosed above, the polishing target
film 36 is described in the examples as a conductive film, but the
polishing target film 36 is not restricted as such. For example,
the polishing target film 36 may be insulative.
[0081] In the second embodiment, the high-hardness members 126 and
126a are each described as being made of a material including
titanium, but the high-hardness members 126 and 126a are both not
restricted as such. For example, any other material having the
hardness higher than the semiconductor substrate 10 can be used for
making the high-hardness members 126 and 126a.
[0082] All examples and conditional language recited herein are
intended for pedagogical purposes to aid the reader in
understanding the principles of the invention and the concepts
contributed by the inventor to furthering the art, and are to be
construed as being without limitation to such specifically recited
examples and conditions, nor does the organization of such examples
in the specification relate to a showing of the superiority and
inferiority of the invention. Although the embodiments have been
described in detail, it should be understood that the various
changes, substitutions, and alterations could be made hereto
without departing from the spirit and scope of the invention.
* * * * *