U.S. patent application number 11/956676 was filed with the patent office on 2009-06-18 for silicon carbide focus ring for plasma etching system.
This patent application is currently assigned to TOKYO ELECTRON LIMITED. Invention is credited to Akiteru KO, Masafumi URAKAWA.
Application Number | 20090151870 11/956676 |
Document ID | / |
Family ID | 40456812 |
Filed Date | 2009-06-18 |
United States Patent
Application |
20090151870 |
Kind Code |
A1 |
URAKAWA; Masafumi ; et
al. |
June 18, 2009 |
Silicon carbide focus ring for plasma etching system
Abstract
A high resistivity silicon carbide focus ring for use in a
plasma etching system is described. The focus ring comprises an
upper surface, a lower surface, an inner radial edge, and an outer
radial edge, and is configured to surround a substrate on a
substrate holder in a plasma processing system. The focus ring
comprises high resistivity silicon carbide having a resistivity
greater than or equal to about 100 ohm-cm.
Inventors: |
URAKAWA; Masafumi; (Salem,
MA) ; KO; Akiteru; (Peabody, MA) |
Correspondence
Address: |
TOKYO ELECTRON U.S. HOLDINGS, INC.
4350 W. CHANDLER BLVD., SUITE 10
CHANDLER
AZ
85226
US
|
Assignee: |
TOKYO ELECTRON LIMITED
Tokyo
JP
|
Family ID: |
40456812 |
Appl. No.: |
11/956676 |
Filed: |
December 14, 2007 |
Current U.S.
Class: |
156/345.1 |
Current CPC
Class: |
H01J 37/32642 20130101;
H01J 37/32623 20130101 |
Class at
Publication: |
156/345.1 |
International
Class: |
C23F 1/08 20060101
C23F001/08 |
Claims
1. A focus ring for surrounding a substrate on a substrate holder
in a plasma processing system, comprising: a focus ring having an
upper surface, a lower surface, an inner radial edge, and an outer
radial edge, wherein said focus ring comprises high resistivity
silicon carbide having a resistivity greater than or equal to about
100 ohm-cm.
2. The focus ring of claim 1, wherein said resistivity is greater
than or equal to about 1000 ohm-cm.
3. The focus ring of claim 1, wherein said resistivity ranges from
about 100 ohm-cm to about 10.sup.6 ohm-cm.
4. The focus ring of claim 1, wherein said focus ring consists
essentially of high resistivity silicon carbide.
5. The focus ring of claim 1, wherein said focus ring consists of
high resistivity silicon carbide.
6. The focus ring of claim 1, wherein said focus ring comprises
vapor deposited high resistivity silicon carbide.
7. The focus ring of claim 1, wherein said focus ring comprises
chemical vapor deposited high resistivity silicon carbide.
8. The focus ring of claim 1, wherein said focus ring comprises
sintered high resistivity silicon carbide.
9. The focus ring of claim 1, wherein said focus ring comprises a
centering feature configured to center said focus ring on said
substrate holder.
10. The focus ring of claim 1, wherein said focus ring comprises
one or more wear indicators coupled to at least one of said upper
surface or said lower surface.
11. The focus ring of claim 10, wherein said one or more wear
indicators comprises a hole in said upper surface and extending to
a depth from said upper surface, said depth comprising a fraction
of the distance between said upper surface and said lower
surface.
12. The focus ring of claim 10, wherein said one or more wear
indicators comprise a hole in said lower surface and extending to a
depth from said lower surface, said depth comprising a fraction of
the distance between said upper surface and said lower surface.
13. The focus ring of claim 1, wherein said focus ring comprises a
plurality of layers, wherein at least one of said plurality of
layers comprises high resistivity silicon carbide.
14. The focus ring of claim 1, wherein said focus ring comprises a
coating applied to at least one of said upper surface, said lower
surface, said inner radial edge, and said outer radial edge.
15. The focus ring of claim 1, wherein said focus ring comprises a
step formed in said inner radial edge.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of Invention
[0002] The invention relates to a focus ring for use in a plasma
processing system and, more particularly, to a high resistivity
silicon carbide focus ring for use in a plasma etching system.
[0003] 2. Description of Related Art
[0004] The fabrication of integrated circuits (IC) in the
semiconductor industry typically employs plasma to create and
assist surface chemistry within a vacuum processing system
necessary to remove material from and deposit material to a
substrate. In general, plasma is formed within the processing
system under vacuum conditions by heating electrons to energies
sufficient to sustain ionizing collisions with a supplied process
gas. Moreover, the heated electrons can have energy sufficient to
sustain dissociative collisions and, therefore, a specific set of
gases under predetermined conditions (e.g., chamber pressure, gas
flow rate, etc.) are chosen to produce a population of charged
species and chemically reactive species suitable to the particular
process being performed within the system (e.g., etching processes
where materials are removed from the substrate or deposition
processes where materials are added to the substrate).
[0005] Although the formation of a population of charged species
(ions, etc.) and chemically reactive species is necessary for
performing the function of the plasma processing system (i.e.
material etch, material deposition, etc.) at the substrate surface,
other component surfaces on the interior of the processing chamber
are exposed to the physically and chemically active plasma and, in
time, can erode. The erosion of exposed components in the
processing system can lead to a gradual degradation of the plasma
processing performance and ultimately to complete failure of the
system. Therefore, in order to minimize the damage sustained by
exposure to the processing plasma, a consumable or replaceable
component, such as one fabricated from silicon, quartz, alumina,
carbon, or silicon carbide, can be inserted within the processing
chamber to protect the surfaces of more valuable components that
would impose greater costs during frequent replacement and/or to
affect changes in the process. Furthermore, it is desirable to
select surface materials that minimize the introduction of unwanted
contaminants, impurities, etc. to the processing plasma and
possibly to the devices formed on the substrate. Often times, these
consumables or replaceable components are considered part of the
process kit, which is frequently maintained during system
cleaning.
SUMMARY OF THE INVENTION
[0006] The invention relates to a focus ring for use in a plasma
processing system and, more particularly, to a high resistivity
silicon carbide focus ring for use in a plasma etching system.
[0007] According to one embodiment, a high resistivity silicon
carbide focus ring for use in a plasma etching system is described.
The focus ring comprises an upper surface, a lower surface, an
inner radial edge, and an outer radial edge, and is configured to
surround a substrate on a substrate holder in a plasma processing
system. The focus ring comprises high resistivity silicon carbide
having a resistivity greater than or equal to about 100 ohm-cm.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] In the accompanying drawings:
[0009] FIG. 1 provides a schematic illustration of a plasma
processing system according to an embodiment;
[0010] FIG. 2A shows a top view of a focus ring according to an
embodiment;
[0011] FIG. 2B shows a cross-sectional view of the focus ring
depicted in FIG. 2A;
[0012] FIG. 3A presents exemplary data for processing a
substrate;
[0013] FIG. 3B presents additional exemplary data for processing a
substrate; and
[0014] FIG. 4 illustrates a method of processing a substrate
according to an embodiment.
DETAILED DESCRIPTION OF SEVERAL EMBODIMENTS
[0015] A focus ring for use in a plasma processing system is
disclosed in various embodiments. However, one skilled in the
relevant art will recognize that the various embodiments may be
practiced without one or more of the specific details, or with
other replacement and/or additional methods, materials, or
components. In other instances, well-known structures, materials,
or operations are not shown or described in detail to avoid
obscuring aspects of various embodiments of the invention.
Similarly, for purposes of explanation, specific numbers,
materials, and configurations are set forth in order to provide a
thorough understanding of the invention. Nevertheless, the
invention may be practiced without specific details. Furthermore,
it is understood that the various embodiments shown in the figures
are illustrative representations and are not necessarily drawn to
scale.
[0016] Reference throughout this specification to "one embodiment"
or "an embodiment" means that a particular feature, structure,
material, or characteristic described in connection with the
embodiment is included in at least one embodiment of the invention,
but do not denote that they are present in every embodiment. Thus,
the appearances of the phrases "in one embodiment" or "in an
embodiment" in various places throughout this specification are not
necessarily referring to the same embodiment of the invention.
Furthermore, the particular features, structures, materials, or
characteristics may be combined in any suitable manner in one or
more embodiments. Various additional layers and/or structures may
be included and/or described features may be omitted in other
embodiments.
[0017] In material processing methodologies, pattern etching
comprises the application of a thin layer of radiation sensitive
material, such as photoresist, to an upper surface of a substrate,
that is subsequently patterned in order to provide a mask for
transferring this feature pattern to the underlying thin film
during etching. The patterning of the radiation-sensitive material
generally involves exposure of the lithographic layer to a
geometric pattern of electromagnetic (EM) radiation using, for
example, a micro-lithography system, followed by the removal of the
irradiated regions of the radiation-sensitive material (as in the
case of positive photoresist), or non-irradiated regions (as in the
case of negative photoresist) using a developing solvent.
[0018] In plasma processing, a focus ring can, for example, be
configured to surround a substrate on a substrate holder, and be
employed to adjust and/or control the properties of the process
chemistry local to the peripheral edge of the substrate. For
conventional plasma processing systems, the focus ring comprises a
ring of silicon, for instance for oxide etching, that rests atop
the substrate holder and surrounds the substrate periphery. For
other conventional plasma processing systems, the focus ring
comprises a ring of quartz, for instance for silicon etching, that
rests atop the substrate holder and surrounds the substrate
periphery. However, the inventors have observed that focus rings
prepared from conventional materials have caused non-uniform plasma
processing of the substrate. For example, the critical dimension
(CD) bias has been observed to vary across the substrate, which may
be unacceptable due to loss in device yield.
[0019] Therefore, according to an embodiment, a high resistivity
silicon carbide focus ring for use in a plasma etching system is
described. The focus ring comprises an upper surface, a lower
surface, an inner radial edge, and an outer radial edge, and is
configured to surround a substrate on a substrate holder in a
plasma processing system. The focus ring comprises high resistivity
silicon carbide having a resistivity greater than or equal to about
100 ohm-cm.
[0020] According to an embodiment, a plasma processing system 1 is
depicted in FIG. 1 comprising a plasma processing chamber 10, an
upper assembly 20, an electrode plate assembly 24, a substrate
holder 30 for supporting a substrate 35, and a pumping duct 40
coupled to a vacuum pump (not shown) for providing a reduced
pressure atmosphere 11 in plasma processing chamber 10. Plasma
processing chamber 10 can facilitate the formation of a processing
plasma in process space 12 adjacent substrate 35. The plasma
processing system 1 can be configured to process substrates of any
size, such as 200 mm substrates, 300 mm substrates, or larger. For
example, the plasma processing system 1 may comprise a plasma
etching system.
[0021] In the illustrated embodiment, electrode plate assembly 24
comprises an electrode plate 26 (FIG. 1) and an electrode 28 (FIG.
1). In an alternate embodiment, upper assembly 20 can comprise at
least one of a cover, a gas injection assembly, and an upper
electrode impedance match network. The electrode plate assembly 24
can be coupled to a source of radio frequency (RF) energy, such as
an RF generator. In another alternate embodiment, the upper
assembly 20 comprises a cover coupled to the electrode plate
assembly 24, wherein the electrode plate assembly 24 is maintained
at an electrical potential equivalent to that of the plasma
processing chamber 10. For example, the plasma processing chamber
10, the upper assembly 20, and the electrode plate assembly 24 can
be electrically connected to ground potential.
[0022] Plasma processing chamber 10 may further comprise an optical
viewport 16 coupled to a deposition shield 14. Optical viewport 16
may comprise an optical window 17 coupled to the backside of an
optical window deposition shield 18, and an optical window flange
19 may be configured to couple optical window 17 to the optical
window deposition shield 18. Sealing members, such as O-rings, can
be provided between the optical window flange 19 and the optical
window 17, between the optical window 17 and the optical window
deposition shield 18, and between the optical window deposition
shield 18 and the plasma processing chamber 10. Optical viewport 16
can permit monitoring of optical emission from the processing
plasma in process space 12.
[0023] Substrate holder 30 may further comprise a vertical
translational device 50 surrounded by a bellows 52 coupled to the
substrate holder 30 and the plasma processing chamber 10, and
configured to seal the vertical translational device 50 from the
reduced pressure atmosphere 11 in plasma processing chamber 10.
Additionally, a bellows shield 54 may be coupled to the substrate
holder 30 and configured to protect the bellows 52 from the
processing plasma. Substrate holder 30 further comprises a focus
ring 60, and may optionally comprise a shield ring 62. Furthermore,
a baffle plate 64 can extend about a periphery of the substrate
holder 30. The focus ring 60 comprises high resistivity silicon
carbide having a resistivity greater than or equal to about 100
ohm-cm.
[0024] Substrate 35 can be transferred into and out of plasma
processing chamber 10 through a slot valve (not shown) and chamber
feed-through (not shown) via robotic substrate transfer system
where it is received by substrate lift pins (not shown) housed
within substrate holder 30 and mechanically translated by devices
housed therein. Once substrate 35 is received from substrate
transfer system, it is lowered to an upper surface of substrate
holder 30.
[0025] Substrate 35 may be affixed to the substrate holder 30 via a
mechanical clamping system or an electrical clamping system, such
as an electrostatic clamping system. Furthermore, substrate holder
30 may further include a cooling system including a re-circulating
coolant flow that receives heat from substrate holder 30 and
transfers heat to a heat exchanger system (not shown), or when
heating, transfers heat from the heat exchanger system. Moreover,
gas may be delivered to the back-side of substrate 35 via a
backside gas system (not shown) to improve the gas-gap thermal
conductance between substrate 35 and substrate holder 30. Such a
system may be utilized when temperature control of the substrate is
required at elevated or reduced temperatures. In other embodiments,
heating elements, such as resistive heating elements, or
thermoelectric heaters/coolers may be included.
[0026] In the illustrated embodiment shown in FIG. 1, substrate
holder 30 may comprise an electrode through which RF power is
coupled to the processing plasma in process space 12. For example,
substrate holder 30 can be electrically biased at a RF voltage via
the transmission of RF power from a RF generator (not shown)
through an impedance match network (not shown) to substrate holder
30. The RF bias may serve to heat electrons to form and maintain
plasma. In this configuration, the system can operate as a reactive
ion etch (RIE) reactor, wherein the chamber and upper gas injection
electrode serve as ground surfaces. A typical frequency for the RF
bias can range from about 1 MHz to about 100 MHz, for example,
about 13.56 MHz. RF systems for plasma processing are well known to
those skilled in the art.
[0027] Alternately, the processing plasma in process space 12 can
be formed using a parallel-plate, capacitively coupled plasma (CCP)
source, an inductively coupled plasma (ICP) source, any combination
thereof, and with and without magnet systems. Alternately, the
processing plasma in process space 12 can be formed using electron
cyclotron resonance (ECR). In yet another embodiment, the
processing plasma in process space 12 is formed from the launching
of a Helicon wave. In yet another embodiment, the processing plasma
in process space 12 is formed from a propagating surface wave.
[0028] Referring now to an illustrated embodiment depicted in FIG.
2A (top plan view) and FIG. 2B (cross sectional view), a focus ring
600 is described. The focus ring 600 can form a ring comprising an
upper surface 603, a lower surface 604, an inner radial edge 601,
and an outer radial edge 602.
[0029] The focus ring 600 comprises high resistivity silicon
carbide having a resistivity greater than or equal to about 100
ohm-cm. Additionally, the resistivity of the silicon carbide may be
greater than or equal to 1000 ohm-cm. Additionally yet, the
resistivity of the silicon carbide may range from about 100 ohm-cm
to about 10.sup.6 ohm-cm.
[0030] The focus ring 600 comprises high resistivity silicon
carbide having a resistivity greater than or equal to about 100
ohm-cm at a temperature ranging from about 50 degrees C. to about
200 degrees C. For example, the temperature may be about 150
degrees C. Additionally, the resistivity of the silicon carbide may
be greater than or equal to 1000 ohm-cm at a temperature ranging
from about 50 degrees C. to about 200 degrees C. (for example, the
temperature may be about 150 degrees C.). Additionally, yet, the
resistivity of the silicon carbide may range from about 100 ohm-cm
to about 10.sup.6 ohm-cm at a temperature ranging from about 50
degrees C. to about 200 degrees C. (for example, the temperature
may be about 150 degrees C.). Low resistivity silicon carbide may
be considered to comprise a resistivity of less than about 10
ohm-cm at a temperature of about 150 degrees C.
[0031] Focus ring 600 may comprise high resistivity silicon
carbide. Alternatively, focus ring 600 may consist essentially of
high resistivity silicon carbide. Alternatively yet, focus ring 600
may consist of high resistivity silicon carbide.
[0032] Focus ring 600 may comprise vapor deposited high resistivity
silicon carbide. For example, focus ring 600 may comprise chemical
vapor deposited high resistivity silicon carbide. Alternatively,
focus ring 600 may comprise sintered high resistivity silicon
carbide. The manufacture of focus ring 600 may further comprise
machining, milling, planarizing, grinding, polishing, coating,
laser cutting, water-jet cutting, etc.
[0033] Focus ring 600 may comprise a plurality of layers, wherein
at least one of the plurality of layers comprises high resistivity
silicon carbide. Additionally, focus ring 600 may comprise a
coating applied to at least one of the upper surface 603, the lower
surface 604, the inner radial edge 601, and the outer radial edge
602. The coating may comprise a silicon-containing coating or a
ceramic coating. For example, the coating may comprise a vapor
deposited coating or a spray coating. Additionally, for example,
the coating may include at least one of a III-column element and a
Lanthanon element, for example. The coating may comprise at least
one of Al.sub.2O.sub.3, Yttria (Y.sub.2O.sub.3), Sc.sub.2O.sub.3,
Sc.sub.2F.sub.3, YF.sub.3, La.sub.2O.sub.3, CeO.sub.2,
Eu.sub.2O.sub.3, and DyO.sub.3. Methods of applying spray coatings
are well known to those skilled in the art of surface material
treatment.
[0034] The focus ring 600 can have a thickness ranging from about
0.5 to about 10 mm. Alternatively, the thickness can range from
about 1 to about 5 mm, or the thickness can be approximately 1
mm.
[0035] Focus ring 600 may comprise a centering feature configured
to center the focus ring 600 on the substrate holder. For example,
the centering feature may comprise a flat or a notch formed in the
outer radial edge 602 that is configured to mate with a similar
feature formed in the substrate holder. Furthermore, as illustrated
in FIG. 2B, focus ring 600 may comprise a step 610 formed in the
inner radial edge 601, and configured to mate in close proximity
with substrate 625.
[0036] Focus ring 600 may further comprise one or more wear
indicators coupled to at least one of the upper surface 603 or the
lower surface 604. For example, the one or more wear indicators may
comprise a blind hole formed in the upper surface 603 and extending
to a depth from the upper surface 603. The depth may comprise a
fraction of the distance between the upper surface 603 and the
lower surface 604. Additionally, for example, the one or more wear
indicators may comprise a blind hole formed in the lower surface
604 and extending to a depth from the lower surface 604. The depth
may comprise a fraction of the distance between the upper surface
603 and the lower surface 604. Each wear indicator may have a
constant length and width. Alternatively, each wear indicator may
have a different length, and/or different width. Alternatively yet,
each wear indicator may comprise a variable width along its length.
As the focus ring 600 erodes, the size of the blind hole
varies.
[0037] Visual inspection may be utilized to determine the extent of
erosion for focus ring 600. For example, this observation can be
made from run-to-run, while monitoring the focus ring 600 through
an optical window, such as the optical window 17 in FIG. 1.
[0038] Additionally, each wear indicator may be placed at different
radial locations on the focus ring 600 in order to observe radial
variations in the consumption of the focus ring 600. Alternatively,
each wear indicator may be placed at different azimuthal locations
on the focus ring 600 in order to observe azimuthal variations in
the consumption of the focus ring 600. A wear indicator may have a
length ranging from about 1 mm to about 5 mm. Alternatively, the
length may range from about 0.25 mm to about 1 mm, or the length
may be approximately 0.5 mm. Alternately, a wear indicator may be a
fraction of the thickness of focus ring 600 within a fractional
range from about 10% to about 90%. Alternatively, the fraction of
the focus ring thickness can have a fractional range from about 25
to about 75%, or the fraction of the focus ring thickness can be
approximately 50%. The one or more wear indicators may, for
example, be fabricated using at least one of machining, etching,
laser-milling, and sonic-milling.
[0039] Referring now to FIG. 4, an exemplary method for performing
a pattern transfer process is presented. The method includes a flow
chart 500 beginning in 510 with forming a film stack on a
substrate. The film stack may comprise a polysilicon layer, a hard
mask layer formed on the polysilicon (polycrystalline silicon)
layer, an anti-reflective coating (ARC) layer formed on the hard
mask layer, and a radiation sensitive layer formed on the ARC
layer. For example, the film stack may facilitate the formation of
a gate stack.
[0040] In 520, a pattern is formed in the radiation sensitive mask
layer using a lithographic process. The radiation sensitive mask
layer may include a resist. For example, the resist may comprise
248 nm (nanometer) resists, 193 nm resists, 157 nm resists, EUV
(extreme ultraviolet) resists, or electron sensitive resists. The
radiation sensitive layer may be formed using a track system. For
example, the track system can comprise a Clean Track ACT 8, ACT 12,
or Lithius resist coating and developing system commercially
available from Tokyo Electron Limited (TEL). Other systems and
methods for forming a photo-resist film on a substrate are well
known to those skilled in the art of spin-on resist technology. The
exposure to electromagnetic (EM) radiation may be performed in a
dry or wet photo-lithography system, or an electron beam
lithography system.
[0041] In 530, a lateral dimension of the radiation sensitive mask
layer is optionally trimmed. The trimming process may comprise an
etching process, such as a dry etching process or a wet etching
process. The dry etching process may include a dry plasma etching
process or a dry non-plasma etching process. For example, the
trimming process may include trimming the pattern by introducing a
process gas including as incipient ingredients a fluorocarbon gas
and an oxygen-containing gas, forming plasma from the process gas,
and exposing the substrate to the plasma.
[0042] In 540, the trimmed pattern is transferred to the ARC layer.
The pattern transfer process may comprise a first etching process,
such as a dry etching process or a wet etching process. The dry
etching process may include a dry plasma etching process or a dry
non-plasma etching process. For example, the first etching process
may include transferring the pattern by introducing a process gas
including as incipient ingredients a fluorocarbon gas and an
oxygen-containing gas, forming plasma from the process gas, and
exposing the substrate to the plasma. The first etching process for
transferring the trimmed pattern to the ARC layer may be performed
simultaneously with trimming the pattern. Furthermore, following
the transferring of the trimmed pattern to the ARC layer, an
over-etch process on the ARC layer may optionally be performed.
[0043] In 550, the trimmed pattern is transferred to the hard mask
layer using a second etching process, such as a dry etching process
or a wet etching process. The dry etching process may include a dry
plasma etching process or a dry non-plasma etching process. For
example, the second etching process may include introducing a
process gas including as incipient ingredients one or more
fluorocarbon gases, forming plasma from the process gas, and
exposing the substrate to the plasma.
[0044] In 560, the trimmed pattern is transferred to the
polysilicon layer using a third etching process, such as a dry
etching process or a wet etching process. The dry etching process
may include a dry plasma etching process or a dry non-plasma
etching process. For example, the third etching process may
comprise one or more etching steps using a halogen-containing
plasma chemistry, such as a HBr-containing plasma chemistry. The
one or more etch steps may include a first main etch step, a second
main etch step, and an over-etch step.
[0045] The trimming process, the first etching process, the second
etching process, the third etching process, and the over-etch
process(es) may be performed in a plasma processing system. The
plasma processing system may comprise various elements, such as
described in FIG. 1.
[0046] In one embodiment, a method of performing a pattern transfer
process on a substrate with reduced variability in process
performance across the substrate is provided. For example, a
process parameter space for a series of process steps can comprise
a chamber pressure of about 1 to about 1000 mtorr (1 torr) (e.g.,
about 10 mtorr to about 150 mtorr), a process gas flow rate ranging
from about 1 to about 1000 sccm, an upper electrode RF bias ranging
from about 0 to about 2000 W, and a lower electrode RF bias ranging
from about 10 to about 2000 W. Also, the upper electrode bias
frequency can range from about 0.1 MHz to about 200 MHz, e.g., 60
MHz. In addition, the lower electrode bias frequency can range from
about 0.1 MHz to about 100 MHz, e.g., 2 MHz.
[0047] According to an example, a method of reducing critical
dimension (CD) bias variability in a pattern transfer process is
presented. The process steps and parameters are provided in Table 1
for a quartz (QTZ) focus ring (F/R) having a low resistivity
silicon carbide base layer. Furthermore, the process steps and
parameters are provided in Table 2 for a high resistivity (H.R.)
silicon carbide (SiC) F/R.
[0048] Table 1 and Table 2 provide process conditions for the
pattern transfer process, including a trim/ARC pattern transfer
step (e.g., 530 and 540 in FIG. 8), an ARC over-etch step, a hard
mask pattern transfer step (e.g., 550 in FIG. 8), and a polysilicon
pattern transfer step (e.g., 560 in FIG. 8). The polysilicon
pattern transfer step includes a first polysilicon etch step, a
second polysilicon etch step, and an overetch step. For each step,
the pressure (P, mtorr), the RF power (coupled to the upper
electrode, UEL, and the lower electrode, LEL in watts, W), the flow
rate (standard cubic centimeters per minute, sccm) for each process
ingredient, the center (C) and edge (E) substrate backside
pressures (B.P.) (torr), and the temperature setting for the UEL
(T), chamber wall (W), substrate holder center (B) and edge (Edge)
are provided.
TABLE-US-00001 TABLE 1 POWER TEMP T/W/B QUARTZ (QTZ) F/R P UEL/LEL
SCCM B.P. (C/E) (Edge) PROCESS STEP (mtorr) (W) HBr O.sub.2
CF.sub.4 C.sub.4F.sub.8 CH.sub.2F.sub.2 He N.sub.2 (torr) (deg. C.)
TRIM/ARC PATTERN TRANSFER 12 300/0 12 48 10/50 80/60/68(53) ARC
OVER-ETCH 20 300/65 2.5 70 8 10/50 80/60/68(53) HARD MASK PATTERN
15 500/160 75 20 50 10/50 80/60/68(53) TRANSFER POLYSILICON ETCH
STEP 1 20 600/100 550 4 10/10 80/60/68(53) POLYSILICON ETCH STEP 2
10 300/30 250 4 60 10/10 80/60/68(53) POLYSILICON OVER-ETCH 40
135/45 500 9 440 10/10 80/60/68(53) O2 FLASH 150 375/0 200 3/3
80/60/68(53)
TABLE-US-00002 TABLE 2 POWER TEMP T/W/B H.R. SILICON CARBIDE (SiC)
F/R P UEL/LEL SCCM B.P. (C/E) (Edge) PROCESS STEP (mtorr) (W) HBr
O.sub.2 CF.sub.4 C.sub.4F.sub.8 CH.sub.2F.sub.2 He N.sub.2 (torr)
(deg. C.) TRIM/ARC PATTERN TRANSFER 12 300/0 12 48 10/50
80/60/70(65) ARC OVER-ETCH 20 300/65 2.5 70 8 10/50 80/60/70(65)
HARD MASK PATTERN 15 500/160 75 20 50 10/50 80/60/70(65) TRANSFER
POLYSILICON ETCH STEP 1 20 600/100 550 4 10/10 80/60/70(65)
POLYSILICON ETCH STEP 2 10 300/30 250 4 60 10/10 80/60/70(65)
POLYSILICON OVER-ETCH 40 135/45 500 9 440 10/10 80/60/70(65) O2
FLASH 150 375/0 200 3/3 80/60/70(65)
[0049] The pattern transfer process, illustrated in Table 1 and
Table 2, is conducted with a quartz F/R and a H.R. SiC F/R,
respectively. The CD bias (i.e., difference between the initial CD
and the final CD) is approximately the same for both F/Rs. For
example, with a quartz F/R, the CD bias is 25.6 nm (3.sigma.=3.5
nm) for dense structures (e.g., closely spaced structures) and the
CD bias is 25.5 nm (3.sigma.=3.2 nm) for isolated structures (e.g.,
widely spaced structures). Additionally, for example, with a H.R.
SiC F/R, the CD bias is 26.9 nm (3.sigma.=2.6 nm) for dense
structures (e.g., closely spaced structures) and the CD bias is
26.4 nm (3.sigma.=3.0 nm) for isolated structures (e.g., widely
spaced structures).
[0050] However, the variation in the CD bias across the substrate
is markedly different for the different F/R compositions. Referring
now to FIGS. 3A and 3B, the CD bias (A, angstroms) as a function of
the distance from the substrate center (m, millimeters) is provided
for dense structures and isolated structures, respectively. As
evident in both FIGS. 3A and 3B, the inventors have observed a
reduction in the CD bias variation particularly near the substrate
edge. For instance, with the quartz F/R, the variation may be as
great as 150 A. This variation is substantially reduced when
utilizing a high resistivity silicon carbide F/R. Furthermore, the
inventors have observed a reduction in particle generation with the
use of the H.R. SiC F/R versus the QTZ F/R.
[0051] Although only certain embodiments of this invention have
been described in detail above, those skilled in the art will
readily appreciate that many modifications are possible in the
embodiments without materially departing from the novel teachings
and advantages of this invention. Accordingly, all such
modifications are intended to be included within the scope of this
invention.
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