U.S. patent application number 11/518198 was filed with the patent office on 2007-01-11 for mask pattern inspecting method, inspection apparatus, inspecting data used therein and inspecting data generating method.
This patent application is currently assigned to Matsushita Electric Industrial Co., Ltd.. Invention is credited to Tadashi Tanimoto, Shinya Tokunaga, Hiroyuki Tsujikawa.
Application Number | 20070009147 11/518198 |
Document ID | / |
Family ID | 32732677 |
Filed Date | 2007-01-11 |
United States Patent
Application |
20070009147 |
Kind Code |
A1 |
Tokunaga; Shinya ; et
al. |
January 11, 2007 |
Mask pattern inspecting method, inspection apparatus, inspecting
data used therein and inspecting data generating method
Abstract
A method of inspecting a photomask for a semiconductor
integrated circuit formed based on drawing pattern data, includes
the steps of classifying a drawing pattern of the semiconductor
integrated circuit into a plurality of ranks in accordance with a
predetermined reference and extracting the same, determining
inspecting accuracy for each of the ranks, and deciding quality of
the photomask depending on whether the determined inspecting
accuracy is satisfied.
Inventors: |
Tokunaga; Shinya; (Kyoto,
JP) ; Tsujikawa; Hiroyuki; (Shiga, JP) ;
Tanimoto; Tadashi; (Shiga, JP) |
Correspondence
Address: |
MCDERMOTT WILL & EMERY LLP
600 13TH STREET, N.W.
WASHINGTON
DC
20005-3096
US
|
Assignee: |
Matsushita Electric Industrial Co.,
Ltd.
Osaka
JP
|
Family ID: |
32732677 |
Appl. No.: |
11/518198 |
Filed: |
September 11, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
10722346 |
Nov 26, 2003 |
7114144 |
|
|
11518198 |
Sep 11, 2006 |
|
|
|
Current U.S.
Class: |
382/144 |
Current CPC
Class: |
G03F 1/84 20130101; G06T
7/0004 20130101; G03F 7/70616 20130101; G06T 2207/30148
20130101 |
Class at
Publication: |
382/144 |
International
Class: |
G06K 9/00 20060101
G06K009/00 |
Foreign Application Data
Date |
Code |
Application Number |
Nov 26, 2002 |
JP |
P.2002-342304 |
Claims
1. A method of inspecting a photomask for a semiconductor
integrated circuit formed based on drawing pattern data, comprising
the steps of: classifying a drawing pattern of the semiconductor
integrated circuit into a plurality of ranks in accordance with a
reference depending on a feature of the drawing pattern and
extracting the same; determining inspecting accuracy for each of
the ranks; and deciding quality of the photomask depending on
whether the determined inspecting accuracy is satisfied for each
drawing pattern thus extracted.
2. The method of inspecting a photomask according to claim 1,
wherein the reference is a functional feature of the drawing
pattern, and the extracting step serves to classify the drawing
pattern into a plurality of ranks and to extract the same depending
on a circuit-functional feature of a pattern formed by the drawing
pattern.
3. The method of inspecting a photomask according to claim 2,
wherein the extracting step includes a step of classifying the
drawing pattern of the semiconductor integrated circuit into a
plurality of ranks and a step of extracting the same depending on
whether the drawing pattern is a dummy pattern.
4. The method of inspecting a photomask according to claim 3,
wherein the extracting step further includes a step of classifying
the drawing pattern into a plurality of ranks depending on whether
a pattern adjacent to the drawing pattern is a dummy pattern.
5. The method of inspecting a photomask according to claim 1,
wherein the extracting step a step of classifying the drawing
pattern of the semiconductor integrated circuit into a plurality of
ranks and to extract the same depending on whether the drawing
pattern has the same node.
6. The method of inspecting a photomask according to claim 1,
wherein the reference is a feature of a shape of the drawing
pattern, and the extracting step includes a step of classifying the
drawing pattern into a plurality of ranks and to extract the same
depending on the feature of the shape of the drawing pattern.
7. The method of inspecting a photomask according to claim 6,
wherein the extracting step serves to classify the drawing pattern
into a plurality of ranks and to extract the same based on a
distance from the closest pattern.
8. The method of inspecting a photomask according to claim 6,
wherein the extracting step serves to classify the drawing pattern
into a plurality of ranks and to extract the same based on a
distance from a corner of the drawing pattern.
9. The method of inspecting a photomask according to claim 1,
wherein the extracting step serves to classify the drawing pattern
into the ranks and to extract the same depending on the reference
for each pattern.
10. The method of inspecting a photomask according to claim 1,
wherein the extracting step serves to classify the drawing pattern
into the ranks and to extract the same depending on the reference
for each pattern edge.
11. The method of inspecting a photomask according to claim 1,
wherein the extracting step serves to classify the drawing pattern
into the ranks and to extract the same depending on the reference
for each area.
12. (canceled)
13. The method of inspecting a photomask according to claim 1,
wherein the deciding step serves to detect whether the drawing
pattern is a dummy pattern and to relax the accuracy condition when
the drawing pattern is the dummy pattern.
14. The method of inspecting a photomask according to claim 13,
wherein the deciding step serves to further relax the accuracy
condition when a pattern adjacent to the drawing pattern is the
dummy pattern.
15. The method of inspecting a photomask according to claim 1,
wherein the deciding step serves to detect whether at least two
patterns have the same node and to relax the accuracy condition
when they have the same node.
16. The method of inspecting a photomask according to claim 1,
wherein the deciding step serves to detect whether at least two
patterns have the same node based on a pattern in the same layer
and to relax the accuracy condition when they have the same
node.
17. The method of inspecting a photomask according to claim 1,
wherein the deciding step serves to detect whether at least two
patterns have the same node by a contact through a pattern in a
layer positioned on or under the layer, and to relax the accuracy
condition when they have the same node.
18. The method of inspecting a photomask according to claim 1,
wherein when the drawing pattern is a wiring pattern including a
contact array, the deciding step serves to detect whether one
contact array or more is/are taken and to change the accuracy
condition depending on whether one contact array or more is/are
taken.
19. The method of inspecting a photomask according to claim 1,
wherein when the drawing pattern is a pattern for forming a contact
hole, the deciding step serves to detect whether one contact array
or more is/are taken and to change the accuracy condition depending
on whether one contact array or more is/are taken.
20. The method of inspecting a photomask according to claim 1,
wherein the feature is a relational expression of a manufacturing
defect density and a manufacturing defect size, and the extracting
step includes a step of classifying the drawing pattern into two
ranks and a step of extracting the same depending on whether a
critical point determined by an intersection of the relational
expression of the manufacturing defect density and the
manufacturing defect size in a photomask and a relational
expression of a pattern area weighed by a manufacturing defect
generation probability on a pattern and the manufacturing defect
size is exceeded based on the critical point.
21. An apparatus for inspecting a photomask for a semiconductor
integrated circuit formed based on drawing pattern data,
comprising: means for classifying a drawing pattern of the
semiconductor integrated circuit into a plurality of ranks in
accordance with a predetermined feature reference and extracting a
plurality of pattern data; means for determining inspecting
accuracy which is required for each of the ranks and generating
accuracy data; and means for deciding whether the pattern data
satisfy the accuracy data for each of the classified pattern
data.
22. Inspecting data of a photomask for a semiconductor integrated
circuit formed based on drawing pattern data, comprising: a
plurality of pattern data extracted by a classification of a
drawing pattern of the semiconductor integrated circuit into a
plurality of ranks in accordance with a predetermined feature
reference; and accuracy data indicative of inspecting accuracy
which is required for each of the ranks.
23. A method of generating inspecting data of a photomask for a
semiconductor integrated circuit formed based on drawing pattern
data, comprising the steps of: classifying a drawing pattern of the
semiconductor integrated circuit into a plurality of ranks in
accordance with a predetermined feature reference and extracting a
plurality of pattern data; and determining inspecting accuracy
which is required for each of the ranks and generating accuracy
data.
Description
[0001] The present application is based on Japanese Patent
Application No. 2002-342304, which is incorporated herein by
reference.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a method of inspecting a
mask pattern, an inspection apparatus, inspecting data used therein
and a method of generating the inspecting data, and more
particularly to the extraction and inspection of inspecting
accuracy data in a process for inspecting a photomask.
[0004] 2. Description of the Related Art
[0005] In recent years, a semiconductor integrated circuit device
(hereinafter referred to as an LSI) in each product is evaluated as
a key device, and an increase in the scale and speed of the LSI has
been required in order to maintain the competitiveness of the
product. A fine process is necessary with the microfabrication of
an element and an increase in integration.
[0006] Under the circumstances, process conditions have been
increasingly restricted in order to form a pattern as designed.
[0007] In the formation of the semiconductor integrated circuit
device, an isolation is carried out over the surface of a
semiconductor substrate and a well having a desirable concentration
is formed, and an impurity diffusion region having a desirable
conductivity type is formed in the well, and furthermore, an
insulating film is formed and a wiring pattern is provided.
[0008] For example, in the formation of the wiring pattern, a
photolithographic step of forming a conductive film such as a
polycrystalline silicon layer, an aluminum layer or a metal
silicide layer and then carrying out exposure through a photomask
to form a desirable mask pattern is carried out, and etching is
performed by using the mask pattern as a mask, thereby forming the
wiring pattern.
[0009] At the etching step, the conductive film exposed from the
mask pattern is selectively removed. Even if various conditions
such as the concentration and temperature of an etchant are
optimized, an etching speed is varied depending on the density
(area ratio) of the mask pattern, and furthermore, the peripheral
length of the mask pattern. For this reason, accuracy in etching is
varied depending on the density of the mask pattern or a pattern
pitch. Even if a mask pattern region is excessively large or small,
the accuracy in the etching is reduced.
[0010] Moreover, the formation of a diffusion layer also has the
same problems. If an ion implantation region for forming the
diffusion layer is too small, the concentration of the ion is
generated so that a desirable diffusion profile cannot be obtained.
Accordingly, the accuracy in the photomask for forming the mask
pattern for diffusion is also very important.
[0011] In each process, a pattern is formed by using the photomask.
The pattern accuracy of the mask pattern on the photomask greatly
depends on the accuracy in the pattern formation in the process.
Therefore, a demand for an enhancement in the accuracy has been
increased.
[0012] Under the circumstances, at a defect inspecting step,
necessary accuracy for a region which is to have the highest
accuracy in a photomask to be inspected is acquired from a
photomask designer and an inspection is carried out by using a
value thereof as a reference value. Thus, an effort to reduce the
defect of the photomask has been made.
[0013] For this reason, over one photomask, all regions are
inspected based on the same inspection reference. Therefore, a
defect set within such a range as not to originally influence an
actual circuit operation is treated to be present, and correction
or manufacture is carried out again. Consequently, there is a
problem in that a time (TAT) required from an order to a completion
is increased.
[0014] Moreover, the photomask is expensive. Therefore, a sudden
rise in a cost caused by the necessity of a large number of
photomask blanks for carrying out the manufacture again is also a
serious problem.
[0015] In a recent process for manufacturing a semiconductor
integrated circuit, moreover, there has been proposed a method of
CMP (Chemical Mechanical Etching) for flattening the surface of a
substrate. For example, this method serves to form an insulating
film on a surface by a coating method of a CVD method and to then
carry out chemical etching while performing mechanical polishing,
thereby flattening the surface. In the case in which the pattern
density of a wiring layer to be a lower layer is low and there is a
region including a pattern having a predetermined area or less,
however, the flattening cannot be carried out even if the
insulating film is formed thickly. As a result, a region having no
wiring pattern after the CMP becomes a concave portion so that a
dent state is maintained.
[0016] In the case in which the layout pattern has a deviation,
thus, sufficient pattern accuracy for the layer cannot be obtained.
In addition, there is a problem in that the pattern accuracy of an
upper layer is also influenced. Consequently, there is a problem in
that the process accuracy cannot be sufficiently obtained.
[0017] Therefore, it is conceived to extract the area ratio of the
mask pattern from the layout pattern of a semiconductor chip,
additionally providing a dummy pattern to the layout pattern to
adapt the area ratio of the mask pattern of a layer constituting
the layout pattern in consideration of the optimum area ratio of
the layout pattern of the layer obtained based on the process
conditions of the layer, thereby setting the layer to have the
optimum area ratio.
[0018] A photomask to be a very important element in such an
increase in accuracy in a pattern is used through a defect
inspecting step.
[0019] Also in the inspection, necessary accuracy in a portion in
which the toughest accuracy conditions in the photomask to be
inspected is acquired from the designer of the photomask and the
inspection is carried out by using the data.
[0020] According to this method, it is possible to advance the
inspection without specifying a place having the toughest portion
in the creation and inspection of the photomask. Thus, a yield can
be enhanced.
[0021] Description will be given to a conventional photomask
inspecting flow with reference to the drawings.
[0022] FIG. 25 is a flow chart showing a conventional photomask
inspection.
[0023] In this method, first of all, the pattern of a photomask is
created based on a design rule (step 101). Next, the pattern of the
photomask thus obtained is converted into data for photomask
drawing and data are transferred to the manufacturing division of
the photomask or another manufacturing company thereof so that a
photomask is started to be actually manufactured (step 102).
[0024] The minimum value of the design rule of a pattern is
specified as inspection accuracy data when the data are thus
transferred (step 106).
[0025] On the other hand, the photomask manufacturing division or
another manufacturing company thereof draws a pattern on a
photomask blank by using the drawing data of the photomask formed
at the step 102, thereby forming the photomask (step 103).
[0026] Next, the result of the pattern formation is decided based
on the inspecting accuracy data obtained at the step 106 (step
104).
[0027] Then, it is decided that only the pattern formation decided
to be within the range of the inspecting accuracy data is
acceptable (step 105).
[0028] With the recent microfabrication of a process, however, a
minimum pattern width and a minimum interval tend to be
increasingly reduced. For example, consideration will be given to
the case in which there is formed a photomask including patterns
210 to 213 having a minimum width which is arranged at a minimum
interval 203 as shown in FIG. 26A and patterns 214 to 216 provided
at a large interval 204 as shown in FIG. 26B. For example, it is
assumed that the tolerance of a defect formed in a pattern having
the minimum interval 203 is set to have a size represented by an
allowable defect 201. At this time, in the case in which a pattern
defect 206 having a smaller size than the size of the defect 201,
it is decided that this is the tolerance at the inspecting
step.
[0029] In the case in which there is a pattern defect 202 having a
greater size than the size of the allowable defect 201, moreover,
it is decided that the photomask is a defect in the inspection
because the defect 202 is larger than the allowable defect 201 at
the inspecting step.
[0030] However, the allowable defect 201 has one size in the same
photomask and the same processing is carried out based on the
allowable defect 201 in any region having a great pattern
width.
[0031] For this reason, in the case in which there is the pattern
defect 202 having a greater size than the size of the allowable
defect 201, the interval 204 is much greater than the minimum
interval 203 as shown in FIG. 26B. Therefore, it is decided that
the defect 202 is also a defect at the inspecting step between the
patterns 214 and 215. Even if such a defect is thus present in the
region having a great interval in an actual design rule, however,
there is no problem. In spite of the foregoing, a correcting step
is started so that a step of carrying out an inspection again is
added.
[0032] In the conventional method, thus, a demand for inspecting
accuracy corresponding to the minimum interval 203 is given over
the whole photomask. Therefore, it is decided that the defect 202
having such a size as not to make troubles is also a defect at the
inspecting step.
[0033] Also in the case in which the same defect is generated and
patterns might be actually short-circuited with each other, there
is no problem when an adjacent pattern has the same node or a dummy
pattern is formed for the purpose. Accordingly, it is not necessary
to carry out the correction. However, the same defect is decided to
be a defect in this case, the correcting step is started and the
step of carrying out the inspection again is added.
[0034] Therefore, the inspection is executed with unnecessary
accuracy so that a correction frequency is increased. Consequently,
there is an obvious problem in that a reduction in a photomask
creating period (TAT) and a decrease in the cost of creation are
hindered.
SUMMARY OF THE INVENITION
[0035] In consideration of the actual circumstances, the invention
has been made and has an object to provide a method of inspecting a
photomask which can shorten a TAT and decrease a cost.
[0036] It is another object to provide an apparatus for inspecting
a photomask which can shorten the TAT and decrease the cost.
[0037] It is yet another object to provide inspecting data capable
of shortening the TAT and decreasing the cost in order to create
the photomask.
[0038] It is a further object to provide a method of generating
inspecting data which can shorten the TAT and decrease the cost in
order to create the photomask.
[0039] In order to attain the objects, a method according to the
invention is characterized in that accuracy data on each pattern
are extracted based on the feature of the pattern and an inspection
is carried out based on the accuracy data so that the inspection
can be performed with high accuracy.
[0040] Hereupon, the pattern constituting a semiconductor
integrated circuit indicates a pattern constituting a functional
region excluding the scribe line on a wafer.
[0041] More specifically, the invention provides a method of
inspecting a photomask for a semiconductor integrated circuit
formed based on drawing pattern data, comprising the steps of
classifying a drawing pattern of the semiconductor integrated
circuit into a plurality of ranks in accordance with a reference
depending on a feature of the drawing pattern and extracting the
same, determining inspecting accuracy for each of the ranks, and
deciding quality of the photomask depending on whether the
determined inspecting accuracy is satisfied. When a pad region has
a large pattern, moreover, it is desirable that the pad region
should be set to be a separate accuracy region having a low rank
and the region excluding the region should be classified into a
plurality of ranks to create inspecting data.
[0042] According to this method, accuracy data on each pattern are
extracted and are classified into a plurality of ranks to carry out
the inspection with high accuracy based on the feature of the
pattern. Consequently, it is possible to create a photomask having
a high reliability in a short time. Moreover, a sudden rise in a
cost can be prevented from being caused by recreation to obtain
unnecessary accuracy. Thus, the cost can be reduced.
[0043] It is desirable that the inspection can be carried out more
properly if the accuracy data are classified into a plurality of
ranks and are thus extracted corresponding to the functional
feature of the drawing pattern. The functional feature implies that
the inspection is carried out in consideration of a feature based
on the function of the pattern, that is, a circuit-functional
feature of a pattern formed by the drawing pattern. For example, in
the case in which the drawing pattern of the photomask includes the
pattern of a gate electrode defining the channel length of a
transistor or the case in which the drawing pattern of the
photomask includes a mask pattern for ion implantation to form a pn
junction to be a region defining a sensor area, these patterns are
to have higher accuracy. In case of the same node or a dummy
pattern, moreover, the accuracy may be lower than that in other
regions. Thus, it is possible to classify the accuracy into ranks
corresponding to the functional feature of the pattern, thereby
carrying out the inspection more properly at a high speed.
[0044] It is desirable that the extracting step should serve to
classify the drawing pattern of the semiconductor integrated
circuit into a plurality of ranks and to extract the same depending
on whether the drawing pattern is a dummy pattern.
[0045] In case of the dummy pattern, the accuracy may be lower than
that in other regions. Accordingly, a higher speed inspection is
made possible by inspecting the dummy pattern in accordance with a
reference independent of the reference for other patterns. A higher
speed inspection is also made possible by inspecting patterns other
than the real pattern and not formed directly on the wafer, e.g.,
assist bar, sub-opening portion in the phase shift mask in
accordance with a reference independent of the reference for other
patterns.
[0046] Further, the extracting step may further include a step of
classifying the drawing pattern into a plurality of ranks depending
on whether a pattern adjacent to the drawing pattern is a dummy
pattern.
[0047] When the pattern adjacent to the dummy pattern is not a
dummy pattern, the accuracy is required even if the drawing pattern
is a dummy pattern. On the other hand, the dumpy patterns are
adjacent with each other, the accuracy is not required. A high
speed inspection is made possible by classifying these cases.
[0048] It is desirable that the extracting step should serve to
classify the drawing pattern of the semiconductor integrated
circuit into a plurality of ranks and to extract the same depending
on whether the drawing pattern has the same node.
[0049] It is desirable that the inspection can be carried out more
properly if the drawing pattern is classified into a plurality of
ranks and is thus extracted corresponding to the feature of the
shape of the drawing pattern. For example, the inspection can be
carried out more efficiently by a method of classifying the drawing
pattern into a plurality of ranks and extracting the same based on
a distance from the closest pattern, or classifying the drawing
pattern into a plurality of ranks and extracting the same based on
a distance from the corner of the drawing pattern.
[0050] Moreover, the unit of the classification can easily be
sliced by classifying each pattern into a plurality of ranks and
extracting the same corresponding to the reference. Thus, the
classification can efficiently be carried out.
[0051] Referring to the unit of the classification, moreover, each
line (pattern edge) is classified into a plurality of ranks and is
thus extracted corresponding to the reference. In some cases, thus,
small data are sufficient and an operation can easily be carried
out. For example, in the case in which the classification is
carried out depending on a distance from the closest pattern, a
data processing can easily be performed by using an inspection for
each unit.
[0052] Referring to the unit of the classification, furthermore,
each area is classified into a plurality of ranks and is thus
extracted corresponding to the reference. Consequently, slicing as
a unit can be more simplified and the classification can
efficiently be carried out. For example, in the case in which a
plurality of patterns having the same node is extracted, the
processing can easily be carried out by using a classifying method
for each area.
[0053] Desirably, a decision can be made more properly if the
accuracy condition is changed to make the decision depending on an
increase or decrease in the pattern width of the mask pattern of
the photomask. For example, incase of a line and space pattern, it
is necessary to use accuracy conditions considering a distance from
the closest pattern to be set within a predetermined range or more
when an error is made in such a direction as to increase the
pattern width of the mask pattern. On the other hand, when the
error is made in such a direction as to decrease the pattern width,
it is necessary to use the accuracy conditions considering the
pattern width to be a predetermined width or more.
[0054] Whether the pattern is a dummy pattern is detected. If the
accuracy conditions are relaxed when the pattern is the dummy
pattern, it is possible to prevent a photomask to be originally
acceptable from being rejected on unnecessary accuracy
conditions.
[0055] Even if the drawing pattern is a dummy pattern, the accuracy
condition alters depending on which pattern is an adjacent pattern.
Accordingly, if the accuracy conditions are relaxed when the
pattern adjacent to the dummy pattern is a dummy pattern, it is
possible to prevent a photomask to be originally acceptable from
being rejected on unnecessary accuracy conditions.
[0056] Moreover, whether a plurality of patterns has the same node
is detected, and the accuracy conditions are relaxed when they have
the same node. For example, if two adjacent patterns have the same
node, they may be close to each other. If a contact is made through
a plurality of contact holes, moreover, it is preferable that any
of contact hole patterns should function. In the case in which
there is a plurality of patterns having the same node, thus, they
may be conducted or any of them preferably functions in many cases
and the accuracy conditions may be relaxed in many cases.
[0057] In the case in which the same node is obtained by a pattern
in the same layer, moreover, a decision can be made by only the
drawing data. Consequently, an inspecting easiness is particularly
high and this method is effective.
[0058] Also in the case in which a contact is made through a
pattern in a layer positioned on the upper or lower layers so that
the same node is obtained, furthermore, this method is
effective.
[0059] Moreover, when the drawing pattern is a wiring pattern
including a contact array, the deciding step serves to detect
whether one contact array or more is/are taken and to change the
accuracy condition depending on whether one contact array or more
is/are taken. In the case in which a plurality of contact arrays is
taken, there is no problem of a characteristic if any of them is
formed normally. Consequently, the accuracy condition may be
relaxed.
[0060] Furthermore, when the drawing pattern is a pattern for
forming a contact hole, the deciding step serves to detect whether
one contact array or more is/are taken and to change the accuracy
condition depending on whether one contact array or more is/are
taken. In the case in which a plurality of contact arrays is taken,
similarly, there is no problem of a characteristic if any of them
is formed normally. Consequently, the accuracy condition may be
relaxed.
[0061] A high-speed wiring region may be a high accuracy
region.
[0062] Moreover, accuracy may be more decreased for an additional
capacity region which is added in order to reduce a noise.
[0063] It is desirable that the extracting step should serve to
classify the drawing pattern into two ranks and to extract the same
depending on whether a critical point determined by an intersection
of a relational expression of a manufacturing defect density and a
manufacturing defect size and a relational expression of a pattern
area weighed by a manufacturing defect generation probability and
the manufacturing defect size is exceeded based on the critical
point. Consequently, it is possible to optimize the trade-off
between a yield and a mask inspecting cost.
[0064] It is desirable that an apparatus for inspecting a photomask
for a semiconductor integrated circuit formed based on drawing
pattern data should comprise means for classifying a drawing
pattern of the semiconductor integrated circuit into a plurality of
ranks in accordance with a predetermined reference and extracting a
plurality of pattern data, means for determining inspecting
accuracy which is required for each of the ranks and generating
accuracy data, and means for deciding whether the pattern data
satisfy the accuracy data for each of the classified pattern
data.
[0065] Moreover, the invention provides inspecting data of a
photomask for a semiconductor integrated circuit formed based on
drawing pattern data, comprising a plurality of pattern data
extracted by a classification of the drawing pattern of the
semiconductor integrated circuit into a plurality of ranks in
accordance with a predetermined reference, and accuracy data
indicative of inspecting accuracy which is required for each of the
ranks.
[0066] By using the data, it is possible to provide a photomask
having a high reliability at a high speed with a low cost.
[0067] The invention provides a method of generating inspecting
data, comprising the steps of classifying a drawing pattern of a
semiconductor integrated circuit into a plurality of ranks in
accordance with a predetermined reference and extracting a
plurality of pattern data, and determining inspecting accuracy
which is required for each of the ranks and generating accuracy
data.
[0068] According to the method, it is possible to form inspecting
data capable of providing a photomask having a high reliability at
a high speed with a low cost.
[0069] Hereupon, a drawing pattern of the semiconductor integrated
circuit indicates a pattern constituting a region excluding a
scribe line in a semiconductor region on a wafer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0070] In the accompanying drawings:
[0071] FIG. 1 is an inspecting flow chart showing a photomask
inspecting method according to a first embodiment of the
invention;
[0072] FIG. 2 is a view showing a semiconductor integrated circuit
to be inspected according to the first embodiment of the
invention;
[0073] FIG. 3 is an explanatory view showing the transistor portion
of the semiconductor integrated circuit;
[0074] FIG. 4 is an explanatory view showing the inspecting
method;
[0075] FIG. 5 is a flow chart showing an inspecting step in the
inspecting flow according to the first embodiment of the
invention;
[0076] FIG. 6 is a view showing an inspecting method according to a
second embodiment of the invention;
[0077] FIG. 7 is a view showing an inspecting method according to a
third embodiment of the invention;
[0078] FIGS. 8A to 8D are views showing an inspecting method
according to a fourth embodiment of the invention;
[0079] FIGS. 9A to 9D are views showing an inspecting method
according to a fifth embodiment of the invention;
[0080] FIG. 10 is a flow chart showing the inspecting method
according to the fifth embodiment of the invention;
[0081] FIGS. 11A to 11D are views showing an inspecting method
according to a sixth embodiment of the invention;
[0082] FIGS. 12A to 12D are views showing an inspecting method
according to a seventh embodiment of the invention;
[0083] FIGS. 13A to 13D are views showing an inspecting method
according to an eighth embodiment of the invention;
[0084] FIGS. 14A to 14D are views showing an inspecting method
according to a ninth embodiment of the invention;
[0085] FIG. 15 is a diagram showing an inspecting method according
to a tenth embodiment of the invention;
[0086] FIG. 16 is a chart showing an inspecting method according to
an eleventh embodiment of the invention;
[0087] FIGS. 17A to 17C are views showing the inspecting method
according to the eleventh embodiment of the invention;
[0088] FIGS. 18A to 18C are views showing an inspecting method
according to a twelfth embodiment of the invention;
[0089] FIG. 19 is a view showing an inspecting method according to
a thirteenth embodiment of the invention;
[0090] FIG. 20 is a view showing an inspecting method according to
a fourteenth embodiment of the invention;
[0091] FIG. 21 is a view showing an inspecting method according to
a fifteenth embodiment of the invention;
[0092] FIG. 22 is a view showing an inspecting method according to
a sixteenth embodiment of the invention;
[0093] FIG. 23 is a view showing an inspecting method according to
a seventeenth embodiment of the invention;
[0094] FIGS. 24A and 24B are views showing an inspecting method
according to an eighteenth embodiment of the invention;
[0095] FIG. 25 is a flow chart showing an inspecting method
according to a conventional example; and
[0096] FIGS. 26A and 26B are views showing the inspecting method
according to the conventional example.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0097] Next, description will be given to a photomask inspecting
method according to an embodiment of the invention.
First Embodiment
[0098] In a photomask inspecting method according to the invention,
when inspecting a photomask for a semiconductor integrated circuit
formed based on drawing pattern data, a drawing pattern of the
semiconductor integrated circuit is classified into a plurality of
ranks in accordance with a predetermined reference and is thus
extracted, inspecting accuracy is determined for each of the ranks,
and quality of the photomask is decided depending on whether the
determined inspecting accuracy is satisfied.
[0099] FIG. 1 shows a photomask inspecting flow according to the
embodiment. While constant accuracy is specified from a design rule
over a whole photomask in a conventional inspecting flow,
inspecting accuracy data 306 are separately formed based on a
photomask pattern obtained at a photomask pattern design step 101
and the inspection of the photomask is executed based on an
inspecting accuracy reference set for each pattern area on the
basis of the inspecting accuracy data 306.
[0100] More specifically, first of all, the inspecting accuracy
data 306 are separately formed based on the photomask pattern
obtained at the photomask pattern design step 101.
[0101] For example, as shown in a typical view of an example in
FIG. 2, only a transistor region 2 is extracted from a layout
pattern 1 of a polycrystalline silicon layer including a gate
wiring. The transistor region 2 thus extracted is constituted by
forming source and drain regions in an active region 4 surrounded
by an isolating region (not shown) as shown in an enlarged view
showing a main part in FIG. 3. A portion in which the gate wiring 3
is provided over the active region 4 acts as a portion for
determining a channel length.
[0102] As shown in FIG. 4, accordingly, a gate wiring 3T provided
on the active region 4 is a region for greatly depending on a
transistor characteristic. Therefore, pattern accuracy is to be
very high. On the other hand, a region 3C other than the gate
wiring 3T provided on the active region 4 may be rougher than the
gate wiring 3T provided on the active region 4.
[0103] In the pattern of the gate wiring 3, the gate wiring 3T
provided on the active region 4 is set to be an A rank region RA
and the gate wiring 3C, a gate other than the active region and
whole other portions in the chip are set to be a B rank region RB,
and these patterns are separately extracted. The pattern accuracy
for the inspection is set to be higher in the A rank than that in
the B rank and data are created in two stages.
[0104] Thus, photomask drawing data (layout pattern data) are
created at a step 102 based on the layout pattern data obtained at
the photomask pattern design step 101.
[0105] Based on the layout pattern data obtained at the step 101,
then, the pattern region is divided into two ranks having the A
rank and the B rank and inspecting accuracy data 306 in each
division are created.
[0106] The inspecting accuracy data thus obtained are extracted
together with the photomask drawing data obtained at the step 102
and are transferred to a photomask creating division or
company.
[0107] In the photomask creating division or company receiving the
photomask drawing data obtained at the step 102 and the inspecting
accuracy data 306 obtained at the step 306, thereafter, a pattern
is continuously formed on a photomask blank through a photomask
drawing process (step 103).
[0108] Next, the defect of the photomask pattern thus formed is
inspected with necessary accuracy for each region based on the
inspecting accuracy data 306 (step 104).
[0109] At the inspecting step 104, as shown in FIG. 5, only a
region corresponding to the inspecting region having the A rank (RA
in FIG. 4) is extracted from the formed photomask pattern (step
401) and it is decided whether the inspecting region is set within
the range of the inspecting accuracy (step 402).
[0110] If it is decided that the inspecting region is set within
the range of the inspecting accuracy at the step 402, thereafter,
it is decided whether the residual region, that is, the inspecting
region having the B rank (a whole region other than RA in FIG. 4,
that is, a region of a chip 1 in FIG. 2) is set within the range of
the inspecting accuracy (step 403).
[0111] If it is decided that the inspecting region is set within
the range of the inspecting accuracy at the step 403, it is set to
be acceptable and the processing proceeds to a shipping step 105 in
FIG. 1.
[0112] On the other hand, if it is decided that the range of the
inspecting accuracy is exceeded at the step 403, the inspecting
region is set to be rejected and the processing returns to the step
103 again in which the photomask is manufactured.
[0113] If it is decided that the range of the inspecting accuracy
is exceeded at the step 402, moreover, the inspecting region is set
to be rejected and the processing returns to the step 103 again in
which the photomask is manufactured.
[0114] If the manufacture and the inspection are thus repeated and
it is decided that there is no defect at the inspecting step 104,
an inspection accepted product is shipped (step 105).
[0115] According to this method, importance is particularly
attached to the maintenance of a channel length to be the
functional feature of a gate wiring, and a region to influence the
channel length is set to be the region having the rank A and is
caused to have higher pattern accuracy. In this method,
accordingly, the inspection is carried out by using the inspecting
accuracy data with high accuracy for only the region having the
rank A requiring the high pattern accuracy, while an accuracy
reference is more relaxed to carry out the inspection in the region
having the rank B requiring no high pattern accuracy. Therefore,
the inspection is not unnecessarily strict and the inspection is
carried out in a short time, and furthermore, an inspecting defect
is detected in an early stage. Correspondingly, a cost can be
reduced.
[0116] Thus, the inspection can be carried out with optimum
inspecting accuracy in a short time and a photomask of high quality
can be formed at a low cast. Moreover, a TAT can be shortened.
[0117] At the deciding step, there is often employed a method of
carrying out an observation based on the accuracy conditions while
observing a pattern on the photomask by using a microscope. It is
also possible to pick up an image by a CCD camera and to carry out
an image processing using an image pick-up pattern as image data,
thereby extracting a pattern and referring to accuracy data every
extracted pattern to make a decision. For the decision itself,
moreover, a comparative decision processing may be carried out by
the image processing, thereby implementing an automatic
processing.
Second Embodiment
[0118] While the classification of the inspecting rank is specified
for each region in the first embodiment, it may be specified for
each pattern.
[0119] More specifically, as shown in FIG. 6, only the gate pattern
of a region constituting a true gate region in the gate wiring 3 is
set to be an An inspecting rank pattern PA corresponding to an
inspecting rank with high accuracy, and the other patterns are set
to be a B inspecting rank pattern PB corresponding to a lower
rank.
[0120] Also in this case, at a photomask inspecting step, the
embodiment is the same as the first embodiment except that a method
of extracting inspecting data and an inspecting reference are
different.
[0121] By this method, similarly, a channel length can reliably be
maintained and a photomask of high quality can be implemented in a
short time at a low cost in the same manner as in the first
embodiment. By this method, particularly, it is possible to produce
an advantage that data indicative of an inspecting rank can be
formed on drawing data (mask pattern data) as compared with the
first embodiment.
Third Embodiment
[0122] While the classification of the inspecting rank is specified
for each region in the first embodiment, moreover, it may be
specified by the edge of a pattern.
[0123] More specifically, as shown in FIG. 7, only the gate pattern
edge of a region constituting a true gate region in a gate wiring 3
is set to be an An inspecting rank edge EA corresponding to an
inspecting rank with high accuracy, and the other patterns are set
to be a B inspecting rank edge EB corresponding to a lower
rank.
[0124] Also in this case, the embodiment is the same as the first
embodiment except that a method of extracting inspecting data and
an inspecting reference are different at a photomask inspecting
step.
[0125] According to this method, it is possible to obtain an
advantage that a deciding rank can be set every edge as compared
with the first embodiment.
Fourth Embodiment
[0126] Next, description will be given to a fourth embodiment of
the invention.
[0127] While the inspecting method aiming at the maintenance of the
channel length of a gate wiring in a transistor has been described
in the first to third embodiments, description will be given to an
inspecting method which particularly pays attention to the
detection of a shift in the contact of a gate wiring pattern having
a hole such as a contact hole and the prevention of a contact error
in this example.
[0128] Attention is paid to the presence of a contact hole h for a
contact with the gate wiring of a transistor and an inspecting rank
is classified.
[0129] More specifically, in the transistor array chip shown in
FIG. 2, a region having the contact hole h over a gate wiring
pattern 3 is particularly inspected in an inspecting rank with high
accuracy as shown in FIG. 8A.
[0130] As shown in FIG. 8B, specification is carried out by a
region, and a square region having a predetermined size which has a
contact hole as a center is set to be an An inspecting rank region
RA having a high accuracy rank and the other regions are set to be
a B inspecting rank region RB, which are used as inspecting
data.
[0131] At an inspecting step, the inspection is executed in
accordance with the same flow chart as that shown in FIG. 5.
[0132] According to such a structure, the inspection is carried out
with higher accuracy in the vicinity of the contact hole.
Consequently, a contact error can be reduced and a photomask having
a high reliability can be formed at a high speed.
[0133] As a variant of the fourth embodiment, moreover,
specification is carried out by a pattern, and only a gate pattern
provided in the vicinity of the contact hole h in the gate wiring 3
is set to be an An inspecting rank pattern PA corresponding to an
inspecting rank with high accuracy and the other patterns are set
to be a B inspecting rank pattern PB corresponding to a lower rank
as shown in FIG. 8C.
[0134] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0135] According to this method, it is possible to produce an
advantage that a mask inspecting cost can be more reduced while
suppressing a damage on a yield as compared with the first
embodiment.
[0136] As a variant of the fourth embodiment, moreover,
specification is carried out by an edge, and only a gate pattern
edge provided in the vicinity of the contact hole h in the gate
wiring 3 is set to be an An inspecting rank edge EA corresponding
to an inspecting rank with high accuracy and the other patterns are
set to be a B inspecting rank edge EB corresponding to a lower rank
as shown in FIG. 8D.
[0137] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0138] According to this method, it is possible to produce an
advantage that a deciding rank can be set for each edge as compared
with the first embodiment.
[0139] While the photomask for the gate wiring of a semiconductor
integrated circuit constituting a transistor array has been
described in the embodiment, it is apparent that the photomask can
also be applied to other semiconductor integrated circuits.
Fifth Embodiment
[0140] Next, description will be given to a fifth embodiment of the
invention.
[0141] In the first to third embodiments, there has been described
the inspecting method which particularly attaches importance to the
maintenance of the channel length to be the functional feature of
the gate wiring of the transistor. In the fourth embodiment, there
has been described the inspecting method which particularly
attaches importance to the maintenance of the contact to be the
functional feature of the gate wiring of the transistor. Both of
these are functional features and description will be given to an
inspecting method which particularly pays attention to the feature
of a shape.
[0142] Description will be given by taking, as an example, the
photomask for a gate wiring to form the transistor array chip shown
in FIG. 2.
[0143] In this example, a corner portion C of a pattern is slightly
smooth except for a signal transmitting section of a high frequency
circuit and does not influence a characteristic in many cases.
Taking note of this respect, in the transistor array chip shown in
FIG. 2, a region provided in the vicinity of the corner portion C
is inspected in an inspecting rank with particularly low accuracy
over a gate wiring pattern 3 as shown in FIG. 9A.
[0144] As shown in FIG. 9B, specification is carried out by a
region determined through the wavelength of a light source for
exposure and a pattern interval, and a square region is set to be a
B inspecting rank region RB having a lower accuracy rank and the
other regions are set to be an An inspecting rank region RA, which
are used as inspecting data.
[0145] Referring to an inspecting step, an inspection is executed
in accordance with the same flow chart as that shown in FIG. 5.
[0146] First of all, the square region provided in the vicinity of
the corner portion is set to be the B inspecting rank region RB
having a lower accuracy rank and the other regions are set to be
the An inspecting rank region RA as described above, and the defect
of a photomask pattern which is formed is inspected with necessary
accuracy for each region based on inspecting accuracy data created
with a classification into ranks in two stages (step 104).
[0147] At the inspecting step 104, as shown in FIG. 10, only a
region corresponding to an inspecting region having a B rank (see
FIG. 9B) is extracted from the formed photomask pattern (step
1001), and it is decided whether the inspecting region is set
within the range of the inspecting accuracy (step 1002).
[0148] If it is decided that the inspecting region is set within
the range of the inspecting accuracy at the step 1002, it is
decided whether a residual region, that is, the inspecting region
having the A rank (all regions other than B in FIG. 9B) is set
within the range of the inspecting accuracy (step 1003).
[0149] If it is decided that the inspecting region is set within
the range of the inspecting accuracy at the step 1003, a product is
accepted and the processing proceeds to the shipping step 105 in
FIG. 1.
[0150] On the other hand, if it is decided that the inspecting
region exceeds the range of the inspecting accuracy at the step
1003, the product is rejected and the processing returns to the
step 103 again in which the photomask is manufactured.
[0151] If it is decided that the inspecting region exceeds the
range of the inspecting accuracy at the step 1002, moreover, the
product is rejected and the processing returns to the step 103
again in which the photomask is manufactured.
[0152] Thus, the manufacture and the inspection are repeated and a
product decided to have no defect at the inspecting step 104 is
shipped as an inspecting accepted product (step 105).
[0153] According to such a structure, attention is paid to the
shape of a pattern and a region corresponding to the corner portion
of the pattern is inspected with accuracy reduced. Therefore, a
variation which does not make troubles of functions is set to be
acceptable. Thus, a product which is originally decided to be
rejected by the inspection is accepted. Thus, a yield can be
enhanced and a photomask having a high reliability can be formed at
a high speed.
[0154] As a variant of the fifth embodiment, moreover,
specification is carried out by a pattern, and only a pattern in
the corner of the gate wiring 3 is set to be a B inspecting rank
pattern PB corresponding to an inspecting rank with low accuracy
and the other patterns are set to be an An inspecting rank pattern
PA corresponding to a higher rank as shown in FIG. 9C. Herein, the
rank is determined based on a distance from the corner.
[0155] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0156] By this method, similarly, it is possible to produce an
advantage that data indicative of the inspecting rank can be
particularly formed on drawing data (mask pattern data) as compared
with the first embodiment.
[0157] As a variant of the fifth embodiment, moreover,
specification is carried out by an edge, and only a pattern edge in
the corner portion of the gate wiring 3 is set to be a B inspecting
rank edge EB corresponding to an inspecting rank with low accuracy
and the other patterns are set to be an An inspecting rank edge EA
corresponding to a higher rank as shown in FIG. 9D.
[0158] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0159] According to this method, it is possible to produce an
advantage that a deciding rank can be set for each edge as compared
with the first embodiment.
[0160] While the photomask for the gate wiring of a semiconductor
integrated circuit constituting a transistor array has been
described in the embodiment, it is apparent that the photomask can
also be applied to other semiconductor integrated circuits.
Sixth Embodiment
[0161] Next, a sixth embodiment of the invention will be
described.
[0162] In the invention, description will be given to an inspecting
method in which a classification is carried out based on the
feature of a shape, particularly, the interval of a wiring, thereby
dividing an accuracy rank successively to the fifth embodiment.
[0163] Description will be given by taking, as an example, the
photomask for a gate wiring to form the transistor array chip shown
in FIG. 2.
[0164] In this example, the photomask is applied to the case in
which the formation is carried out through a process for generating
a defect in such a direction that the pattern is thickened, and the
inspecting standards of a region having a small line width in a
region in which a wiring is particularly formed on the pattern at a
high density are set to be high and the inspecting standards of the
other regions are set to be low. In the transistor array chip shown
in FIG. 2, lines 11a, 11b and 11c are arranged in a line and space
region as shown in FIG. 11A. Taking note of intervals w1 and w2
between these lines, a region in which the interval w1 has a
certain value or less is set to be a higher inspecting region, and
the other regions are particularly inspected in an inspecting rank
having accuracy reduced.
[0165] As shown in FIG. 11B, specification is carried out by a
region, and a region having a small line interval w1 is set to be
an An inspecting rank region RA having a higher accuracy rank and
the other regions are set to be a B inspecting rank region RB,
which are used as inspecting data.
[0166] At an inspecting step, the inspection is executed in
accordance with the same flow chart as that shown in FIG. 5.
[0167] Thus, the manufacture and the inspection are repeated and a
product decided to have no defect at the inspecting step 104 is
shipped as an inspecting accepted product (step 105).
[0168] According to such a structure, attention is paid to the
shape of a pattern and a region having a small line interval is
inspected with an increase in accuracy. Therefore, the inspection
is carried out with high accuracy for only a region requiring a
high accuracy pattern. Consequently, a product which is originally
decided to be rejected by the inspection is accepted. Thus, a yield
can be enhanced and a photomask having a high reliability can be
formed at a high speed.
[0169] As a variant of the sixth embodiment, moreover,
specification is carried out by a pattern, and only a pattern
having a small line interval in a gate wiring 3 is set to be an An
inspecting rank pattern PA corresponding to an inspecting rank with
high accuracy and the other patterns are set to be a B inspecting
rank pattern PB corresponding to a lower rank as shown in FIG.
1C.
[0170] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0171] According to this method, similarly, it is possible to
produce an advantage that data indicative of the inspecting rank
can be particularly formed on drawing data (mask pattern data) as
compared with the first embodiment.
[0172] As a variant of the sixth embodiment, moreover,
specification is carried out by an edge, and only a pattern edge of
a pattern having a small wiring interval in the gate wiring 3 is
set to be an An inspecting rank edge EA corresponding to an
inspecting rank with high accuracy and the other patterns are set
to be a B inspecting rank edge EB corresponding to a lower rank as
shown in FIG. 11D.
[0173] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0174] According to this method, it is possible to produce an
advantage that a deciding rank can be set for each edge as compared
with the first embodiment.
[0175] While the photomask for the gate wiring of a semiconductor
integrated circuit constituting a transistor array has been
described in the embodiment, it is apparent that the photomask can
also be applied to other semiconductor integrated circuits.
Seventh Embodiment
[0176] Next, a seventh embodiment of the invention will be
described.
[0177] In the embodiment, description will be given to an
inspecting method in which a classification is carried out based on
the feature of a shape, particularly, a wiring width, thereby
dividing an accuracy rank successively to the sixth embodiment.
[0178] Description will be given by taking, as an example, the
photomask for a gate wiring to form the transistor array chip shown
in FIG. 2.
[0179] In this example, the photomask is applied to the case in
which the formation is carried out through a process for generating
a defect in such a direction that the pattern is thinned, and the
inspecting standards of a region having a small line width in a
region in which a wiring is particularly formed on the pattern at a
high density are set to be high and the inspecting standards of the
other regions are set to be low, which are used as inspecting data.
In the transistor array chip shown in FIG. 2, lines 12a and 12b are
arranged in a line and space region as shown in FIG. 12A. Taking
note of line widths L1 and L2, a region in which the line width L1
has a predetermined value or less is set to be a higher inspecting
region, and the other regions are particularly inspected in an
inspecting rank having accuracy reduced.
[0180] As shown in FIG. 12B, specification is carried out by a
region, and a region having a small line width L1 is set to be an
An inspecting rank region RA having a higher accuracy rank and the
other regions are set to be a B inspecting rank region RB.
[0181] At an inspecting step, the inspection is executed in
accordance with the same flow chart as that shown in FIG. 5.
[0182] Thus, the manufacture and the inspection are repeated and a
product decided to have no defect at the inspecting step 104 is
shipped as an inspecting accepted product (step 105).
[0183] According to such a structure, attention is paid to the
shape of a pattern and a region having a small line width is
inspected with an increase in accuracy. Therefore, the inspection
is carried out with high accuracy for only a region requiring a
high accuracy pattern. Consequently, a product which is originally
decided to be rejected by the inspection is accepted. Thus, a yield
can be enhanced and a photomask having a high reliability can be
formed at a high speed.
[0184] As a variant of the seventh embodiment, moreover,
specification is carried out by a pattern, and only a pattern
having a small line width in a gate wiring 3 is set to be an An
inspecting rank pattern PA corresponding to an inspecting rank with
high accuracy and the other patterns are set to be a B inspecting
rank region PB corresponding to a lower rank as shown in FIG.
12C.
[0185] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0186] According to this method, similarly, it is possible to
produce an advantage that data indicative of the inspecting rank
can be particularly formed on drawing data (mask pattern data) as
compared with the first embodiment.
[0187] As a variant of the sixth embodiment, moreover,
specification is carried out by an edge, and only a pattern edge of
a pattern having a small wiring width in the gate wiring 3 is set
to be an An inspecting rank edge EA corresponding to an inspecting
rank with high accuracy and the other patterns are set to be a B
inspecting rank edge EB corresponding to a lower rank as shown in
FIG. 12D.
[0188] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0189] According to this method, as compared with the embodiments,
it is possible to produce an advantage that a yield can be
maintained stably without depending on the direction of a defect
(an increase and decrease in the pattern width) as compared with
the embodiments.
[0190] While the photomask for the gate wiring of a semiconductor
integrated circuit constituting a transistor array has been
described in the embodiment, it is apparent that the photomask can
also be applied to other semiconductor integrated circuits.
Eighth Embodiment
[0191] Next, an eighth embodiment of the invention will be
described.
[0192] In the embodiment, description will be given to a method of
inspecting a photomask for forming a contact hole and inspecting
data. Description will be given to an inspecting method of carrying
out a classification and dividing an accuracy rank to relax
inspecting standards in the case in which a functional feature,
that is, a plurality of contact holes having the same node is
present successively to the first embodiment.
[0193] Description will be given by taking, as an example, a
photomask for forming a contact hole which serves to form the
transistor array chip shown in FIG. 2.
[0194] This example is applied to the case in which a defect is
generated in such a direction that a pattern is thinned, that is,
the case in which an etching section is tapered by isotropic
etching. Therefore, inspecting standards in a region on a pattern
where a plurality of contact holes having the same node is present
are set to be lower than those in the other regions. In the
transistor array chip shown in FIG. 2, when contact hole patterns
13a and 13b shown in FIG. 13A are arranged, attention is paid to
these forming situations and the region where a plurality of
contact holes having the same node is present is particularly
inspected in an inspecting rank with lower accuracy than that in
the other regions.
[0195] As shown in FIG. 13B, specification is carried out by a
region, and a region in which a plurality of contact holes having
the same node is present is set to be a B inspecting rank region RB
having a lower accuracy rank and the other regions are set to be an
An inspecting rank region RA, which a reused as inspecting
data.
[0196] At an inspecting step, the inspection is executed in
accordance with the same flow chart as that shown in FIG. 10.
[0197] Thus, the manufacture and the inspection are repeated and a
product decided to have no defect at the inspecting step 104 is
shipped as an inspecting accepted product (step 105).
[0198] According to such a structure, attention is paid to the
shape situation of a pattern and a region in which a plurality of
contact holes having the same node is present is inspected in a
lower accuracy rank. Therefore, a product which is originally
decided to be rejected by the inspection is accepted. Thus, a yield
can be enhanced and a photomask having a high reliability can be
formed at a high speed.
[0199] As a variant of the eighth embodiment, moreover,
specification is carried out by a pattern, and only a pattern 13b
in which a plurality of contact holes having the same node is
present is set to be a B inspecting rank pattern PB corresponding
to an inspecting rank with low accuracy and the other regions are
set to be an An inspecting rank pattern PA corresponding to a
higher rank as shown in FIG. 13C.
[0200] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0201] According to this method, it is possible to produce an
advantage that data indicative of the inspecting rank can be formed
on drawing data (mask pattern data).
[0202] As a variant of the eighth embodiment, moreover,
specification is carried out by an edge, and a pattern edge of a
contact hole edge where a plurality of contact holes having the
same node is present is set to be a B inspecting rank edge EB
corresponding to an inspecting rank with lower accuracy and the
other regions are set to be an An inspecting rank edge EA
corresponding to a higher rank as shown in FIG. 13D.
[0203] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0204] According to this method, it is possible to produce an
advantage that a deciding rank can be set for each edge as compared
with the first embodiment.
[0205] While the photomask for the gate wiring of a semiconductor
integrated circuit constituting a transistor array has been
described in the embodiment, it is apparent that the photomask can
also be applied to other semiconductor integrated circuits.
[0206] Moreover, the case in which a plurality of contact holes
having the same node is present in a close region has been
described in the embodiment. From a viewpoint in which it is
sufficient that a contact can be made through any contact hole, it
is preferable that the same inspecting method should be used also
when the contact holes having the same node are present in
separated positions.
[0207] While the description will be given to the inspection to be
carried out in such a direction that the pattern is thinned in the
process, that is, the size of the contact hole is decreased in the
embodiments, moreover, the same inspection is carried out for
etching in such a direction that overetching is generated to
thicken the pattern, that is, the size of an opening region is
increased.
Ninth Embodiment
[0208] Next, a ninth embodiment of the invention will be
described.
[0209] In the eighth embodiment, the description has been given to
the method of inspecting a photomask for forming a contact hole and
the inspecting data. In this example, description will be given to
an inspecting method of carrying out a classification to divide an
accuracy rank in order to relax inspecting standards when a defect
is generated in such a direction that a pattern is thickened in
case of a functional feature, particularly, a pattern having the
same node successively to the eighth embodiment in a photomask for
forming a wiring pattern such as a gate wiring.
[0210] Description will be given by taking, as an example, the
photomask for forming a contact hole which serves to form the
transistor array chip shown in FIG. 2.
[0211] This example is applied to the case in which a defect is
generated in such a direction that a pattern is thickened, and
inspecting standards in a region including the patterns having
different nodes in a region are set to be higher than the
inspecting standards of the other regions. In the transistor array
chip shown in FIG. 2, when lines 14a and 14b shown in FIG. 14A are
arranged, attention is paid to these functional situations and a
region including the patterns having different nodes is inspected
in an inspecting rank with particularly higher accuracy than that
in the other regions.
[0212] As shown in FIG. 14B, specification is carried out by a
region, and a region in which a plurality of patterns having
different nodes is present is set to be an An inspecting rank
region RA and the region having the same node is set to be a B
inspecting rank region RB. The accuracy is reduced to more decrease
the inspecting rank of accuracy in the B inspecting rank region
than that in the An inspecting rank region RA and this is used as
inspecting data.
[0213] At an inspecting step, the inspection is executed in
accordance with the same flow chart as that shown in FIG. 10.
[0214] Thus, the manufacture and the inspection are repeated and a
product decided to have no defect at the inspecting step 104 is
shipped as an inspecting accepted product (step 105).
[0215] According to such a structure, attention is paid to the
shape situation of a pattern, and only a region in which the
patterns having the different nodes is inspected in a higher
accuracy rank and a region in which a plurality of patterns having
the same node is present is inspected in a lower accuracy rank.
Therefore, a product which is originally decided to be rejected by
the inspection is accepted. Thus, a yield can be enhanced and a
photomask having a high reliability can be formed at a high
speed.
[0216] As a variant of the ninth embodiment, moreover,
specification is carried out by a pattern, and only the pattern 14b
in which a plurality of patterns having different nodes is present
is set to be an An inspecting rank pattern PA corresponding to an
inspecting rank with high accuracy and the other regions are set to
be a B inspecting rank pattern PB corresponding to a lower rank as
shown in FIG. 14C.
[0217] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0218] According to this method, it is possible to produce an
advantage that data indicative of the inspecting rank can be formed
on drawing data (mask pattern data).
[0219] As a variant of the ninth embodiment, moreover,
specification is carried out by an edge, and an adjacent pattern
edge of the pattern edge having the same node is set to be a B
inspecting rank edge EB corresponding to an inspecting rank with
lower accuracy and the other patterns are set to be an An
inspecting rank edge EA corresponding to a higher rank as shown in
FIG. 14D.
[0220] Also in this case, the same photomask inspecting step as
that in the embodiments is executed except that a method of
extracting inspecting data and an inspecting reference are
different.
[0221] According to this method, it is possible to produce an
advantage that a deciding rank can be set for each edge as compared
with the first embodiment.
[0222] While the photomask for the gate wiring of a semiconductor
integrated circuit constituting a transistor array has been
described in the embodiment, it is apparent that the photomask can
also be applied to other semiconductor integrated circuits.
[0223] In the embodiments, furthermore, it is decided whether the
same node is used depending on whether the patterns in the same
layer are connected to each other. By carrying out a connection
through a contact hole over the upper or lower layer, it is also
possible to carry out a classification based on the same node also
in the case in which the same node is to be constituted.
Tenth Embodiment
[0224] Next, a tenth embodiment of the invention will be
described.
[0225] While the inspecting data are formed based on the layout
pattern of a semiconductor integrated circuit in the embodiments,
information taking note of a circuit function may be extracted from
a net list to classify an inspecting rank. FIG. 15 is a flow
chart.
[0226] More specifically, a critical net is extracted from a net
list (step 1501).
[0227] The critical net includes a clock net, a timing constraint
setting net, an analog net and a high-speed signal net.
[0228] A layout pattern is extracted from the critical net (step
1502).
[0229] Pattern data for a photomask are extracted from the layout
pattern (step 1503).
[0230] Then, an inspecting rank is classified corresponding to each
function (step 1504).
[0231] Thus, information is extracted from the net list based on a
classification reference to which attention is paid. Consequently,
it is possible to extract inspecting data at a higher speed.
Eleventh Embodiment
[0232] Next, an eleventh embodiment of the invention will be
described.
[0233] While the description has been given to the inspecting
method of forming inspecting data and using the same in the
embodiments, a method of determining the threshold of inspecting
accuracy will be described in the embodiment.
[0234] The embodiment is characterized in that the threshold of the
inspecting accuracy is determined based on a critical point
determined by an intersection of a relational expression of the sum
of pattern areas weighed at the manufacturing defect generation
probability of a photomask for a semiconductor integrated circuit
and a manufacturing defect size and a relational expression of a
manufacturing defect density and the manufacturing defect size.
[0235] In this example, as shown in FIG. 16, there is obtained an
intersection C of a relational curve A of the sum of the pattern
are as weighed at the manufacturing defect generation probability
of the photomask and the manufacturing defect size and a relational
curve De(x) of the manufacturing defect density and the
manufacturing defect size. An inspection with higher accuracy is
used for a smaller pattern than C.
[0236] The reason is as follows. A yield is calculated from an area
RD to be a product of the relational curve A and the relational
curve De(x). In a smaller region than the intersection C, a
fluctuation in a pattern dimension directly influences the
yield.
[0237] Herein, an axis of ordinate indicates the sum of the pattern
are as weighed at the manufacturing defect generation probability
and the manufacturing defect density, and an axis of abscissa
indicates the manufacturing defect size.
[0238] The threshold of the weighing of the manufacturing defect
generation probability to be used in the relational curve A is
determined based on a method shown in FIGS. 17A to 17C.
[0239] This method investigates the case in which defects D1 to D3
are formed on a pattern on the assumption of a line and space Ln
having a line width of l and an interval of S.
[0240] As shown in FIG. 17A, when a size x of the defect D1 is
smaller than the interval S, there is no short-circuit defect.
[0241] As shown in FIG. 17B, moreover, when the size x of the
defect D1 is greater than the interval S and is smaller than 21+S,
there is a short-circuit defect according to circumstances.
[0242] As shown in FIG. 17C, furthermore, when the size x of the
defect D1 is greater than 21+S, there is the short-circuit
defect.
[0243] In the case in which an open defect is generated, moreover,
the open defect and an interval between a line and a space are
reversed to each other.
Twelfth Embodiment
[0244] Next, a twelfth embodiment of the invention will be
described.
[0245] In the embodiment, a structure is formed in order to
optimize an area ratio in a manufacturing process and to reduce a
noise through an additional capacity in a semiconductor integrated
circuit chip. With this structure, a bypass capacitor having an MOS
structure using a diffusion region of the same conductivity type as
that of a substrate (P well) is automatically provided as a bypass
capacitor under a power wiring region extended to an empty region,
and a substrate contact provided under a ground wiring and the
bypass capacitor provided under the power wiring are coupled to
each other through a diffusion. Description will be given to a
method of inspecting a photomask for forming the structure.
[0246] More specifically, FIGS. 18A to 18C (FIGS. 18B and 18C are
A-A and B-B sectional views of FIG. 18A, respectively) are views
showing a semiconductor integrated circuit formed by using a
photomask obtained by the inspecting method according to the
embodiment. FIG. 18A is a plan view in which the substrate contact
is provided under the ground wiring and a bypass capacitor having
an MOS structure using a diffusion region of the same conductivity
type as that of a substrate is automatically provided as a bypass
capacitor under a power wiring, and the substrate contact provided
under the ground wiring and the bypass capacitor provided under the
power wiring are coupled to each other through a diffusion.
[0247] According to the embodiment, the bypass capacitor is
automatically provided under the power wiring extended to the empty
region so that the area ratio in the manufacturing process can be
optimized, and furthermore, the pattern of a ground wiring 1805 and
a substrate contact formation diffusion region 1816 do not need to
have high accuracy in the region extended to the empty region when
the area of the chip is increased. Moreover, the substrate contact
formation diffusion region 1816 formed under the ground wiring 1805
is extended and connected to a bypass capacitor formation diffusion
region 1815 provided under a power wiring 1801. Consequently, the
power wiring and the bypass capacitor, and the ground wiring 1805
and the bypass capacitor are connected to each other through a
lower resistance than that of the substrate having a high
resistance. Also in this functional sense and because of a large
number of contacts 1807 provided in the same node, high accuracy is
not required.
[0248] Accordingly, a pattern region for forming an additional
capacity which is provided in the empty region is a dummy pattern
having the same node, and a pattern region having lower accuracy is
set to be a B rank region RB and a pattern region for forming the
other regions is set to be an A rank region RA requiring the
conditions with higher accuracy. Consequently, it is possible to
obtain a photomask having a high reliability at a high speed and a
low cost.
[0249] FIGS. 18A to 18C are plan views showing a graphic pattern
according to the embodiment of the invention, in which a substrate
contact is provided under the ground wiring 1805 and a bypass
capacitor having an MOS structure using a diffusion region of the
same conductivity type as that of the substrate is automatically
provided as a bypass capacitor under the power wiring 1801 extended
to an additional formation region, and a substrate contact provided
under the ground wiring and the bypass capacitor provided under the
power wiring are coupled to each other through a diffusion. A
diffusion region 1817 for forming the bypass capacitor and the
diffusion region 1816 for the substrate contact have the same
polarity and are formed integrally with each other.
Thirteenth Embodiment
[0250] Next, a thirteenth embodiment of the invention will be
described.
[0251] As shown in FIG. 14C in the ninth embodiment, furthermore,
the description has been given to the classification of the line
pattern 14b having the rank A and the line pattern 14a having the
rank B in the line and space pattern. There will be considered an
example of a classification in which a dummy pattern 14c is formed
between the line pattern 14b having the rank A and the line pattern
14a having the rank B as shown in FIG. 19.
[0252] In the embodiment, a classification into pattern ranks PA
and PB is carried out, and furthermore, the dummy pattern is set to
be a pattern rank PC which may have lower accuracy and inspecting
accuracy is reduced.
[0253] Consequently, a yield can be enhanced and a photomask having
a high reliability can be formed at a higher speed.
Fourteenth Embodiment
[0254] Next, a fourteenth embodiment of the invention will be
described.
[0255] As shown in FIG. 14C in the ninth embodiment, furthermore,
the description has been given to the classification of the line
pattern 14b having the rank A and the line pattern 14a having the
rank B in the line and space pattern. There will be considered an
example of a classification in which a dummy pattern 501c is formed
between the line pattern 502b having the rank A and the line
pattern 502a having the rank B as shown in FIG. 20.
[0256] In the embodiment, a classification into pattern ranks PA
and PB is carried out, and further, the dummy pattern is set to be
a pattern rank PC which may have lower accuracy and furthermore,
the dummy pattern is set to be a pattern rank PD which has the
lowest accuracy, and inspecting accuracy is reduced.
[0257] More specifically, when the edges of the dummy patterns are
adjacent, the pattern accuracy is not necessary. On the other hand,
in the region where the dummy pattern is adjacent to the adjacent
pattern, the pattern accuracy is made necessary. Accordingly, a
classification of the dummy pattern is carried out such that the
dummy pattern is set to be a rank C in the region adjacent to the
line pattern 502b having the rank A and the dummy pattern is set to
be a rank D in the region adjacent to the line pattern 502a having
the rank B.
[0258] Consequently, a yield can be enhanced and a photomask having
a high reliability can be formed at a higher speed.
[0259] If the classification is carried out in two stages, that is,
the accuracy rank is once classified depending on whether a pattern
has the same node, and furthermore, whether the pattern is dummy,
thus, the processing can be carried out at a higher speed so that
the yield can be enhanced.
[0260] Moreover, a classification in a plurality of stages is also
effective, that is, the classification is carried out based on the
feature of a shape and is further performed based on a functional
feature.
Fifteenth Embodiment
[0261] Next, a fifteenth embodiment of the invention will be
described.
[0262] While only the mask pattern to be resolved over the wafer
has been described in the embodiments, it is necessary to change
inspecting accuracy for the mask pattern which is not resolved over
the wafer. In some cases, furthermore, it is necessary to consider
the relationship between the function of the mask pattern itself
and a peripheral pattern.
[0263] In the embodiment, description will be given to the
inspection of a mask using a mask technique in which a density is
substantially made uniform by the addition of very small
graphics.
[0264] As shown in FIG. 21, a so-called assist bar (a scattering
bar) uses a body pattern 601 to be body data, and four assist bars
602a to 602d separated from the body pattern 601 along the
peripheral edge of the body pattern 601 by a predetermined interval
a and designed to have such a width as not to be resolved over the
wafer. With this structure, inspecting accuracy can be reduced. In
this structure, the following three respects are set to be
conditions and pattern accuracy is decided for the assist bar. The
following is taken into consideration. Only whether the following
conditions are satisfied is set to bean inspecting condition, and a
decision of "accepted" is given if the condition is satisfied:
1. Whether each of the assist bars 602a to 602d overlaps with the
body pattern 601 through a defect in an enlarging direction (an
increase in a pattern);
2. Whether the pattern of the assist bar is resolved over the wafer
through the defect in the enlarging direction (the increase in the
pattern); and
3. Whether the pattern of the assist bar over the mask disappears
through the defect in a reducing direction (a decrease in the
pattern).
[0265] In the embodiment, a classification into two portions is
carried out, that is, the body data pattern is set to be a pattern
rank PA and the assist bar is set to be a pattern rank PB, and
furthermore, the result of the assist bar is decided according to
the inspecting condition determined in accordance with the three
specific inspecting conditions.
[0266] Thus, it is possible to form a photomask at a higher speed
with a high yield.
Sixteenth Embodiment
[0267] Next, a sixteenth embodiment of the invention will be
described.
[0268] Description will be given to the inspection of a mask
comprising a phase shift pattern referred to as an enhancer mask
for a contact. This technique serves to form a pattern having a
high-resolution through a main opening portion and a sub-opening
portion provided on a periphery thereof in order to implement a
very fine process. The main opening portion of the mask inverts the
phase of a translucent substrate to be a mask base member by 180
degrees through digging to have the same phase as the phase of a
shielding film formed in a halftone surrounding the main opening
portion (a difference of 360 degrees).
[0269] In the embodiment, as shown in FIG. 22, there are used a
body pattern 701 constituting the main opening portion, and four
sub-opening portions 702a to 702d separated from the body pattern
701 along the peripheral edge of the body pattern 701 by a
predetermined interval d1 and designed to have such a width as not
to resolve the opening portion itself over the wafer. With this
structure, inspecting accuracy can be reduced. In this structure,
the following two respects are set to be conditions and pattern
accuracy is decided for the sub-opening portion. The following is
taken into consideration. Only whether the following conditions are
satisfied is set to be an inspecting condition, and a decision of
"accepted" is given if the condition is satisfied:
1. Whether the sub-opening portion overlaps with each of the body
patterns 702a to 702d through a defect in an enlarging direction
(an increase in a pattern); and
2. Whether the pattern of the sub-opening portion disappears
through the defect in a reducing direction (a decrease in the
pattern).
[0270] In the embodiment, a classification into two portions is
carried out, that is, the pattern of the body opening portion is
set to be a pattern rank PA and the pattern of the sub-opening
portion is set to be a pattern rank PB, and furthermore, the result
of the sub-opening portion is decided according to the inspecting
condition determined in accordance with the two specific inspecting
conditions.
[0271] Thus, it is possible to form a photomask at a higher speed
with a high yield.
Seventeenth Embodiment
[0272] Next, a seventeenth embodiment of the invention will be
described below.
[0273] While the description has been given to the enhancer mask
having the opening portion for a contact constituted by the main
opening portion and the sub-opening portion in the embodiment,
there will be described the inspection of a mask comprising a phase
shift pattern referred to as an enhancer mask for a line. Referring
to the mask, a phase shift of 180 degrees is arranged in a body
pattern 801 comprising a shielding portion constituting a line
pattern to form a thin line, and a portion other than the body
pattern constitutes an opening of 0 degree.
[0274] In the embodiment, as shown in FIG. 23, the body pattern 801
constituting the shielding portion constituted by a halftone
pattern is formed and a phase shifter pattern 802 of 180 degrees is
formed in the body pattern 801, and the phase shifter pattern
itself is designed to have such a width as not to be resolved over
the wafer. With this structure, inspecting accuracy for the phase
shifter pattern can be reduced. In this structure, accordingly, the
following two respects are set to be conditions and pattern
accuracy is decided by setting inspecting accuracy for the phase
shifter pattern to be a rank B and the other inspecting accuracy to
be a rank A.
[0275] The phase shifter pattern is decided as to only whether the
following conditions are satisfied. The following is taken into
consideration. Only whether the following conditions are satisfied
is set to be an inspecting condition, and a decision of "accepted"
is given if the condition is satisfied:
1. Whether the phase shifter pattern 802 overlaps with the body
pattern 801 through a defect in an enlarging direction (an increase
in a pattern); and
2. Whether the pattern of the phase shifter disappears through the
defect in a reducing direction (a decrease in the pattern).
[0276] In the embodiment, a classification into two portions is
carried out, that is, the body pattern is set to be a pattern rank
PA and the phase shifter is set to be a pattern rank PB, and
furthermore, the result of the phase shifter is decided according
to the inspecting condition determined in accordance with the two
specific inspecting conditions.
[0277] Thus, it is possible to form a photomask at a higher speed
with a high yield.
Eighteenth Embodiment
[0278] Next, an eighteenth embodiment of the invention will be
described.
[0279] Description will be given to the inspection of a mask
applied to a super-resolution technique using a chromless phase
shift mask referred to as CPL (Chromless Phase Lithography) in a
phase shift mask. This technique serves to carry out the formation
of a pattern having a high resolution by four phase shifter
patterns 902a to 902d comprising a thin pattern which cannot be
resolved by itself in place of a body pattern 901 which is resolved
to implement a very fine process. The phase shifter pattern of the
mask is constituted by a halftone mask.
[0280] In the embodiment, as shown in FIG. 24B, there are used four
phase shifter patterns 902a to 902d formed to have the same width
in total as that of the body pattern 901 (FIG. 24A). With this
structure, the inspecting accuracy of the phase shifter pattern can
be more reduced than that of the body pattern. In this structure,
the following three respects are set to be conditions and pattern
accuracy is decided for the phase shifter pattern.
[0281] The following is taken into consideration. Only whether the
following conditions are satisfied is set to be an inspecting
condition, and a decision of "accepted" is given if the condition
is satisfied:
1. Whether the phase shifters overlap with each other through a
defect in an enlarging direction (an increase in a pattern);
2. Whether the phase shifter pattern disappears through the defect
in a reducing direction (a decrease in the pattern); and
3. An inspecting sensitivity in a portion corresponding to the edge
of the body pattern is not reduced.
[0282] In the embodiment, a classification into two portions is
carried out, that is, the body pattern is set to be a pattern rank
PA and the phase shifter pattern is set to be a pattern rank PB,
and furthermore, the result of the phase shifter pattern is decided
according to the inspecting condition determined in accordance with
the three specific inspecting conditions.
[0283] In a phase shift mask using a so-called gate shrink
technique in which a thin gate is formed with an interposition
between shifters having different phases, moreover, a mask
sensitivity is to be increased in only shifter edges opposed to
each other and the inspecting accuracy may be decreased in other
portions.
[0284] Thus, it is possible to form a photomask at a higher speed
and with a high yield which is suitable for a feature
reference.
[0285] If a classification in two stages is carried out, that is,
the accuracy rank is once classified depending on whether the
pattern has the same node, and is then classified depending on
whether the pattern is dummy, consequently, the processing can be
carried out at a higher speed and the yield can be enhanced.
[0286] As described above, according to the photomask inspecting
method in accordance with the invention, all patterns and areas are
inspected with allowable defect accuracy of a pattern interval
which is conventionally the toughest. However, it is possible to
implement the inspection with necessary accuracy for each region,
each pattern or each edge. As a result, it is not necessary to
correct a pattern which is rejected with unnecessary inspecting
accuracy. Consequently, it is possible to reduce portions to be
corrected. Thus, it is possible to reduce a time required for
manufacturing the photomask and a manufacturing cost.
[0287] Although the invention has been described in its preferred
form with a certain degree of particularity, it is understood that
the present disclosure of the preferred form can be changed in the
details of construction and in the combination and arrangement of
parts without departing from the spirit and the scope of the
invention as hereinafter claimed.
* * * * *