U.S. patent application number 11/485003 was filed with the patent office on 2006-11-09 for slurry for use in polishing semiconductor device conductive structures that include copper and tungsten and polishing methods.
This patent application is currently assigned to Micron Technology, Inc.. Invention is credited to Dinesh Chopra, Nishant Sinha.
Application Number | 20060249252 11/485003 |
Document ID | / |
Family ID | 24620672 |
Filed Date | 2006-11-09 |
United States Patent
Application |
20060249252 |
Kind Code |
A1 |
Chopra; Dinesh ; et
al. |
November 9, 2006 |
Slurry for use in polishing semiconductor device conductive
structures that include copper and tungsten and polishing
methods
Abstract
A method for substantially simultaneously polishing a copper
conductive structure of a semiconductor device structure and an
adjacent barrier layer. The method includes use of a polishing pad
with a slurry solution in which copper and a material, such as
tungsten, of the barrier layer are removed at substantially the
same rate. The slurry is formulated so as to oxidize copper and a
material of the barrier layer at substantially the same rates.
Thus, copper and the barrier layer material have substantially the
same oxidation energies in the slurry. Systems for substantially
polishing copper conductive structures and adjacent barrier
structures on semiconductor device structures are also
disclosed.
Inventors: |
Chopra; Dinesh; (Boise,
ID) ; Sinha; Nishant; (Boise, ID) |
Correspondence
Address: |
WHYTE HIRSCHBOECK DUDEK S.C.
555 EAST WELLS STREET
SUITE 1900
MILWAUKEE
WI
53202
US
|
Assignee: |
Micron Technology, Inc.
Boise
ID
|
Family ID: |
24620672 |
Appl. No.: |
11/485003 |
Filed: |
July 12, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10326651 |
Dec 19, 2002 |
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11485003 |
Jul 12, 2006 |
|
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09653392 |
Aug 31, 2000 |
6551935 |
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10326651 |
Dec 19, 2002 |
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Current U.S.
Class: |
156/345.12 ;
257/E21.304 |
Current CPC
Class: |
C23F 3/06 20130101; H01L
21/3212 20130101; C23F 3/04 20130101; C09G 1/02 20130101 |
Class at
Publication: |
156/345.12 |
International
Class: |
H01L 21/306 20060101
H01L021/306; C23F 1/00 20060101 C23F001/00 |
Claims
1. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising
effective amounts of an oxidizer and an inhibitor to remove copper
material and tungsten barrier material from a substrate at about
the same rate, the processing solution having a pH of about 3-7;
and a device for dispensing the processing solution.
2. The system of claim 1, wherein the substrate support is operable
to bring a substrate situated thereon into frictional contact with
the CMP pad.
3. The system of claim 1, wherein the substrate support is operable
to rotate a substrate situated thereon relative to the CMP pad.
4. The system of claim 1, wherein the processing apparatus is
operable to laterally move the CMP pad.
5. The system of claim 1, wherein the processing apparatus is
operable to rotate the CMP pad.
6. The system of claim 1, wherein the processing apparatus is
operable to vibrate the CMP pad.
7. The system of claim 1, further comprising a device for
dispensing a rinse.
8. The system of claim 1, further comprising a plurality of nozzles
situated on the substrate support and operable to dispense the
processing solution onto the polishing pad.
9. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a carrier assembly configured with
a substrate support operable to pick up and release a substrate; a
processing solution comprising effective amounts of an oxidizer and
an inhibitor to remove copper material and tungsten barrier
material from a substrate at about the same rate, the processing
solution having a pH of about 3-7; and a device for dispensing the
processing solution.
10. A system for CMP processing, comprising: a rotary CMP
processing apparatus supporting a polishing pad; a substrate
support configured to hold a semiconductor substrate; a processing
solution comprising effective amounts of an oxidizer and an
inhibitor to remove copper material and tungsten barrier material
from a substrate at about the same rate, the processing solution
having a pH of about 3-7; and a device for dispensing the
processing solution.
11. A system for CMP processing, comprising: a web format CMP
processing apparatus supporting an elongated polishing pad; a
substrate support configured to hold a semiconductor substrate; a
processing solution comprising effective amounts of an oxidizer and
an inhibitor to remove copper material and tungsten barrier
material from a substrate at about the same rate, the processing
solution having a pH of about 3-7; and a device for dispensing the
processing solution.
12. A system for CMP processing, comprising: a CMP processing
apparatus supporting a polishing pad in a belt configuration; a
substrate support configured to hold a semiconductor substrate; a
processing solution comprising effective amounts of an oxidizer and
an inhibitor to remove copper material and tungsten barrier
material from a substrate at about the same rate, the processing
solution having a pH of about 3-7; and a device for dispensing the
processing solution.
13. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising
effective amounts of an oxidizer and an inhibitor selected from the
group consisting of benzotriazole, mercaptabenzothiazole,
tolytriazole, methylamine, diethylamine, pyridine, quinoline,
dicylohexamine nitrate, potassium silicate, ammonium borate,
ammonium phosphate, and potassium dichromate, to remove a copper
material and a tungsten barrier material from the semiconductor
substrate at about the same rate, the processing solution having a
pH of about 3-7; and a device for dispensing the processing
solution.
14. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising
effective amounts of a dual oxidizer and an inhibitor to remove
copper material and tungsten barrier material from the substrate at
about the same rate, the processing solution having a pH of about
3-7; and a device for dispensing the processing solution.
15. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising an
inhibitor and about 3-10% by weight of a first and second oxidizer
including a minimal amount up to about 2% by weight of the second
oxidizer selected from the group consisting of hydrogen peroxide
and ammonium persulfate to remove copper material and tungsten
barrier material from a substrate at about the same rate, the
processing solution having a pH of about 3-7; and a device for
dispensing the processing solution.
16. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising
effective amounts of about 3-5% by weight of a dual oxidizer and
about 0.05-0.2% by weight of an inhibitor to remove copper material
and tungsten barrier material from a substrate at about the same
rate, the dual oxidizer comprising a first oxidizer, and up to
about 2% by weight of a second oxidizer selected from the group
consisting of hydrogen peroxide and ammonium persulfate, the
processing solution having a pH of about 3-7; and a device for
dispensing the processing solution.
17. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution having a pH
of about 3-7 and comprising an inhibitor, a first oxidizer, and a
second oxidizer to remove copper material and tungsten barrier
material from the substrate at about the same rate, the first
oxidizer selected from the group consisting of potassium iodate,
potassium permanganate, ferric nitrate, cerium (IV) compounds,
bromates, chlorates, chromates, and iodic acid, and ammonia; and
the second oxidizer selected from the group consisting of hydrogen
peroxide and ammonium persulfate, the processing solution having a
pH of about 3-7; and a device for dispensing the processing
solution.
18. The system of claim 17, wherein the processing solution
comprises about 3-10% by weight of the first and second oxidizers
including about 0.001-2% of the second oxidizer, and about
0.05-0.2% by weight of the inhibitor.
19. A system for CMP processing, comprising: a CMP processing
apparatus comprising a CMP pad; a substrate support configured to
support a semiconductor substrate; a processing solution comprising
about 0.05-10% of a first oxidizer, about 0.001-2% of a second
oxidizer, and about 0.05-2% of an inhibitor, by weight of the
processing solution, and having a pH of about 3-7; wherein the
first oxidizer is selected from the group consisting of potassium
iodate, potassium permanganate, ferric nitrate, and cerium (IV)
compounds such as ceric nitrate and ceric ammonium nitrate,
bromates, chlorates, chromates, and iodic acid, and ammonia; and
the second oxidizer is selected from the group consisting of
hydrogen peroxide, ammonium persulfate; and a device for dispensing
the processing solution.
20. A system for CMP processing, comprising: a CMP processing
apparatus comprising a CMP pad; a substrate support configured to
support a semiconductor substrate; a processing solution comprising
an abrasive and effective amounts of an oxidizer and an inhibitor
to remove copper material and tungsten barrier material from the
substrate at about the same rate, the processing solution having a
pH of about 3-7; and a device for dispensing the processing
solution.
21. The system of claim 20, wherein the abrasive is selected from
the group consisting of alumina, titanium dioxide, silicon dioxide,
and cerium dioxide.
22. The system of claim 20, wherein the processing solution
comprises about 0.05-10% by weight abrasive.
23. The system of claim 20, wherein the processing solution
comprises about 3-5% by weight oxidizer and about 0.05-2% by weight
inhibitor.
24. A system for CMP processing, comprising: a CMP processing
apparatus supporting a fixed abrasive pad; a substrate support
configured to hold a semiconductor substrate; a processing solution
comprising effective amounts of an oxidizer and an inhibitor to
remove copper material and tungsten barrier material from a
substrate at about the same rate, the processing solution having a
pH of about 3-7; and a device for dispensing the processing
solution.
25. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising
effective amounts of an oxidizer and an inhibitor to remove
tungsten barrier material at a slower rate from the substrate than
copper material, the processing solution having a pH of about 3-7;
and a device for dispensing the processing solution.
26. The process of claim 25, wherein the processing solution
comprises about 3-10% by weight oxidizer and about 0.05-0.2% by
weight inhibitor.
27. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising an
abrasive and effective amounts of an oxidizer and an inhibitor to
remove tungsten barrier material at a slower rate from the
substrate than copper material, the processing solution having a pH
of about 3-7; and a device for dispensing the processing
solution.
28. A system for CMP processing, comprising: a CMP processing
apparatus supporting a CMP pad; a substrate support configured to
hold a semiconductor substrate; a processing solution comprising an
abrasive, about 3-10% by weight of an oxidizer, and about 0.05-0.2%
by weight of an inhibitor to remove tungsten barrier material at a
slower rate from the substrate than copper material, the processing
solution having a pH of about 3-7; and a device for dispensing the
processing solution.
29. The system of claim 28, wherein the processing solution
comprises effective amounts of the oxidizer and inhibitor such that
that a rate of removal of tungsten barrier material is up to about
ten times slower than a rate of removal of copper material.
30. The system of claim 28, wherein the processing solution
comprises effective amounts of the oxidizer and inhibitor such that
that a rate of removal of tungsten barrier material is about 2-4
times less than a rate of removal of copper material.
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] The present application is a division of application Ser.
No. 10/326,651, filed on Dec. 19, 2002, which is a continuation of
application Ser. No. 09/653,392, filed on Aug. 31, 2000, now U.S.
Pat. No. 6,551,935.
FIELD OF THE INVENTION
[0002] The present invention relates generally to slurries that are
useful in chemical-mechanical polishing or chemical mechanical
planarization processes and, more specifically, to slurries that
are used to polish or planarize electrically conductive structures
of semiconductor devices that include copper and an adjacent
tungsten-containing barrier. The present invention also relates to
methods for substantially concurrently polishing or planarizing
structures formed from copper and tungsten.
BACKGROUND OF THE INVENTION
CMP
[0003] Chemical-mechanical polishing and chemical-mechanical
planarization, both of which are referred to in the art as "CMP",
are abrasive techniques that typically include the use of a
combination of chemical and mechanical agents to planarize, or
otherwise remove material from or planarize a surface of a
semiconductor material substrate during the fabrication of devices
thereon. A chemical component, typically a slurry that includes one
or more oxidizers, abrasives, complexing agents, and inhibitors,
oxidizes the surface of one or more material layers that are being
polished or planarized (i.e., at least partially removed). A
polishing pad formed from a material such as polyurethane or
acrylic is used with the slurry and, in combination with abrasives
present in the slurry, effects mechanical removal of the layer or
layers from the surface of the semiconductor device structure. It
should be noted that abrasive-only polishing and planarization,
e.g., without the use of active chemical agents to effect material
removal, are becoming more prevalent due to environmental concerns.
Thus, the term "CMP" as used herein encompasses such abrasive-only
(i.e., strictly mechanical) methods and apparatus.
Copper Conductive Structures
[0004] The use of copper as a conductive material in semiconductor
devices is also ever increasing. When copper is used in
semiconductor devices, however, a barrier layer is typically
required between the copper and adjacent structures or layers. The
barrier layer prevents diffusion of the copper into the adjacent
layers or structures, as well as the formation of copper silicides,
both of which may cause electrical shorts in semiconductor devices
that include copper. Tantalum is an example of a material that is
useful as a copper barrier. When tantalum is used, the
semiconductor device, including any features thereof into which
copper is to be disposed (e.g., trenches), is lined with a layer of
tantalum. The tantalum layer is then typically covered with a thin
copper layer, often formed by physical vapor deposition ("PVD")
processes. The thin copper layer then acts as a so-called "seed
layer" for the formation of a copper structure, such as a
conductive line, such as by electroplating processes.
[0005] Once the tantalum and copper layers have been formed, it is
necessary to isolate separate tantalum-copper conductive structures
from one another. CMP processes are typically used to remove the
tantalum and copper between the structures from over the active
surface of the semiconductor device being fabricated. Slurries that
are used in copper CMP processes typically have a pH of about 7.0.
Many of these slurries include hydrogen peroxide (H.sub.20.sub.2)
as an oxidizing agent. Since hydrogen peroxide readily generates
hydroxy free radicals (OH), hydrogen peroxide is a very strong
oxidizing agent. Tantalum, however, is substantially chemically
inert. Thus, the oxidizers of CMP slurries that remove copper do
not effectively oxidize tantalum and, thus, do not adequately
effect the removal of tantalum. Likewise, slurries that are useful
for removing tantalum by CMP processes are likewise not effective
for removing copper. As a result, when conventional CMP processes
are used to isolate the tantalum-copper conductive structures of a
semiconductor device, two separate slurries must be used.
[0006] It has been proposed that tungsten be used in place of
tantalum in semiconductor devices as a barrier material for copper
conductive structures. Nonetheless, when known copper CMP slurries
are used to substantially simultaneously CMP tungsten and copper,
the tungsten barrier layer may dissolve, or be removed, at a faster
rate than the copper. This is at least partially because, as the
following chemical equations illustrate, tungsten (W) is more
readily oxidized than copper (Cu):
W+2H.sub.2O.fwdarw.4H++4e.sup.-+WO.sub.2E.sub.0=0.12;
Cu.fwdarw.Cu.sup.2++2e.sup.-E.sub.0=-0.34.
[0007] Thus, in conventional slurries, although both copper and
tungsten are simultaneously exposed to the same oxidants, the
tungsten will typically be oxidized first. As a result, gaps may
form in locations where the barrier material should be located
between copper conductive structures and adjacent portions of the
semiconductor device structure upon which the conductive structures
are being fabricated.
[0008] This phenomenon is illustrated in the electron micrograph of
FIG. 1, which illustrates a semiconductor device structure 10 that
includes the portions of a copper layer 20 and an underlying
tungsten barrier layer 18 disposed within a recess 14 formed in an
active surface 16 of a substrate 12 of semiconductor device
structure 10 following CMP thereof using an alumina fixed-abrasive
polishing pad and a copper CMP slurry having a pH of about 7. Once
an interface 19 between barrier layer 18 and copper layer 20 was
exposed during the CMP process, tungsten of barrier layer 18 was
oxidized and dissolved at a faster rate than the adjacent copper of
copper layer 20, leaving a gap 21 between copper layer 20 and
adjacent regions of substrate 12, as well as undesirably permitting
copper of copper layer 20 to contact and, possibly, diffuse into,
unprotected adjacent regions of substrate 12.
[0009] Therefore, it would is desirable to provide a slurry that is
useful in CMP processes and that effectively polishes or planarizes
both copper and tungsten without causing oxidation or dissolution
of the tungsten.
SUMMARY OF THE INVENTION
[0010] The present invention includes a method for substantially
simultaneously chemical-mechanical polishing a copper conductive
structure and an adjacent barrier layer with a polishing pad, as
well as slurries that are useful for substantially simultaneously
polishing a copper conductive structure and a barrier layer
adjacent thereto.
[0011] The method of the present invention includes employing a
polish pad along with a liquid polishing formulation, which is
generally referred to herein as a slurry. The slurry is formulated
to oxidize copper and a material of the barrier layer, such as
tungsten, at substantially the same rates and without preference
between the two materials. Thus, in a slurry incorporating
teachings of the present invention, the oxidation energies of
copper and the barrier material are substantially the same.
Preferably, in the slurry, the oxidation energy of a barrier
material, such as a tungsten-containing material (e.g., tungsten
(W) and tungsten nitride WN.sub.x) is about 0.25 volt greater to
about 0.2 volt less than an oxidation energy of copper. As copper
and the barrier material are oxidized by the slurry at about the
same rates, use of a slurry so formulated to substantially
simultaneously polish a copper conductive structure and an adjacent
barrier layer, prevents dissolution of the barrier layer.
[0012] Slurries that are useful in the method of the present
invention include at least one oxidizer, at least on inhibitor, and
one or more abrasives, and optionally but preferably one or more
complexing agents. The relative amounts of the oxidizer, inhibitor,
abrasive, and optional complexing agent, are balanced so as to
facilitate substantially concurrent polishing of a copper structure
and another structure adjacent thereto, such as a barrier layer
formed from a tungsten-containing material. Thus, the slurry is
formulated such that the relative amounts of the oxidizer,
inhibitor, abrasive, and optional complexing agent, to oxidize
copper and a barrier material, such as a tungsten-containing
material, at substantially the same rates, or such that the
oxidation energies of copper and the barrier material are
substantially the same in the slurry, and to polish or planarize
the surface of the wafer or other structure. The pH of the slurry
is also be optimized so as to provide for oxidation of copper and a
barrier material, such as a tungsten-containing material, at
substantially the same rates.
[0013] With such exemplary solutions in accordance with the
invention received intermediate the wafer and polishing pad, the
copper comprising layer is chemical-mechanical polished with slurry
and the polishing pad. The slurries can be utilized with a
conventional planarizing machine known and used in the art for
chemical-mechanical polishing a semiconductor wafer.
[0014] The present invention also includes a system for
substantially simultaneously polishing a copper conductive
structure and an adjacent barrier layer of a semiconductor device.
Such a system includes a polishing pad and a slurry according to
the invention, within which copper and the material of the barrier
layer are oxidized at substantially the same rates, or have
substantially the same oxidation energies.
[0015] Other features and advantages of the present invention will
become apparent to those of ordinary skill in the art through
consideration of the ensuing description, the accompanying
drawings, and the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Preferred embodiments of the invention are described below
with reference to the following accompanying drawings.
[0017] FIG. 1 is an electron micrograph illustrating the
dissolution of regions of a tungsten barrier layer that underlie a
copper structure of a semiconductor device structure when a
conventional slurry is used to simultaneously remove the copper and
tungsten;
[0018] FIGS. 2-5 schematically illustrate an exemplary embodiment
of a polishing method in which copper and a barrier material
therefor are substantially simultaneously removed from a
semiconductor device structure at substantially the same rates;
and
[0019] FIG. 6 is a schematic representation of an exemplary
embodiment of a system that employs a polishing pad and a slurry to
effect the method of the present invention.
[0020] FIG. 7 is a schematic representation of an exemplary
embodiment of a system that employs a web-format planarizing
machine to effect the method of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0021] A method incorporating teachings of the present invention is
illustrated in FIGS. 2-5. With reference to FIG. 2, a semiconductor
device structure 10 including a substrate 12, which includes a
recess 14 formed in an active surface 16 thereof. A barrier layer
18 of a material, such as a tungsten-containing material, that
prevents copper from diffusing into adjacent insulative regions of
semiconductor device structure 10 located on active surface 16 and
on the surfaces 15 of recess 14. Preferably, the
tungsten-containing material comprises greater than about 50%
tungsten. Exemplary tungsten-containing materials include tungsten
(W) and tungsten nitride having the formula WN.sub.x. A copper
layer 20 is formed over and contacts barrier layer 18. Copper layer
20 also substantially fills recess 14. Although substrate 12 may
include various other structures beneath recess 14, barrier layer
18, and copper layer 20, for purposes of simplicity, no additional
structures are illustrated in the semiconductor device structure 10
shown in FIGS. 2-5.
[0022] In forming a conductive structure from copper layer 20,
portions of copper layer 20 and of barrier layer 18 that are not
located within recess 14 must be removed from semiconductor device
structure 10. As discussed previously herein, CMP processes are
typically used to remove unwanted portions of copper layers. With
reference to FIG. 3, a slurry 30 is applied over copper layer 20. A
polishing pad 40, which may be embodied as a conventional polishing
pad, a web-type polishing pad, a belt-type polishing pad, or in any
other polishing pad format known in the art, is then brought into
frictional contact (e.g., by rotation of semiconductor device
structure 10 or movement of the polishing pad 40) with copper layer
20 to, along with slurry 30, remove copper layer 20. An inhibitor
component 32 of slurry 30 fills recessed areas 22 of copper layer
20, thereby preventing removal of material from recessed areas 22
until material of higher areas 24 of copper layer 20 has been
removed.
[0023] Eventually, regions of barrier layer 18 overlying active
surface 16 are exposed through copper layer 20, as shown in FIG. 4.
At this point, slurry 30 and polishing pad 40 remove the material
or materials of barrier layer 18 and the copper of copper layer 20
at substantially the same rates.
[0024] Barrier layer 18 is removed from active surface 16 by
continued polishing with slurry 30 and polishing pad 40. Once
barrier layer 18 is substantially removed from active surface 16
and the surface 26 of the portion of copper layer 20 that remains
within recess 14 is located substantially in the plane of active
surface 16, as depicted in FIG. 5, the polishing process is
terminated. As illustrated in FIG. 5, the remaining portion of
barrier layer 18 substantially lines recess 14 and separates the
remaining portion of copper layer 20 from adjacent portions of
substrate 12.
[0025] In order to effect removal of copper and the material or
materials (e.g., tungsten-containing material) of an adjacent
barrier layer 18 or other structure by CMP at substantially the
same rates, slurry 30 is formulated so as to oxidize copper and the
material or materials of the adjacent barrier layer 18 at
substantially the same rates. Stated another way, copper and the
material or materials (e.g., tungsten-containing material) of the
adjacent barrier layer 18 have substantially the same oxidation
energies in slurry 30. As a result, as an interface 19 between
layers 18 and 20 is exposed to slurry 30, the material or materials
of barrier layer 18 will not dissolve, or be removed from
semiconductor device structure 10, at a significantly greater rate
than copper or copper layer 20 is dissolved, or removed from
semiconductor device structure 10. To achieve the desired removal,
the oxidation energy of the tungsten-comprising material in slurry
30 is preferably about 0.25 volt more to about 0.2 volt less than
the oxidation energy of copper in slurry 30.
[0026] Slurry 30 includes an oxidizer component, which oxidizes
both the copper of copper lay 20 and the material or materials
(e.g., tungsten-containing material) of barrier layer 18 so as to
chemically soften these materials and to thereby facilitate their
mechanical removal from semiconductor device structure 10 by
polishing pad 40. Slurry 30 includes an inhibitor component 32,
which prevents recessed, or lower, areas 22 of copper layer 20 from
being removed until higher areas 24 of copper layer 20 have been
removed down to substantially the same plane. Slurry 30 further
includes an abrasive agent, which effects the mechanical part of
the CMP process to abrade and polish or planarize the surface of
the semiconductor device 10, in combination with polishing pad 40.
As a result, the continued oxidation of material layers 18, 20 by
slurry 30 may occur at optimal rates and, thus, the rates at which
the materials of layers 18 and 20 are removed from semiconductor
device structure 10 may also be optimized.
[0027] According to the invention, to achieve an optimal and
balanced rate of removal of the copper and tungsten-containing
barrier layers at substantially the same rates, and without
preferential etching of one material over the other, the slurry is
formulated to achieve a .DELTA.E range of about 0.05 eV to about
0.20 eV, by optimizing the oxidizer component and the pH of the
slurry.
[0028] The amount of oxidizer included in the slurry is controlled
to maintain an about equal rate of selectivity between the copper
of copper layer 20 and the material or materials (e.g.,
tungsten-containing material) of barrier layer 18. Examples of
oxidizers that are useful as the oxidizer component of slurry 30
include, without limitation, hydrogen peroxide, ammonium
persulfate, potassium iodate, potassium permanganate, ferric
nitrate, and cerium (IV) compounds such as ceric nitrate and ceric
ammonium nitrate, bromates, chlorates, chromates, ammonium
molybdate, nitric acid, potassium nitrate, ammonia, and other amine
compounds, and iodic acid, and mixtures thereof. The oxidizer
component preferably comprises about 0.05% to about 10% by weight
of slurry 30, preferably about 0.1% to about 5.0% by weight, more
preferably about 3% to about 5% of the weight of slurry 30. The
oxidizing agent is preferably not as strong as, for example,
hydrogen peroxide or an organic peroxide such as monopersulfates,
which have a relatively high static etch rate of the
tungsten-containing material. Thus, a "dual" oxidizer can be used
comprising the foregoing oxidizing agents combined with a minimal
amount of hydrogen peroxide or ammonium persulfate, of about 0.001%
to about 1% to about 2% by weight of the slurry.
[0029] Examples of useful copper corrosion inhibitors 32 include
azoles such as imidazole, benzotriazole, benziimidazole,
benzothizole, mercaptabenzothiazole and tolytriazole, and other
azole derivatives with hydroxy, amino, imino, carboxy, mercapto,
nitro and alkyl substituted groups; urea and thiourea; amines such
as methylamine and diethylamine; ring compounds such as pyridine,
quinoline, and dicyclohexamine nitrite; other compounds such as
potassium silicate, ammonium borate, ammonium phosphate and
potassium dichromate; and mixtures thereof. Inhibitor component 32
of slurry 30 preferably includes an azole compound, such as
benzenetriazole (BTA). While inhibitor component 32 may make up
about 0.05% to about 2% by weight of slurry 30, it is preferred the
inhibitor component 32 comprise about 0.05% to about 0.2% by weight
of slurry 30. For example, slurry 30 may include about 0.1% BTA, by
weight.
[0030] Examples of useful abrasive agents include, but are not
limited to, alumina (Al.sub.2O.sub.3), titanium dioxide
(TiO.sub.2), silicon dioxide (SiO.sub.2), and cerium dioxide
(CeO.sub.2). The abrasive preferably comprises about 0.5% to about
10% by weight of slurry 30.
[0031] Slurry 30 can have a pH in the range of about 3 to about 7,
but the pH of slurry 30 is optimally in the range of about 3 to
about 5. One or more pH control agents or buffers may be used, as
known in the art, to adjust the pH of slurry 30 to a desired level.
Preferably, the pH control agent will adjust the pH of slurry 30 to
a desirable range or point without significantly etching the
insulator (e.g., borophosphosilicate glass (BPSG), phosphosilicate
glass (PSG), or borosilicate glass (BSG)) that underlies the layer
or layers being polished. Examples of useful pH control agents
include potassium hydrogen phthalate, ammonium phosphate, ammonium
acetate, ammonium dihydrogen phosphate, dibasic ammonium citrate,
ammonium hydrogen phosphate, tribasic ammonium citrate, ammonium
oxalate, ammonium carbamate, acetic acid, phosphoric acid, and
sulfuric acid, among others, and mixtures thereof.
[0032] In a preferred embodiment, slurry 30 also includes one or
more complexing agents, which complex with ions of the layers 18,
20 being removed (e.g., copper ions from copper layer 20) so as to
facilitate the dissolution of these reactant ions, allowing these
reactant ions to be moved away from the locations at which layers
18 and 20 are being oxidized. Examples of suitable complexing
agents of slurry 30 may include, but are not limited to, glycine,
ammonium citrate, ammonium phosphate, ammonium acetate, ammonium
thiocyanate, and 2,4-pentadione, and combinations thereof. Slurry
30 preferably includes about 1% to about 10% of the one or more
complexing agents, by weight of slurry 30, more preferably about 3%
to about 5% by weight of slurry 30. For example, slurry 30 may
include about 1% of the complexing agent glycine, including a
concentration of 0.1 M (molar) polyethylene glycol (PEG), by weight
of slurry 30. As another example, slurry 30 may include about 3%
ammonium acetate, by weight.
[0033] The slurry solution can also comprise one or more
surfactants, for example present at a concentration of from about
1% to about 10% by volume. Example surfactants include dodecyl
sulfate sodium salt, sodium lauryl sulfate, dodecyl sulfate
ammonium salt, polyethylene glycol, polyoxyethylene ether,
glycerol, polypropylene glycol, polyoxyethylene lauryl ether,
polyoxyethylene cetyl ether, polyoxyethylene stearyl ether,
polyoxyethylene oleyl ether, and mixtures thereof. The slurry can
further comprise one or more thickeners to achieve a desired
viscosity, with an example preferred range being from about 10
centipoise to about 20 centipoise at room temperature. Examples of
suitable thickeners include Polyox.TM. available from Union Carbide
of Danbury, Conn., and Carbopol.TM. available from B.F. Goodrich of
Cleveland, Ohio.
[0034] The specific amounts of the components of slurry 30 may be
determined by identifying slurry 30 formulations in which copper
gives up electrons at substantially the same rate as a barrier
material, such a tungsten-containing material, of a barrier layer
18 to be polished substantially simultaneously with copper layer
20. Stated another way, slurry 30 may be formulated so that copper
and a barrier material therefor, such as a tungsten-containing
material, have the substantially same oxidation energies therein,
or are oxidized at substantially the same rates therein.
Preferably, the oxidation energy of the tungsten-containing
material or another barrier material in slurry 30 is within the
range of about 0.25 volt more than to about 0.2 volt less than the
oxidation energy of copper in slurry 30, the range including the
end point values thereof. These formulations of slurry 30 will
facilitate the removal of copper and a barrier material, such as a
tungsten-containing material, from a semiconductor device structure
10 at substantially the same rates.
[0035] Slurry 30 formulations having these characteristics may be
determined as known in the art, such as by measuring the open
circuit potentials of copper and a barrier material, such as
tungsten, in slurry 30.
[0036] Referring now to FIG. 6, a polishing system 50 for effecting
the substantially simultaneous polishing of copper and an adjacent
barrier material in accordance with the method of the present
invention is illustrated. Polishing system 50 includes a polishing
apparatus 42, which supports or carries a polishing pad 40, and a
substrate support 44 configured to hold a semiconductor device
structure 10, to bring the same into frictional contact with
polishing pad 40, and, preferably, to rotate semiconductor device
structure 10 relative to polishing pad 40. Polishing system 50 also
includes a slurry applicator 46 and a rinsing element 48.
[0037] Any known CMP apparatus, including conventional, rotary CMP
apparatus, web format CMP apparatus, and belt format CMP apparatus,
may comprise polishing apparatus 42, substrate support 44, slurry
applicator 46, and rinsing element 48 of polishing system 50.
[0038] Conventional CMP pads are round, planar, and have larger
dimensions than the semiconductor substrates (e.g., wafers or other
substrates including silicon, gallium arsenide, indium phosphide,
etc.) upon which the structures or layers to be planarized or
otherwise polished have been formed. In polishing one or more
layers or structures formed on a substrate, the substrate and the
conventional CMP pad are rotated relative to one another, with the
location of the substrate being moved continuously relative to the
polishing surface of the pad so that different areas of the pad are
used to polish one or more of the layers or structures formed on
the substrate.
[0039] In use of polishing system 50, one or more semiconductor
device structures 10 having one or more layers thereon that are to
be chemical-mechanical polished are secured to substrate support
44. If necessary, polishing pad 40 is also secured to polishing
apparatus 42. Slurry 30 from a slurry source 47 is introduced by
slurry applicator 46 onto semiconductor device structure 10 and,
once slurry 30 has been applied, one or both of semiconductor
device structure 10 and polishing pad 40 are substantially
continuously laterally moved (e.g., rotate or vibrated or otherwise
moved side-to-side) and brought into frictional contact with one
another so as so effect the CMP process.
[0040] In some instances, it would be desirable to maintain a
temperature at or below room temperature during the copper polish
(i.e., at or below 74.degree. F. to about 65.degree. F.). This is
seldom practical where lower slurry temperature will also result in
poor abrasive material dispersal throughout the slurry during
polish. Accordingly, elevated temperatures are utilized during the
polish. Polishing in all embodiments preferably is conducted at
atmospheric pressure and anywhere from 40.degree. F. up to
145.degree. F., although other conditions are of course
possible.
[0041] Once the desired portions of one or more layers 18, 20
(FIGS. 2-5) have been removed from semiconductor device structure
10, semiconductor device structure 10 is moved away from polishing
pad 40 and slurry 30 remaining on semiconductor device structure 10
is rinsed therefrom by a rinse liquid 49 from rinsing element 48.
Subsequent fabrication processes may then be conducted on
semiconductor device structure 10, as known in the art.
[0042] Another polishing format is the so-called "web" format,
wherein the pad has an elongate, planar configuration. The web is
moved laterally from a supply reel to a take-up reel so as to
provide "fresh" areas thereof for polishing one or more layers or
structures formed on a semiconductor substrate. A similar, newer,
polishing format is the so-called "belt" format, wherein the pad is
configured as a belt, or continuous loop, of polishing material. In
both the "web" and "belt" formats, the semiconductor substrate is
rotated or revolved upon being brought into contact with the pad.
The pad is moved when a "fresh" polishing surface is needed or
desired.
[0043] Example equipment and processing utilized in accordance with
the invention is described with reference to FIG. 7, wherein a
web-format planarizing machine 60 is used for chemical-mechanical
polishing a semiconductor wafer (not shown). Planarizing machine 60
has a support table 62 with a top panel 64 at a work station where
an operative portion (A) of a planarizing pad 40' is positioned.
The top-half panel 64 is generally a rigid plate to provide a flat,
solid surface to which a particular section of planarizing pad 40'
may be secured during polishing.
[0044] Planarizing machine 60 also has a plurality of rollers to
guide, position and hold planarizing pad 40' over top panel 64. The
rollers include a supply roller 68, first and second idler rollers
70a and 70b, first and second guide rollers 72a and 72b, and a
take-up roller 74. The supply roller 68 carries an unused or
pre-operative portion of the planarizing pad 40', and take-up
roller carries a used or post-operative portion of planarizing pad
40'. First idler roller 70a and first guide roller 72a stretch
planarizing pad 40' over top panel 64 to hold the planarizing pad
40' stationary during operation. Planarizing pad 40' in accordance
with the invention preferably comprises a fixed abrasive pad, such
as described above, and having a length greater than a maximum
diameter of the wafers being polished. A motor (not shown) derives
at least one of supply roller 68 and take-up roller 74 to
sequentially advance the planarizing pad 40' across the top-panel
64. As such, clean pre-operative sections of the planarizing pad
40' may be quickly substituted for used sections to provide a
consistent surface for planarizing and/or cleaning the
substrate.
[0045] The web-format planarizing machine 60 has a carrier assembly
76 that controls and protects the wafer during polishing. Carrier
assembly 76 generally has a substrate holder 78 to pick up, hold
and release the wafer at appropriate stages of the polishing cycle.
A plurality of nozzles 80 attached to substrate holder 78 dispense
a planarizing solution 30' in accordance with the invention onto a
planarizing surface 82 of planarizing pad 40'. Carrier assembly 76
also generally has a support gantry 84 carrying a drive assembly 86
that translates along gantry 84. Drive assembly 86 generally has an
actuator 88, a drive shaft 90 coupled to the actuator 88, and an
arm 92 projecting from drive shaft 90. Arm 92 carries substrate
holder 78 via another shaft 94 such that drive assembly 86 orbits
substrate holder 78 about an axis B-B offset from a center point
C-C of the wafer.
[0046] In accordance with an aspect of the invention, the process
preferably comprises moving web/pad 40' a distance less than the
maximum diameter of the wafer such that a subsequently polished
wafer is exposed to a fresh pad segment which was not utilized to
polish the immediately preceding wafer. Preferably, the distance
moved is less than or equal to about 1.0% of the maximum diameter
for uniformity of polish and to extend life of the pad. For example
for an 8-inch diameter wafer, an incremental movement of pad/web
40' between each polishing is about 0.25 inch.
[0047] In compliance with the statute, the invention has been
described in language more or less specific as to structural and
methodical features. It is to be understood, however, that the
invention is not limited to the specific features shown and
described, since the means herein disclosed comprise preferred
forms of putting the invention into effect. The invention is,
therefore, claimed in any of its forms or modifications within the
proper scope of the appended claims appropriately interpreted in
accordance with the doctrine of equivalents. The complete
disclosures of all patents, patent documents, and publications
listed herein are incorporated by reference, as if each were
individually incorporated by reference.
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