U.S. patent application number 11/301344 was filed with the patent office on 2006-07-13 for die paddle clamping method for wire bond enhancement.
Invention is credited to David J. Corisis.
Application Number | 20060154404 11/301344 |
Document ID | / |
Family ID | 26904725 |
Filed Date | 2006-07-13 |
United States Patent
Application |
20060154404 |
Kind Code |
A1 |
Corisis; David J. |
July 13, 2006 |
Die paddle clamping method for wire bond enhancement
Abstract
A leadframe configuration for a semiconductor device that has a
die attach paddle with paddle support bars. In addition, clamp tabs
extend outwardly from lesser supported locations of the paddle to
underlie a conventional lead clamp. The clamp tabs are formed as an
integral part of the paddle. Normal clamping during die attach and
wire bonding operations prevents paddle movement and enhances
integrity of the die bond and wire bonds.
Inventors: |
Corisis; David J.;
(Meridian, ID) |
Correspondence
Address: |
TRASK BRITT
P.O. BOX 2550
SALT LAKE CITY
UT
84110
US
|
Family ID: |
26904725 |
Appl. No.: |
11/301344 |
Filed: |
December 12, 2005 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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09943763 |
Aug 30, 2001 |
6977214 |
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11301344 |
Dec 12, 2005 |
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09635023 |
Aug 4, 2000 |
6326238 |
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09943763 |
Aug 30, 2001 |
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09210013 |
Dec 11, 1998 |
6162662 |
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09635023 |
Aug 4, 2000 |
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Current U.S.
Class: |
438/123 ;
257/E21.518; 257/E23.037; 257/E23.043; 438/124; 438/617 |
Current CPC
Class: |
H01L 2224/83805
20130101; H01L 2224/73265 20130101; H01L 2224/78703 20130101; H01L
2224/85201 20130101; H01L 2224/85203 20130101; H01L 2924/00014
20130101; H01L 2924/01322 20130101; H01L 2924/00 20130101; H01L
2924/00 20130101; H01L 2924/00014 20130101; H01L 2924/01014
20130101; H01L 2924/01014 20130101; H01L 2924/00 20130101; H01L
2224/05599 20130101; H01L 2224/32245 20130101; H01L 2924/00
20130101; H01L 2224/48247 20130101; H01L 2224/48247 20130101; H01L
2224/45099 20130101; H01L 2224/83205 20130101; H01L 2924/01079
20130101; H01L 2224/48091 20130101; H01L 2924/01079 20130101; H01L
2924/00011 20130101; H01L 2924/01079 20130101; H01L 2224/49171
20130101; H01L 2224/32245 20130101; H01L 2924/01014 20130101; H01L
2924/01082 20130101; H01L 2924/0132 20130101; H01L 23/49541
20130101; H01L 2924/014 20130101; H01L 24/29 20130101; H01L
2924/00011 20130101; H01L 2224/85205 20130101; H01L 23/49503
20130101; H01L 2224/85203 20130101; H01L 24/48 20130101; H01L
2224/73265 20130101; H01L 2924/01013 20130101; H01L 24/78 20130101;
H01L 2224/83805 20130101; H01L 2924/01322 20130101; H01L 2224/48091
20130101; H01L 2924/01033 20130101; H01L 2924/00014 20130101; H01L
2924/00014 20130101; H01L 2224/49171 20130101; H01L 24/85 20130101;
H01L 2924/14 20130101; H01L 24/49 20130101; H01L 2224/48247
20130101; H01L 2224/05554 20130101; H01L 2924/0132 20130101 |
Class at
Publication: |
438/123 ;
438/617; 438/124 |
International
Class: |
H01L 21/60 20060101
H01L021/60 |
Claims
1. A clamping method for a semiconductor device assembly using an
apparatus having an upper clamp member and a lower clamp member,
the method comprising: providing at least a portion of a strip of
leadframes, the strip having opposed rails, having dam bars between
the opposed rails, having at least two inner leads located at a
first level, having at least two outer leads located at a second
level, having a die mount paddle located at a third level and
having at least one integral clamping tab, the at least one
integral clamping tab located at a fourth level extending outwardly
for contact by the upper clamp member; attaching a semiconductor
device to the die mount paddle, the semiconductor device having a
plurality of bond pads; locating the strip of leadframes on the
lower clamp member of the apparatus having the upper clamp member
overlying portions of the at least two inner leads and portions of
the at least one integral clamping tab; and forming at least one
bond wire to the plurality of bond pads of the semiconductor device
and the portions of the at least two inner leads.
2. The method of claim 1, further comprising: forming the die mount
paddle having an upper surface thereof at the third level located
below the first level of the at least two inner leads; and
deforming the at least one integral clamping tab to clamp portions
thereof.
3. The method of claim 1, further comprising: removing the strip of
leadframes and the semiconductor device from the lower clamp
member; and encapsulating a portion of the strip of leadframes, the
semiconductor device, and the at least two bond wires one bond wire
extending between the strip of leadframes and the semiconductor
device in a material.
4. A clamping method for assembling a semiconductor device assembly
having a semiconductor device and portions of a leadframe using an
apparatus having an upper clamp member and a lower clamp member,
the method comprising: supplying at least a portion of a strip of
leadframes, the strip having opposed rails, having dam bars between
the opposed rails, having at least two inner leads located at a
first vertical level, having at least two outer leads located at a
second vertical level, having a die mount paddle located at a third
vertical level and having at least one integral clamping tab, the
at least one integral clamping tab located at a fourth vertical
level extending outwardly for contact by the upper clamp member;
attaching a semiconductor device to the die mount paddle, the
semiconductor device having a plurality of bond pads; locating at
least a portion the strip of leadframes on the lower clamp member
of the apparatus having the upper clamp member overlying portions
of the at least two inner leads and portions of the at least one
integral clamping tab; and forming at least one connection to the
plurality of bond pads of the semiconductor device and the portions
of the at least two inner leads.
5. The method of claim 4, further comprising: forming the die mount
paddle having an upper surface thereof at the third vertical level
located below the first vertical level of the at least two inner
leads; and deforming the at least one integral clamping tab to
clamp portions thereof.
6. The method of claim 4, further comprising: removing the strip of
leadframes and the semiconductor device from the lower clamp
member; and encapsulating a portion of the strip of leadframes, the
semiconductor device, and at least two bond wires extending between
the strip of leadframes and the semiconductor device in a
material.
7. A method for immobilizing a semiconductor device assembly having
a semiconductor device and portions of a leadframe using an
apparatus having an upper clamp member and a lower clamp member,
the method comprising: providing at least a portion of a strip of
leadframes, the strip having opposed rails, having dam bars between
the opposed rails, having at least two inner leads located at a
first vertical level, having at least two outer leads located at a
second vertical level, having a die mount paddle located at a third
vertical level and having at least one integral clamping tab, the
at least one integral clamping tab located at a fourth vertical
level extending outwardly for contact by the upper clamp member,
the die mount paddle having a semiconductor device attached
thereto, the semiconductor device having a plurality of bond pads;
locating at least a portion of the strip of leadframes on the lower
clamp member of the apparatus having the upper clamp member
overlying portions of the at least two inner leads and portions of
the at least one integral clamping tab; immobilizing portions of
the leadframe using the upper clamp member contacting portions of
the leadframe while portions of the lower clamp member contact
portions of the leadframe; and forming at least one connection to
the plurality of bond pads of the semiconductor device and the
portions of the at least two inner leads.
8. The method of claim 7, further comprising: forming the die mount
paddle having an upper surface thereof at the third vertical level
located below the first vertical level of the at least two inner
leads; and deforming the at least one integral clamping tab to
clamp portions thereof.
9. The method of claim 7, further comprising: removing the strip of
leadframes and the semiconductor device from the lower clamp
member; and encapsulating a portion of the strip of leadframes, the
semiconductor device, and at least two bond wires extending between
the strip of leadframes and the semiconductor device in a
material.
10. A method for working on a semiconductor device assembly having
a semiconductor device and portions of a leadframe using an
apparatus having an upper clamp member and a lower clamp member,
the method comprising: supplying a portion of a strip of
leadframes, the strip having opposed rails, having dam bars between
the opposed rails, having at least two inner leads located at a
first vertical level, having at least two outer leads located at a
second vertical level, having a die mount paddle located at a third
vertical level and having at least one integral clamping tab, the
at least one integral clamping tab located at a fourth vertical
level extending outwardly for contact by the upper clamp member,
the die mount paddle having a semiconductor device attached
thereto, the semiconductor device having a plurality bond pads;
locating at least a portion of the strip of leadframes on the lower
clamp member of the apparatus having the upper clamp member
overlying portions of the at least two inner leads and portions of
the at least one integral clamping tab; and connecting at least one
of the plurality of bond pads of the semiconductor device and the
portions of the at least two inner leads.
11. The method of claim 10, further comprising: forming the die
mount paddle having an upper surface thereof at the third vertical
level located below the first vertical level of the at least two
inner leads; and deforming the at least one integral clamping tab
to clamp portions thereof.
12. The method of claim 10, further comprising: removing the strip
of leadframes, and the semiconductor device from the lower clamp
member; and encapsulating a portion of the strip of leadframes, the
semiconductor device, and at least two bond wires extending between
the strip of leadframes and the semiconductor device in a
material.
13. A method for working on a semiconductor device assembly having
a semiconductor device and portions of a leadframe using an
apparatus having an upper clamp member and a lower clamp member,
the method comprising: supplying a portion of a strip of
leadframes, the strip having opposed rails, having dam bars between
the opposed rails, having at least two inner leads located at a
first level, having at least two outer leads located at a second
level, having a die mount paddle located at a third level and
having at least one integral clamping tab, the at least one
integral clamping tab located at a fourth level extending outwardly
for contact by the upper clamp member, the die mount paddle having
a semiconductor device attached thereto, the semiconductor device
having a plurality of bond pads; locating at least a portion of the
strip of leadframes on the lower clamp member of the apparatus
having the upper clamp member overlying portions of the at least
two inner leads and portions of the at least one integral clamping
tab; preventing substantial movement of the die mount paddle by
clamping a portion thereof; and connecting at least one bond wire
to the plurality of bond pads of the semiconductor device and the
portions of the at least two inner leads.
14. The method of claim 13, further comprising: forming the die
mount paddle having an upper surface thereof at the third level
located below the first level of the at least two inner leads; and
deforming the at least one integral clamping tab to clamp portions
thereof.
15. The method of claim 13, further comprising: removing the strip
of leadframes and the semiconductor device from the lower clamp
member; and encapsulating a portion of the strip of leadframes, the
semiconductor device, and the at least one bond wire extending
between the strip of leadframes and the semiconductor device in a
material.
16. A method for working on a semiconductor device assembly having
a semiconductor device and portions of a leadframe using an
apparatus having an upper clamp member and a lower clamp member,
the method comprising: supplying at least a portion of a strip of
leadframes, the strip having opposed rails, having dam bars between
the opposed rails, having at least two inner leads located at a
first level, having at least two outer leads located at a second
level, having a die mount paddle located at a third level and
having at least one integral clamping tab, the at least one
integral clamping tab located at a fourth level extending outwardly
for contact by the upper clamp member, the die mount paddle having
a semiconductor device attached thereto, the semiconductor device
having a plurality of bond pads; locating at least a portion of the
strip of leadframes on the lower clamp member of the apparatus
bonding device having the upper clamp member overlying portions of
the at least two inner leads and portions of the at least one
integral clamping tab; forcing portions of the die mount paddle
into contact with portions of the lower clamp member; and
connecting at least one bond wire to the plurality of bond pads of
the semiconductor device and the portions of the at least two inner
leads.
17. The method of claim 16, further comprising: forming the die
mount paddle having an upper surface thereof at the third level
located below the first level of the at least two inner leads; and
deforming the at least one integral clamping tab to clamp portions
thereof.
18. The method of claim 16, further comprising: removing the strip
of leadframes and the semiconductor device from the lower clamp
member; and encapsulating a portion of the strip of leadframes, the
semiconductor device, and the at least one bond wire extending
between the strip of leadframes and the semiconductor device in a
material.
19. A method for forming a semiconductor device assembly having a
semiconductor device and portions of a leadframe using an apparatus
having an upper clamp member and a lower clamp member, the method
comprising: supplying at least one leadframe from a strip of
leadframes having opposed rails, having dam bars between the
opposed rails, having at least two inner leads located at a first
level, having at least two outer leads located at a second level,
having a die mount paddle located at a third level and having at
least one integral clamping tab, the at least one integral clamping
tab located at a fourth level extending outwardly for contact by
the upper clamp member, the die mount paddle having a semiconductor
device attached thereto, the semiconductor device having a
plurality of bond pads; locating at least a portion of the at least
one leadframe on the lower clamp member of the apparatus having the
upper clamp member overlying portions of the at least two inner
leads and portions of the at least one integral clamping tab;
forcing portions of the die mount paddle into contact with portions
of the lower clamp member; and connecting at least one bond wire to
the plurality of bond pads of the semiconductor device and the
portions of the at least two inner leads.
20. The method of claim 19, further comprising: forming the die
mount paddle having an upper surface thereof at the third level
located below the first level of the at least two inner leads; and
deforming the at least one integral clamping tab to clamp portions
thereof.
21. The method of claim 19, further comprising: removing the at
least one leadframe and the semiconductor device from the lower
clamp member; and encapsulating a portion of the at least one
leadframe, the semiconductor device, and the at least one bond wire
extending between the strip of leadframe and the semiconductor
device in a material.
22. A method for forming a semiconductor device assembly having a
semiconductor device and portions of a leadframe using an apparatus
having an upper clamp member and a lower clamp member, the method
comprising: supplying at least on leadframe from a strip of
leadframes having opposed rails, having dam bars between the
opposed rails, having at least two inner leads located at a first
level, having at least two outer leads located at a second level,
having a die mount paddle located at a third level and having at
least one integral clamping tab, the at least one integral clamping
tab located at a fourth level extending outwardly for contact by
the upper clamp member, the die mount paddle having a semiconductor
device attached thereto, the semiconductor device having a
plurality of bond pads; locating at least a portion of the at least
one leadframe on the lower clamp member of the apparatus having the
upper clamp member overlying portions of the at least two inner
leads and portions of the at least one integral clamping tab;
preventing substantial movement of portions of the die mount paddle
by contacting portions of the die mount paddle with the upper clamp
member and the lower clamp member; and connecting at least one bond
wire to the plurality of bond pads of the semiconductor device and
the portions of the at least two inner leads.
23. The method of claim 22, further comprising: forming the die
mount paddle having an upper surface thereof at the third level
located below the first level of the at least two inner leads; and
deforming the at least one integral clamping tab to clamp portions
thereof.
24. The method of claim 22, further comprising: removing the strip
of leadframes and the semiconductor device from the lower clamp
member; and encapsulating a portion of the at least one leadframe
from a strip of leadframes, the semiconductor device, and the at
least one bond wire extending between at least one leadframe from a
strip of leadframes and the semiconductor device in a material.
25. A method for forming a semiconductor device assembly having a
semiconductor device and portions of a leadframe using an apparatus
having an upper clamp member and a lower clamp member, the method
comprising: supplying at least one leadframe from a strip of
leadframes, the strip having opposed rails, having dam bars between
the opposed rails, having at least two inner leads, having at least
two outer leads, having a die mount paddle located and having at
least one integral clamping tab, the at least one integral clamping
tab extending outwardly for contact by the upper clamp member, the
die mount paddle having a semiconductor device attached thereto,
the semiconductor device having a plurality of bond pads; locating
at least a portion of a the strip of leadframes on the lower clamp
member of the apparatus having the upper clamp member overlying
portions of the at least two inner leads and portions of the at
least one integral clamping tab; engaging portions of the die mount
paddle into contact with portions of the lower clamp member; and
connecting at least one bond wire to the plurality of bond pads of
the semiconductor device and the portions of the at least two inner
leads.
26. The method of claim 25, further comprising: forming the die
mount paddle having an upper surface thereof at a third vertical
level located below an upper first vertical level of the at least
two inner leads; and deforming the at least one integral clamping
tab to clamp portions thereof.
27. The method of claim 25, further comprising: removing the at
least one leadframe from a strip of leadframes and the
semiconductor device from the lower clamp member; and encapsulating
a portion of the leadframe from a strip of leadframes, the
semiconductor device, and the at least one bond wire extending
between the at least one leadframe from the strip of leadframes and
the semiconductor device in a material.
28. A method of bonding a portion of a connector to a portion of a
lead of a leadframe having a semiconductor device having a
plurality of bond pads attached to a portion of a die mount paddle
of a leadframe, the method comprising: locating the strip of
leadframes on a lower clamp member of an apparatus having an upper
clamp member overlying a portion of at least one lead and a portion
of at least one integral clamping tab of the strip of leadframes;
and forming at least one bond wire to the plurality of bond pads of
the semiconductor device and the portions of the at least two inner
leads.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of application Ser. No.
09/943,763, filed Aug. 30, 2001, now U.S. Pat. No. 6,977,214,
issuing Dec. 20, 2005, which is a continuation of application Ser.
No. 09/635,023, filed Aug. 4, 2000, now U.S. Pat. No. 6,326,238,
issued Dec. 4, 2001, which is a continuation of application Ser.
No. 09/210,013 filed Dec. 11, 1998, now U.S. Pat. No. 6,162,662,
issued Dec. 19, 2000.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] This invention relates generally to a semiconductor device
assembly including a semiconductor die and leadframe. More
particularly, the invention pertains to a leadframe with a mounting
paddle to which a semiconductor die is bonded and with a plurality
of leads of the leadframe connected to the bond pads on the die by
wire bonding.
[0004] 2. State of the Art
[0005] In the manufacture of semiconductor device assemblies, a
single semiconductor die is most commonly incorporated into each
sealed package. Many different package styles are used, including
dual inline packages (DIP), zig-zag inline packages (ZIP), small
outline J-bends (SOJ), thin small outline packages (TSOP), plastic
leaded chip carriers (PLCC), small outline integrated circuits
(SOIC), plastic quad flat packs (PQFP), and interdigitated
leadframes (IDF). Some semiconductor device assemblies are
connected to a substrate, such as a circuit board, prior to
encapsulation.
[0006] The assembly of a semiconductor device and a leadframe and
die ordinarily includes bonding of the die to a paddle of the
leadframe, and wire bonding bond pads on the die to inner leads,
i.e. lead fingers, of the leadframe. The inner leads, semiconductor
die, and bond wires are then encapsulated, and extraneous parts of
the leadframe excised.
[0007] In drawing FIG. 1, an exemplary PRIOR ART leadframe strip 10
is shown. The leadframe strip 10 comprises a thin metal foil. The
leadframe strip 10 is configured for the mounting of a plurality of
semiconductor dice, one on each die mount paddle 12. The leadframe
strip 10 also includes parallel spaced side rails 14, 16 formed
with a pattern of registry holes 18 for handling by automatic
machinery. In addition, the leadframe strip 10 includes an
arrangement of inner leads 20 configured for attachment to the bond
pads of a semiconductor die during a wire bonding step. Outer leads
22 will become the external leads of the completed semiconductor
device package for connection to, e.g., a circuit board. The leads
20, 22 are connected to the side rails 14, 16 by dam bars 24, and
supported thereby. As shown, each of the die mount paddles 12 is
connected to each of the side rails 14, 16 by a paddle support bar
26, 28, respectively, extending transversely with respect to the
centerline 30 of the leadframe strip 10.
[0008] In an alternative arrangement, not shown, the paddle support
bars 26, 28 extend parallel to centerline 30 from the die mount
paddles 12 to dam bars 24 for support of the die mount paddles.
[0009] In forming a semiconductor device package, semiconductor
dice are typically bonded to the paddles of the leadframe strip
with an adhesive polymer, such as epoxy or a thermoplastic, with
soft solder, or with a gold-silicon eutectic layer. Generally, each
die mount paddle is slightly larger than the attached semiconductor
die. The conductive bond pads of the semiconductor die are then
wire bonded to the inner leads surrounding the semiconductor die,
generally by the use of well-known thermocompression bonding
methods, but sometimes by thermosonic or ultrasonic bonding
methods.
[0010] During semiconductor die attach and wire bonding, the inner
leads are typically clamped against a lower heater block or other
flat member. The bonding tool itself is configured to compress the
wire against the surface to which the wire is being bonded, i.e., a
bond pad or inner lead. Examples of such are found in U.S. Pat. No.
4,600,138 of Hill, U.S. Pat. No. 4,030,657 of Scheffer, U.S. Pat.
No. 4,603,803 of Chan et al., U.S. Pat. No. 4,778,097 of Hauser,
U.S. Pat. No. 5,148,959 of Cain et al., U.S. Pat. No. 5,217,154 of
Elwood et al., U.S. Pat. No. 5,421,503 of Perlberg et al., and U.S.
Pat. No. 5,445,306 of Huddleston. It has generally been found,
however, that auxiliary clamping apparatus may improve the quality
of "second bonding," i.e., bonding of the wire to the inner
leads.
[0011] Each inner lead being wire bonded may be clamped while being
wire bonded only, or all leads may be simultaneously clamped.
[0012] Commercial wire bonding machines typically have an upper
clamp member which includes a window for access to the
semiconductor die, die paddle and inner end portions of the inner
leads. The "frame" of the window acts as a narrow clamp which
simultaneously holds down the inner leads surrounding the
semiconductor die against the heater block. Alternatively, clamps
are inserted through a window to hold the inner leads against the
heater block. These "window" types of clamping arrangements are
exemplified in U.S. Pat. No. 3,685,137 of Gardiner, U.S. Pat. No.
5,035,034 of Cotney, U.S. Pat. No. 5,322,207 of Fogal et al., U.S.
Pat. No. 5,372,972 of Hayashi et al., U.S. Pat. Nos. 4,765,531,
5,238,174 and 5,307,978 of Ricketson et al., U.S. Pat. No.
5,082,165 of Ishizuka, and U.S. Pat. No. 5,264,002 of Egashira et
al.
[0013] Various other types of prior art clamping apparatus and
methods of clamping an inner lead or bond pad against a flat lower
member are illustrated in U.S. Pat. No. 4,361,261 of Elles et al.,
U.S. Pat. No. 4,434,347 of Kurtz et al., U.S. Pat. No. 4,978,835 of
Luijtjes et al., U.S. Pat. No. 5,193,733 of You, U.S. Pat. No.
5,197,652 of Yamazaki, U.S. Pat. No. 4,821,945 of Chase et al., and
U.S. Pat. No. 5,647,528 of Ball et al.
[0014] U.S. Pat. No. 3,566,207 of Adams shows a leadframe in which
the paddle support bars are clamped by "point" clamps.
[0015] A major source of package rejection is wire bond failure.
Such failure has been attributed to overheating, underheating,
chemical contamination, surface-rougimess, surface voids, oxide
formation, presence of moisture, inadequate lead clamping, and
other suspected causes.
[0016] While a wire bond "no-stick" may sometimes be detected and
reworked on the spot, wire bond defects often do not become
apparent until subsequent testing, or after the device has been
encapsulated and/or has been in use. At this stage, the unit cost
of the device itself is maximal. In addition, repair of a defective
device may not be feasible.
[0017] On occasion, the die-to-paddle bond fails and may result in,
e.g., shorting within the packaged device, wire bond breakage, loss
of heat dissipation capability, and/or incomplete sealing of the
package.
[0018] Even a relatively low frequency of defects in the wire bonds
and in die-to-paddle bonds is extremely costly to the semiconductor
industry.
[0019] It is, therefore, an object of the invention to provide a
semiconductor device wherein the frequency of wire bond failures
and die-to-paddle bond failures is reduced, the frequency of
required wire bond rework is reduced, and the manufacturing cost is
reduced.
BRIEF SUMMARY OF THE INVENTION
[0020] It has been generally assumed in the industry that the die
mount paddle does not move during down-bonding of the semiconductor
die or during subsequent wire bonding. However, it has been
discovered that significant movement sometimes may exist, and this
movement contributes to poor semiconductor die-to-paddle bonding
and can be a major cause of the observed failure, i.e., immediate
"no-stick" or subsequent debonding of the wire bonds from the bond
pads of the semiconductor die and/or from the metal inner
leads.
[0021] In accordance with the invention, the pattern of paddle and
leads on the leadframe is configured to provide a paddle with
clampable tabs extending therefrom. The tabs extend outwardly from
areas of the paddle which are otherwise largely unsupported or
farthest from the paddle support bars. These tabs may be formed on
the sides of the paddle along which there are few, if any, bond
pads. Alternatively, the tabs may be on the same sides as the
paddle support bars, particularly when the paddle support bars on
the sides have few, if any, bond pads. Typically, the tabs are
positioned on the long dimensions of the paddle. When the leadframe
is clamped for die attach and wire bonding, a clamp member such as
a circumscribing "window frame" simultaneously clamps the inner
leads, paddle support bars and paddle tabs against a lower clamp
member which may be a heater block. The paddle is, thus, more
extensively supported and is much more resistant to flexing,
bending, and lifting away from the lower clamp member during the
bonding operations.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0022] The invention is illustrated in the following figures,
wherein the elements are not necessarily shown to scale:
[0023] FIG. 1 is a plan view of a prior art semiconductor leadframe
strip;
[0024] FIG. 2 is a plan view of a wire-bonded semiconductor device
having a leadframe of the invention;
[0025] FIG. 3 is a cross-sectional side view of a portion of a
leadframe strip of the invention and a semiconductor die bonded
thereto, as taken along line 3-3 of FIG. 2;
[0026] FIG. 4 is a cross-sectional side view of a portion of
another embodiment of a leadframe strip of the invention and a
semiconductor die bonded thereto, as taken along line 3-3 of FIG.
2; and
[0027] FIG. 5 is a plan view of a wire-bonded semiconductor device
having another embodiment of a leadframe of the invention.
DETAILED DESCRIPTION OF THE INVENTION
[0028] In the following discussion, the terms "upper" and "lower"
are understood to include the inverse when referring to clamp
members or leadframe levels of a bi-level leadframe.
[0029] As depicted in drawing FIGS. 2 and 3, a portion of an
uncompleted exemplary semiconductor device 40 includes a
semiconductor die 42 and a metal leadframe strip 44 to which the
semiconductor die is attached. The final package outline 74 is
shown with centerline 45. The leadframe strip 44 includes inner
leads 46, outer leads 48, and spaced-apart side rails 50 and 52 for
each of a plurality of leadframe panels 54. The inner leads 46 and
outer leads 48 are supported from the side rails 50, 52 by dam bars
76. The outer leads 48 for the leadframe are only shown in part,
but generally extend to a crossbar, not shown, or to the
corresponding outer leads of the adjacent leadframe panels 54 of
leadframe strip 44.
[0030] The leadframe strip 44 also includes a die mount paddle 60
which is configured for the mounting of the back side 62 of
semiconductor die 42 thereon, using an adhesive layer 104 such as
polyimide, epoxy, polymeric tape, etc. The adhesive layer 104 may
be electrically nonconductive or conductive, depending upon the
particular use for which the device is designed. The die mount
paddle 60 is connected at each end 56, 58 to one of the leadframe
rails 50, 52 by paddle support bars 78 and 80, and is supported
thereby.
[0031] The semiconductor die 42 is illustrated as having an active
surface 64 with a generally rectangular shape, although the
semiconductor die may be of any shape. Bond pads 66 are arrayed
adjacent the semiconductor die ends (edges) 68, 70 for conductive
attachment to the inner leads 46 with thin bond wires 72. The wire
bonding process may be one of thermocompression, ultrasonics or
thermosonics, for example.
[0032] In accordance with the invention, the die mount paddle 60 is
formed with clamping tabs 90 on each non-supported side 82, 84,
i.e., the sides not having a paddle support bar 78, 80. Each
clamping tab 90 extends outwardly to underlie the upper clamp
member 86 and may be clamped thereby to a lower clamp member, not
shown, which underlies a major portion of the leadframe panel 54.
The clamping tabs 90 are shown with outer ends 88 not connected to
inner leads 46, side rails 50, 52, or other parts of the leadframe
panel 54. Thus, the presence of the clamping tabs 90 does not
affect the choice of conductive or nonconductive adhesive layer
104. The clamping tabs 90 are configured to be totally encapsulated
in the completed packaged semiconductor device 40.
[0033] Drawing FIG. 2 shows two clamping tabs 90 on each side 82,
84 of the die mount paddle 60, the clamping tabs 90 extending
outwardly and converging toward each other. The clamping surface
102 of the upper clamp member 86 intersects and exerts clamping
force on the tab clamping areas 106 of the clamping tabs 90. The
clamping tabs 90 may take any reasonable shape which will make the
die mount paddle 60 more rigid but not result in shorting to leads
or wires, and will not hinder polymer passage during encapsulation.
Thus, the spacing 108 between the clamping tabs 90 and adjacent
inner leads 46 and the space 110 between the two clamping tabs 90
permit adequate flow of polymer. The clamping tabs are shown as
having a width comparable to the outer leads 48.
[0034] Preferably, the clamping tabs 90 are positioned so that
there is no need for bond wires 72 to pass over the tabs.
[0035] As shown in the cross-sectional view of drawing FIG. 3, the
inner leads 46 and die mount paddle 60 may be coplanar, and the
upper clamp member 86 has a clamping surface 102 which surrounds
wire-bonding access window 87 and compresses the inner leads 46,
die mount paddle 60, and clamping tabs 90, as well as the paddle
support bars 78, 80 (not visible) against the flat surface 98 of
the lower clamp member 96, e.g., heater block.
[0036] An alternative configuration is shown in drawing FIG. 4, in
which the die mount paddle 60 is depressed to a lower level 92
below an upper level 94 of the inner leads 46. The paddle support
bars (see bar 78) and the clamping tabs 90 are bent upwardly from
the semiconductor die 42 so that outer portions thereof underlie
the clamping surface 102 of the upper clamp member 86 for firm
clamping to the lower clamp member 96, e.g., heater block. While a
packaged semiconductor device may be made with this alternate
configuration, the coplanar configuration of drawing FIG. 3 is
generally preferred for ease of manufacture.
[0037] Drawing FIG. 5 depicts a variation, alternative embodiment,
of the invention in which the clamping tabs 90 also act as paddle
support bars.
[0038] As shown in drawing FIG. 5, a portion of an uncompleted
exemplary semiconductor device 40 includes a semiconductor die 42
and a metal leadframe strip 44 to which the semiconductor die 42 is
attached. The final package outline 74 is shown with centerline 45.
The leadframe strip 44 includes inner leads 46, outer leads 48, and
side rails 50 and 52. The inner leads 46 and outer leads 48 are
supported from the side rails 50, 52 by dam bars 76.
[0039] The leadframe strip 44 also includes a die mount paddle 60
which is configured for the mounting of the semiconductor die 42
thereon, as previously described.
[0040] The semiconductor die 42 is illustrated as having an active
surface 64 with a generally rectangular shape. Bond pads 66 are
arrayed adjacent the semiconductor die ends (edges) 68, 70 for
conductive attachment to the inner leads 46 with thin bond wires
72. The wire bonding process may be one of thermocompression,
ultrasonics or thermosonics, for example.
[0041] In accordance with this embodiment of the invention, the die
mount paddle 60 is formed with clamping tabs 90 on each of the
sides 114, 116 having no (or few) bond pads 66. In contrast to the
version shown in drawing FIGS. 2-4, the ends 56, 58 of the die
mount paddle 60 are not connected to the side rails 50, 52 by
support bars. Each clamping tab 90 is integral with the die mount
paddle 60 over a major portion of the side 114 or 116. Each
clamping tab 90 extends outwardly to underlie the upper clamp
member 86 in tab clamping area 106 and may be clamped thereby to a
lower clamp member, not shown, which underlies a major portion of
the leadframe strip 44. The clamping tabs 90 are shown with
constricted outer ends 88 connected to dam bars 76 for supporting
the die mount paddle 60 during semiconductor die bond and wire
bonding operations. Each clamping tab 90 is shown with apertures
112 therethrough whereby the flow of liquified polymer during
device encapsulation is not deleteriously impeded. The clamping
tabs 90 are configured to be totally encapsulated in the completed
packaged semiconductor device 40.
[0042] The clamping tabs 90 may take any reasonable shape which
will not result in shorting to leads or wires, and will not hinder
polymer movement during encapsulation. Preferably, the clamping
tabs 90 are positioned so that there is no need for bond wires 72
to pass over the tabs.
[0043] Following encapsulation, the tab outer ends 88 are severed,
and the dam bars 76 removed to singulate the leads.
[0044] If desired, the die mount paddle 60 may be formed of a
material different from the inner leads 46 and outer leads 48. In
the current state of the art, however, additional cost would be
incurred.
[0045] A major advantage of the inclusion of clamping tabs 90 in
the die mount paddle 60 is the prevention of paddle movement during
die bonding and the subsequent wire bonding operations. The reduced
movement permits more secure bonding of the semiconductor die 42 to
the die mount paddle 60. In addition, the first wire bond, i.e., to
the bond pad 66, as well as the second wire bond, i.e., to an inner
lead 46, are stronger. As a result, the device failure rate may be
significantly reduced.
[0046] An additional advantage of the invention is the enhanced
heat spread and dissipation through the clamping tabs.
[0047] It is apparent to those skilled in the art that various
changes and modifications maybe made to the leadframe
configurations of the invention, devices formed therefrom and
methods of making and practicing the invention as disclosed herein
without departing from the spirit and scope of the invention as
defined in the following claims.
* * * * *