U.S. patent application number 11/265610 was filed with the patent office on 2006-04-20 for method and process of contact to a heat softened solder ball array.
Invention is credited to Warren M. Farnworth, David R. Hembree.
Application Number | 20060081583 11/265610 |
Document ID | / |
Family ID | 22514762 |
Filed Date | 2006-04-20 |
United States Patent
Application |
20060081583 |
Kind Code |
A1 |
Hembree; David R. ; et
al. |
April 20, 2006 |
Method and process of contact to a heat softened solder ball
array
Abstract
A method for enhancing temporary solder ball connection
comprises the application of thermal energy to the solder balls,
heating them to a submelting "softening" temperature, whereby the
compression force required to connect all balls in a BGA is
achieved at much reduced force, avoiding damage to the package,
insert, substrate and support apparatus. Several forms of heating
apparatus, and temperature measuring apparatus are disclosed.
Inventors: |
Hembree; David R.; (Boise,
ID) ; Farnworth; Warren M.; (Nampa, ID) |
Correspondence
Address: |
TRASK BRITT
P.O. BOX 2550
SALT LAKE CITY
UT
84110
US
|
Family ID: |
22514762 |
Appl. No.: |
11/265610 |
Filed: |
November 2, 2005 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
10651664 |
Aug 29, 2003 |
6967307 |
|
|
11265610 |
Nov 2, 2005 |
|
|
|
10196396 |
Jul 15, 2002 |
6614003 |
|
|
10651664 |
Aug 29, 2003 |
|
|
|
09892156 |
Jun 26, 2001 |
6420681 |
|
|
10196396 |
Jul 15, 2002 |
|
|
|
09618885 |
Jul 18, 2000 |
6329637 |
|
|
09892156 |
Jun 26, 2001 |
|
|
|
09145832 |
Sep 2, 1998 |
6121576 |
|
|
09618885 |
Jul 18, 2000 |
|
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Current U.S.
Class: |
219/209 ;
257/E21.705; 257/E25.013 |
Current CPC
Class: |
H01L 2924/0105 20130101;
H01L 2924/01082 20130101; B23K 1/012 20130101; H01L 22/32 20130101;
G01R 1/0483 20130101; H01L 2924/01033 20130101; H01L 2924/00014
20130101; H01L 2224/81201 20130101; H05K 3/325 20130101; G01R
31/2863 20130101; H01L 2224/8121 20130101; H05K 3/3436 20130101;
G01R 31/2886 20130101; H05K 2203/081 20130101; H01L 24/81 20130101;
H01L 2924/3011 20130101; H01L 2924/01005 20130101; H01L 2224/13111
20130101; H01L 2224/48091 20130101; H01L 2224/81815 20130101; Y02P
70/613 20151101; H05K 2203/111 20130101; H01L 25/0657 20130101;
H01L 2224/8123 20130101; H01L 2924/01006 20130101; H01L 2924/14
20130101; H01L 25/50 20130101; H01L 2924/014 20130101; H01L
2224/48227 20130101; H05K 3/3494 20130101; H01L 2224/81052
20130101; H01L 2924/01013 20130101; B23K 2101/40 20180801; Y02P
70/50 20151101; B23K 1/0053 20130101; H01L 2224/48091 20130101;
H01L 2924/00014 20130101; H01L 2924/14 20130101; H01L 2924/00
20130101; H01L 2924/00014 20130101; H01L 2224/0401 20130101 |
Class at
Publication: |
219/209 |
International
Class: |
H05B 3/00 20060101
H05B003/00; H05B 1/00 20060101 H05B001/00; H05B 11/00 20060101
H05B011/00 |
Claims
1. A method for forming a portion of a solder bump of an array of
solder bumps of a device to a contact site of a plurality of
contact sites of a member, comprising: providing the solder bump of
the array of solder bumps at a temperature Ts below a melting
temperature of the solder bump; and moving the solder bump of the
array of solder bumps of the device using a pressure less than
substantially 22 grams-force for contacting the contact site.
2. The method of claim 1, wherein the melting temperature of the
solder bump of the array of solder bumps is T.degree. C. higher
than an ambient temperature To, and wherein the softening
temperature Ts is in the range of about 0.5 T to 0.95 T above the
ambient temperature To.
3. The method of claim 1, wherein the solder bump of the array of
solder bumps contacts the contact site of the plurality of
conductive contact sites at a pressure not substantially exceeding
about 10 grams-force.
4. The method of claim 1, wherein the solder bump of the array of
solder bumps contacts the plurality of conductive contact sites at
a pressure in the range of about 2 to 10 grams-force.
5. The method of claim 1, wherein the semiconductor device having
the array of solder bumps is heated by one of hot air convection
and infrared radiation.
6. The method of claim 1, wherein the member having the plurality
of conductive contact sites is heated by one of hot air convection,
conduction from a heated object, and infrared radiation.
7. The method of claim 1, wherein the semiconductor device and the
member are placed in a temperature-controlled oven for heating to
the softening temperature Ts.
8. The method of claim 1, wherein the semiconductor device is held
in a chuck, the chuck being heated.
9. The method of claim 1, wherein the member is held in a chuck,
the chuck being heated.
10. The method of claim 1, wherein the member having the plurality
of conductive contact sites is heated by electrical resistance
wires.
11. The method of claim 1, wherein the member and a substrate are
mounted on a mounting board having an integral heater, the integral
heater controlled to heat the member to the softening temperature
Ts.
12. The method of claim 1, wherein the array of solder bumps
comprises Sn--Pb solder having a lead content in the range of about
40 to about 98 percent, and the softening temperature Ts comprises
a range of about 140 to 180.degree. C.
13. The method of claim 1, wherein heating comprises predetermining
a heating time X to heat the solder bump of the array of solder
bumps to the softening temperature Ts, and heating for the time
X.
14. The method of claim 1, wherein heating comprises initiating the
heating, measuring a temperature of one of the member and the
semiconductor device, and stopping the heating to limit a
temperature of the solder bump of the array of solder bumps to no
more than the softening temperature Ts.
15. An apparatus for connecting a solder ball to a contact site
comprising: a first member having a solder ball thereon; a second
member having a contact site; apparatus moving the first member
against the second member for contact of the solder ball to the
contact site, the first member contacting the second member at a
pressure less than substantially 22 grams-force for the solder
ball; and apparatus for increasing the temperature of the solder
ball and the contact site to a solder-softening temperature Ts.
16. The apparatus of claim 15, wherein the contact site comprises
one of a substantially flat surface, a recess for receiving a
portion of a solder ball, and a recess having at least one
projection therein for deforming a solder ball inserted
therein.
17. Testing apparatus for a semiconductor package having at least
one solder ball on a surface thereof, the apparatus comprising: an
insert formed of generally noncompliant material having a first
surface including at least one contact site for contacting the at
least one solder ball and having a second surface; a substrate
having a first surface, having a second surface, the second surface
of the insert secured to the first surface of the substrate, and
having at least one lead on the substrate for connecting to at
least one lead in a socket; at least one electrical lead connecting
the at least one contact site of the insert with the at least one
lead of the substrate; a test board having the socket with at least
one contact lead connected to a testing circuit, the substrate and
the insert for insertion into the socket for contact of the at
least one lead of the substrate with the at least one contact lead
of the socket; and apparatus associated with at least one of the
substrate, the insert, and the socket to increase the temperature
thereof to a predetermined level.
18. The apparatus of claim 17, further comprising
temperature-sensing apparatus attached to one of the substrate, the
insert, and the semiconductor package.
19. The apparatus of claim 18, further comprising a temperature
controller for controlling the apparatus to increase the
temperature of the substrate, the insert, and the socket.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of application Ser. No.
10/651,664, filed Aug. 29, 2003, pending, which is a continuation
of application Ser. No. 10/196,396, filed Jul. 15, 2002, now U.S.
Pat. No. 6,614,003, issued Sep. 2, 2003, which is a continuation of
application Ser. No. 09/892,156, filed Jun. 26, 2001, now U.S. Pat.
No. 6,420,681, issued Jul. 16, 2002, which is a continuation of
application Ser. No. 09/618,885, filed Jul. 18, 2000, now U.S. Pat.
No. 6,329,637, issued Dec. 11, 2001, which is a continuation of
application Ser. No. 09/145,832, filed Sep. 2, 1998, now U.S. Pat.
No. 6,121,576, issued Sep. 19, 2000.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] This invention relates generally to semiconductor chip
packages. More particularly, the present invention pertains to
methods for electrical contact of an array of solder balls with a
noncompliant surface.
[0004] 2. State of the Art
[0005] The testing of packaged semiconductor devices has always
presented problems to device manufacturers. Various types of tests
may be conducted at different stages of manufacture. In the current
state of the art, "wafer sort" electrical tests may be conducted
prior to packaging to determine nonworking dies. Following
packaging, various tests including environmental tests as well as
parametric and functional electrical tests may be performed. A
final test which is known as "burn-in" may optionally be conducted.
The test includes temperature cycling over an extended period of
time. Essential to the testing of individual dies is reliable
electrical connection of all die leads to the test board, without
incurring damage to the die or testing apparatus, and easy
disassembly from the testing apparatus. While "permanent" wire
connections are widely used, wirebonding is time consuming and
expensive, and also makes the matching of device impedance to the
substrate impedance very difficult to achieve. Much effort is being
spent on developing alternative methods to reduce the time and
expense of using wire bonds. The replacement of wire bonds with
ball grid array (BGA) connections is becoming more common.
Temporary conductive attachment of solder balls to e.g., a test
board is less than satisfactory.
[0006] Temporary connection of device circuits to a test apparatus
is known to present a variety of problems. The insert member into
which a semiconductor die is placed for testing is typically
noncompliant, i.e., ceramic or silicon, for example.
[0007] The current method for joining a ball grid array (BGA) to a
noncompliant, i.e., rigid surface such as a silicon micromachined
pocket interconnect or insert, is to apply, at ambient temperature,
a relatively high compression force of about 22-30 grams-force per
solder ball. Theoretically, all balls of the array should be
pressed into mechanical and electrical contact with the insert
pocket. The use of compressive forces lower than the above results
in a further increased frequency of unsatisfactory electrical
connections.
[0008] The presence of such unconnected solder balls in a BGA
attachment formed under ambient conditions is believed to be due to
a significant variability in ball diameter and "height" which the
industry has been unable to eliminate. As a result, the applied
force of about 22-30 grams-force or even more per ball is, in
practice, insufficient to ensure the required contact of all balls
of the array. Furthermore, the use of compression forces in excess
of about 30 grams-force tends to damage the underlying material of
the die, insert, and/or substrate. For example, effective
connection of a 48 ball BGA array using solder balls of a nominal
diameter may require in excess of about 1.5 kg-force. Such
pressures exerted on a die for connection to a ceramic insert may
damage the die and/or insert and/or substrate below the insert. The
total force required for connection of larger arrays will be even
more. In addition, the use of larger balls not only increases the
absolute variation in ball diameter but the force required to
sufficiently deform each ball for establishing the required
temporary electrical connection. The problem also exists with
smaller solder balls such as comprise a fine ball-grid-array (FBGA)
of 0.0125 inches (0.325 mm) diameter balls, for example. With the
smaller diameter solder balls, variation in ball placement location
may have a greater effect than nonuniform ball diameters.
[0009] To date, the industry has continued to use relatively high
compressive forces and necessarily accepted the increased
occurrence of electrical connection failures of a BGA and/or damage
to the die, insert or substrate.
[0010] Ball grid arrays are used in a variety of semiconductor
devices. Illustrative of such prior art are U.S. Pat. No. 5,642,261
of Bond et al., U.S. Pat. No. 5,639,695 of Jones et al., U.S. Pat.
No. 5,616,958 of Laine et al., U.S. Pat. No. 5,239,447 of Cotues et
al., U.S. Pat. No. 5,373,189 of Massit et al., and U.S. Pat. No.
5,639,696 of Liang et al.
[0011] Semiconductor devices having dual sets of outer "leads,"
e.g., twin BGA surfaces or a combination of e.g., J-leads and
solder bumps, are shown in U.S. Pat. No. 5,648,679 of Chillara et
al., U.S. Pat. No. 5,677,566 of King et al., and U.S. Pat. No.
5,668,405 of Yamashita.
[0012] Chip carriers of several configurations are described in
U.S. Pat. No. 4,371,912 of Guzik, U.S. Pat. No. 4,638,348 of Brown
et al., and Japanese publication 60-194548 (1985).
[0013] Semiconductor devices joined in stacks are disclosed in U.S.
Pat. No. 4,868,712 of Woodman, U.S. Pat. No. 4,841,355 of Parks,
U.S. Pat. No. 5,313,096 of Eide, U.S. Pat. No. 5,311,401 of Gates,
Jr. et al., U.S. Pat. No. 5,128,831 of Fox, III et al., U.S. Pat.
No. 5,231,304 of Solomon, and U.S. Pat. No. 4,956,694 of Eide.
[0014] U.S. Pat. No. 5,637,536 of Val discloses a chip stacking
configuration with solder ball connections.
[0015] U.S. Pat. No. 5,012,323 of Farnworth discloses a dual-die
package having wire interconnections.
[0016] U.S. Pat. No. 4,761,681 of Reid discloses a multi-chip
device having elevated (conductor covered mesa)
interconnections.
[0017] Despite the advanced state of the art in lead
interconnection, device packaging and testing, the temporary
connection of semiconductor devices to testing apparatus and
burn-in boards remains an area which needs improvement.
BRIEF SUMMARY OF THE INVENTION
[0018] The present invention pertains to methods for electrical
contact of an array of solder balls with a noncompliant surface,
that is, the mechanical and electrical contact of a ball grid array
(BGA) to a relatively noncompliant contact set such as a silicon
micromachined pocket interconnect (i.e., "insert") for a test pad
or burn-in board (BIB).
[0019] The present invention further provides a reliable BGA
connection method and apparatus whereby the required pressure is
much reduced to eliminate or significantly reduce
compression-caused damage to the die, insert and/or substrate.
[0020] The present invention comprises methods and apparatus for
softening solder bumps or balls so that all of the bumps/balls in
an array readily conform to a matching array of conductive contact
pockets or pads in another body. The array of solder bumps/balls is
heated to a softening temperature lower than the melting point of
the solder and quickly placed in slightly compressed engagement
with the contact pockets or pads of a substrate. As compared to
joining the arrays at ambient temperature, all bumps/balls of the
BGA are reliably connected, and the connection is achieved at a
much reduced pressure, avoiding damage to the die and/or substrate.
In addition, much less stress is placed on the apparatus holding
the packaged die, the insert and test board.
[0021] The softening temperature to which the solder is heated is
below the melting temperature of the solder alloy.
[0022] A variety of heating apparatus and methods is disclosed,
including direct heating of the bumps/balls, heating of the entire
assembly, heating of a chuck holding the IC, heating of a chuck
holding the insert, direct heating of the insert or substrate, etc.
A temperature sensing circuit may also be incorporated into the
insert, substrate, or substrate retaining socket for the purpose of
measuring and controlling the temperature to which the bumps/balls
are heated.
[0023] While electrical contact is readily maintained during
electrical tests or burn-in by maintaining a small compressive
force, ball contact is easily removed by discontinuing the
compressive force and lifting the BGA from the insert or substrate
to which it was electrically connected.
[0024] The invention is applicable to a wide variety of solder
compositions, solder bump designs and ball diameters.
[0025] Other features of the invention will become clear from study
of the following description and related figures.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0026] The invention is illustrated in the following figures,
wherein the elements are not necessarily shown to scale:
[0027] FIG. 1 is a perspective view of an insert assembly for the
electrical testing of a typical flip-chip semiconductor package
with BGA, wherein heat enhancement of the BGA connection in
accordance with the invention is shown;
[0028] FIG. 1A is an edge view of a ball grid array on a
semiconductor chip;
[0029] FIG. 2 is a perspective view of an insert assembly for the
electrical testing of a typical flip-chip semiconductor package
with BGA, showing the package in compressive engagement with the
insert assembly for heating enhancement of the BGA connection in
accordance with the invention;
[0030] FIG. 3 is a plan view of a substrate member of the
invention;
[0031] FIG. 4 is a bottom view of a substrate member of the
invention;
[0032] FIG. 5 is a cross-sectional view of a portion of a heating
assembly of the invention; and
[0033] FIG. 6 is a cross-sectional view of various solder ball
contact sites to which the invention may be applied.
DETAILED DESCRIPTION OF THE INVENTION
[0034] The present invention relates to method and apparatus
embodiments for the uniform temporary electrical connection of
solder bumps, e.g., solder balls, of a semiconductor device to
another body. Rapid thermal softening of the solder bumps may be
achieved by a variety of specific methods and apparatus, as
described herein. The methods are particularly useful for
attachment of solder bumps to the surface of a noncompliant body
such as formed of silicon, ceramic, etc.
[0035] As shown in drawing FIG. 1, a semiconductor package 10 is
exemplified by a flip-chip package (FCP) with a ball grid array
(BGA) 30 of a plurality of solder bumps or balls 12 on one surface
14 of the semiconductor package 10.
[0036] A test apparatus for evaluating circuit performance of the
semiconductor package 10 is shown as including an insert 16 and a
substrate member 18. The insert 16 is noncompliant and is typically
formed of ceramic or silicon with a pattern of electrical contact
sites 20 micromachined on its upper surface 22. The contact sites
20 may comprise simple planar pads, or contact pockets of any
configuration, as explained infra. The contact sites 20 are
connected by conductive traces, not visible, to bond pads 24, the
latter being connected by wire bonds 26 to conductive traces 28 on
the substrate member 18. The wire bonds 26 and conductive traces 28
on the insert 16 and substrate member 18 may be encapsulated in
resin for protection. Other means for connecting the contact sites
20 to a controller for conducting a test, burn-in, etc., may be
used, as known in the art.
[0037] The substrate member 18 and attached insert 16 are typically
inserted into a socket on a test fixture or a burn-in board (BIB),
neither shown in drawing FIG. 1.
[0038] In accordance with the invention, the ball grid array 30 of
solder bumps/balls 12 is heated and compressed under a slight
pressure into the contact sites 20, shown here as indentations or
pockets. The solder bumps/balls 12 are heated to a submelting
softening temperature T.sub.s and are uniformly contactable to the
contact sites 20 by an increased deformation under the slight
compression force.
[0039] In one simple embodiment, an external heater 40 emitting
infrared radiation or heated air 42 is positioned to heat the
semiconductor package 10 including the solder bumps/balls 12 to the
desired softening temperature, and the BGA 30 is quickly inserted
and compressed by force 38 into engagement with the contact sites
20 at a relatively low pressure such as about 2-10 g-force per
solder bump/ball 12. Referring to drawing FIG. 1A, of course, the
required force per solder bump/ball 12 will vary, depending upon
the softening characteristics of the particular solder composition
used, the temperature to which the solder bumps/balls 12 are
heated, the nominal ball diameter 32, the maximum variation in ball
diameter 32 and the variation in drop distance 34 between ball
centers 34A and the surface 14 of semiconductor package 10.
Typically, the required compression force 38 at the softening
temperature T.sub.s to achieve complete ball connection is about
8-25 percent of the force at ambient temperature.
[0040] Instead of directly heating the semiconductor package 10 to
soften the solder bumps/balls 12, heat may be applied to the insert
16 or substrate member 18 before connecting the BGA 30 to the
contact sites 20. Also, the semiconductor package 10 may be
indirectly heated by applying thermal energy to a chuck, not shown,
which holds the package.
[0041] As shown in drawing FIG. 2, a semiconductor package 10 with
an array of solder bumps/balls 12 is placed on an insert 16, and
placed under a compression force 38. Thermal energy is applied
either to the back side 36 (as shown in FIG. 1) of the
semiconductor package 10, to the insert 16, to the substrate member
18 (as shown in FIGS. 4 and 5), to a compression member, not shown,
compressing the back side of the semiconductor package 10 with
compression force 38, or to a socket, not shown, which surrounds
the substrate.
[0042] Alternatively, the assembly of semiconductor package 10,
insert 16 and substrate member 18, together with compression and
support apparatus, may be placed in a temperature controlled oven
and rapidly heated to the desired softening temperature
T.sub.s.
[0043] Thus, the solder bumps/balls 12 may be heated by conduction,
convection or radiation, or any combination thereof. For example,
an external heater 40 (FIG. 1) may heat the semiconductor package
10, insert 16, substrate member 18, or a socket 66 into which the
substrate member 18 fits by radiation or heated air 42.
[0044] The solder bumps/balls 12 may be of any diameter 32,
including those of a fine ball grid array (FBGA), where the balls
have a pitch of less than one (1) mm.
[0045] The solder bumps/balls 12 may be formed of various solder
compositions, including tin-lead solders having a lead content of
about 30 to 98 percent. Solder compositions having the higher lead
concentrations often have a higher melting point.
[0046] A softening temperature Ts of about 130.degree. C. to about
180.degree. C. has been found useful for reducing the compression
force 38 to a relatively low value and simultaneously ensuring
electrical contact of all solder bumps/balls 12.
[0047] As shown in drawing FIG. 3, resistive heating elements 44
may be applied to the top surface 48 of the substrate member 18,
preferably under the insert 16 and substantially beneath the
semiconductor package 10. The heating elements 44 are shown as
having heater power leads 54, 56 for providing sufficient power to
quickly heat the insert 16 including the electrical contact sites
20, not shown, and the solder bumps/balls 12, not shown, which are
in engagement with the contact sites 20.
[0048] All of the conductive traces on substrate member 18,
including conductive traces 28, heater power leads 54, 56, and
heating elements 44 may be formed simultaneously by screening a
thick film of conductive material onto the substrate member. This
method of forming conductive traces on a surface is well known in
the art.
[0049] A thermocouple junction 50 or other temperature detecting
device may be installed in or on the insert 16 or substrate member
18 for obtaining temperature feedback and controlling the bump/ball
temperature to attain a maximum desired softening temperature
T.sub.s. Thus, for example, as shown in drawing FIG. 3, a
temperature sensor 50 (such as a thermocouple junction) may be
fixed on the top surface 48 of the substrate member 18 or back side
52 (FIGS. 1 and 2) of the insert 16, and have thermocouple leads 58
connected through otherwise unused conductive traces 28A, 28B to
measurement/control instrumentation, not shown. In use, a heater
controller, not shown, determines the measured temperature and
shuts off (or reduces) power to the heating elements 44 upon
sensing a predetermined temperature. A recorder, not shown, may be
used to calibrate the measurements such that a desired softening
temperature may be precisely attained.
[0050] A short heating time is preferred, extending only several
seconds or less. Most preferably, the heating time is less than one
second. Thus, the heater power leads 54, 56 to the heating elements
44 must be sufficiently large to carry the necessary electrical
load. In general, installation of the heating elements 44 on the
insert 16 will require separate heater power leads 54, 56.
Normally, wire bonds 26 (FIG. 1) are incapable of carrying the
necessary load.
[0051] Another form of heating apparatus which may be used in the
invention is illustrated in drawing FIGS. 4 and 5. The substrate
member 18 has on its back side (underside) 46, as shown in FIG. 2,
a pattern of heating elements 44 with junctions 62, 64. The
junctions 62, 64 may be planar pads or conductively surfaced
indentations in the back side 46.
[0052] As shown in drawing FIG. 5, a semiconductor package 10,
insert 16, and substrate member 18 are positioned in a socket 66 on
a test board 70. Test board 70 may be a board for an electrical
test, for burn-in, or other purpose. The socket 66 is typically
formed with walls 68 and base 72, and many sockets 66 may be
mounted on a single test board 70 to enable simultaneous testing or
burn-in of many semiconductor packages 10.
[0053] A pair of through-holes 74, 76 is formed in the test board
70 along axes 84, 86, and the axes which pass through junctions 62,
64, respectively. Two metal spring-loaded compression pins 80, also
known as "pogo pins," are mounted in the test board 70 or in
another substrate 90 underlying the test board 70. Substrate 90,
having a plurality of pogo pins 80 projecting therefrom, is known
as a bed-of-nails (BON). The pogo pins 80 have a base 78 and a
spring-loaded pin 82 which is axially movable relative to the base
78. The spring-loaded pins 82 are shown passing through-holes 74,
76 to electrically contact the junctions 62, 64 when in
compression, power leads 92, 94 from the two pogo pins 80 providing
sufficient electric power to the heating elements 44 for rapidly
heating the solder bumps/balls 12. Following testing, the
spring-loaded pogo pins 80 will push the substrate member 18 from
the socket 66 with a short stroke.
[0054] In drawing FIG. 6, several types of BGA contact sites 20 are
shown as examples illustrating the wide variety of solder
bumps/balls 12 and contact sites 20 combinations whose temporary
connection is enhanced by use of an elevated submelting softening
temperature T.sub.s. Each solder bump/ball 12 attached to
semiconductor package 10 is configured to be in compressive
conductive contact with a contact site 20.
[0055] Contact site 20A comprises a flat pad or surface of the
insert 16.
[0056] Contact site 20B is a spherical indentation in the insert
16.
[0057] Contact site 20C is a shallow spherical indentation.
[0058] Contact site 20D is a spherical indentation having a central
axially directed projection 96 which punctures and enters the
softened solder bump/ball 12. Preferably, the projection 96 is
pyramidal in shape.
[0059] Contact site 20E is a spherical indentation having several,
typically four, peripheral projections 98 which contact and are
forced into the circumferential surface of the solder bump/ball
12.
[0060] The illustrated contact sites 20 to which the invention may
be applied are exemplary only and not exhaustive.
[0061] It is clear that a wide variety of apparatus may be used for
heating ball-grid-array connections, of which those described
herein are representative.
[0062] The invention has been illustrated in application to the
testing of a flip-chip device. However, the temporary BGA
connection of any device, including other chip scale packages
(CSP), is enhanced by this process and apparatus.
[0063] It is apparent to those skilled in the art that various
changes and modifications, including variations in heating
procedures and structures, may be made to the BGA connection method
and apparatus of the invention as described herein without
departing from the spirit and scope of the invention as defined in
the following claims.
* * * * *