U.S. patent application number 10/744715 was filed with the patent office on 2005-06-23 for apparatus for the prevention of arcing in a cvd-tin chamber.
This patent application is currently assigned to Taiwan Semiconductor Manufacturing Co.. Invention is credited to Chang, Jake, Chen, Hung-Cheng, Chen, Kuo-Wen, Chi, Peter, Chiu, Feng-Shih, Hsueh, Yo-Cheng, Liang, Wen-Hsing, Liu, Kuang-Hsing, Wu, Jason, Xie, Jiang-He.
Application Number | 20050133165 10/744715 |
Document ID | / |
Family ID | 34678945 |
Filed Date | 2005-06-23 |
United States Patent
Application |
20050133165 |
Kind Code |
A1 |
Liu, Kuang-Hsing ; et
al. |
June 23, 2005 |
Apparatus for the prevention of arcing in a CVD-TiN chamber
Abstract
A chemical vapor deposition apparatus for titanium-nitride
application that is useful for preventing contaminants caused by
arching between a substantially planar substrate and a substrate
supporting apparatus during the deposition cycle. The apparatus
includes a chemical vapor deposition chamber having a
substrate-supporting heater. An annular housing supported by the
heater, and a conductive strap that connectively secures the
substrate-supporting heater to the annular housing by using holes
instead of conventional slots. The conductive strap is designed as
a flexure to flex with process temperature changes to improve
electrical connectivity at its terminal connection and to prevent
degradation. The annular housing has a top and a bottom surface and
a cylindrical wall extending peripherally below the surfaces. The
cylindrical wall encircles an isolator ring. The isolator ring is
in contact with the bottom surface of the annular housing, and is
placed and supported by at least three lift screws extending above
the heater surface.
Inventors: |
Liu, Kuang-Hsing; (Hsinchu,
TW) ; Chi, Peter; (Hsin-chu, TW) ; Hsueh,
Yo-Cheng; (Tao-yuan, TW) ; Wu, Jason;
(Cingshuei Township, TW) ; Xie, Jiang-He;
(Hsin-Chu City, TW) ; Chang, Jake; (Keelung City,
TW) ; Liang, Wen-Hsing; (Hsinchu, TW) ; Chen,
Hung-Cheng; (Hsinchu, TW) ; Chen, Kuo-Wen;
(Hsinchu City, TW) ; Chiu, Feng-Shih; (Changhua,
TW) |
Correspondence
Address: |
DUANE MORRIS, LLP
IP DEPARTMENT
ONE LIBERTY PLACE
PHILADELPHIA
PA
19103-7396
US
|
Assignee: |
Taiwan Semiconductor Manufacturing
Co.
|
Family ID: |
34678945 |
Appl. No.: |
10/744715 |
Filed: |
December 23, 2003 |
Current U.S.
Class: |
156/345.51 |
Current CPC
Class: |
C23C 16/4401 20130101;
H01J 2237/3321 20130101; H01J 37/32522 20130101; C23C 16/4585
20130101; H01J 2237/0206 20130101 |
Class at
Publication: |
156/345.51 |
International
Class: |
C23F 001/00 |
Claims
What is claimed is:
1. A substrate processing apparatus for processing a semiconductor
substrate comprising: a vacuum chamber, and a heater assembly
disposed within the vacuum chamber, the heater assembly comprising:
a heater having a supporting surface; an annular housing supported
by the heater, the annular housing having a top surface and a
bottom surface and a cylindrical wall extending peripherally below
the top surface and the bottom surface; an isolating ring encircled
by the cylindrical wall, the isolating ring in contact with the
bottom surface of the annular housing and the supporting heater
surface of the heater, and a conductive strap electrically
connecting the annular housing to the heater through screw holes in
place of slots.
2. The substrate processing apparatus of claim 1 wherein the
isolating ring is a single isolating ring.
3. The substrate processing apparatus of claim 1 wherein the
isolating ring directs an electrical potential difference to pass
under the annular housing and into the heater.
4. The substrate processing apparatus of claim 2 wherein the single
isolating ring eliminates spacer washers.
5. The substrate processing apparatus of claim 1 wherein the vacuum
chamber is a metal-containing film deposition chamber.
6. The substrate processing apparatus of claim 1 wherein the annual
housing is supported by at least three lift pins extending above
the supporting heater surface of the heater.
Description
BACKGROUND OF THE INVENTION
[0001] (1) Technical Field
[0002] This invention relates generally to semiconductor processes
and more particularly to improvements to vapor deposition equipment
for the prevention of high energy arcing causing particulate
contaminants to settle on semiconductor substrates during
deposition of titanium nitride.
[0003] 2. Description of the Prior Art
[0004] The fabrication of integrated circuit devices is a complex
manufacturing process-involving hundreds of steps that must be
executed with great precision. In simplified terms, making devices
involves three basic operations: deposition, patterning and
etching. These and other processes are repeated many times on a
silicon base substrate resulting in the buildup of microscopically
thin layers of materials. In the process of building these layers,
thousands or millions of transistors are created and
interconnected. When the process is complete, a single silicon base
substrate will contain hundreds of individual devices that are then
diced into separate device entities, tested for their electrical
properties, packaged and assembled.
[0005] During the forming of these well-defined integrated circuit
structures, it has become increasingly important to construct line
widths measuring in the sub micron and nanomicron ranges. Advances
in circuit packaging generally include reducing the size of
components that form these integrated circuit structures. With
smaller circuit components, the value of each unit area on a
silicon base substrate becomes higher because the ability to use
all of the substrate area for circuit components improves. To
properly form an integrated circuit with advanced circuit designs
that use higher percentages of the substrate area for smaller
components, it is critical that defect counts on a semiconductor
substrate be reduced below levels, which were previously acceptable
for many circuit designs. For example, minute particles of less
than 0.2 microns are unacceptable for many of the current advanced
circuit designs. This is because the small particles or defects can
damage the integrated circuit by shorting out two or more circuit
lines or by cutting or otherwise impairing the operation of these
circuits.
[0006] Thin film deposition techniques occupy an advantageous
position among current technologies. The established processes
remain efficient for many applications, while newer ones are
evolving rapidly based on customer requirements and evolutionary
technology. Tools are customized for sophisticated and often
difficult applications. This rapid movement involves significant
challenges. Manufacturers express an increasing need to deposit
films, on larger substrates, that are free from contaminates.
[0007] Applied Materials, Inc., a leader in making semiconductor
equipment, provides an integrated CVD/PVD (chemical and physical
vapor deposition) system. The Liner TxZ Centura designed for the
metallization of devices with 0.35-micron and under line widths,
combines a CVD titanium nitride chamber with a PVD titanium chamber
on a Centura/Endura platform. It enables chip producers to deposit
sequential layers of Ti and CVD TiN without worrying about the
growth of unwanted oxide between processing steps.
[0008] Referring to FIGS. 3 and 4, of the prior art, a significant
limitation of existing CVD-TiN (TxZ) processing equipment relates
to a conductive strap 26 and isolator rings 23, 24. The conductive
strap electrically connects a substrate heater platform 21 to an
annular housing 22, also known as an edge ring. A potential
difference build-up between the substrate heater platform and the
annular housing 22 generates a spark discharge between a gap
separating the inner periphery of the annular housing and the
periphery of the heater platform. The spark forms a cloud of
particulate contaminate that land on the substrate. This problem
has always been a major issue that impacts product quality and
throughput.
SUMMARY OF THE INVENTION
[0009] The present invention has been accomplished in view of the
above mentioned problems. That is therefore a primary object of the
present invention to prevent particulate contaminates from being
formed and landing on semiconductor substrates during vapor
deposition of TiN in a CVD-TXZ chamber.
[0010] Another object of the present invention has been to
eliminate a spark discharge in the vicinity of the semiconductor
substrate.
[0011] Still another object of the present invention has been to
increase CVD-TiN utilization by reducing down time needed for
machine maintenance.
[0012] Yet another object of the present invention has been to
improve product quality and throughput during vapor deposition of
TiN.
[0013] These objects have been achieved by a design modification of
an conductive strap and isolation rings so that the potential
difference is reduced and any cumulative electric charge build-up
would pass through the bottom of the isolation rings to the
supporting heater surface instead of arching between a gap
separating the inner periphery of the annular housing and the outer
periphery of the heater platform. The spark discharge generates a
cloud of particulate contaminates that land on the substrate
surface short circuiting sub-micron conductive circuit lines.
DESCRIPTION OF THE DRAWINGS
[0014] FIG. 1 is a CVD-TiN defect ratio chart of the prior art.
[0015] FIG. 2 shows an annular housing assembly of the prior art
and its placement on a heater of the prior art.
[0016] FIG. 3 illustrates a cut-away perspective of the annular
housing assembly connected to the heater of the prior art.
[0017] FIG. 4 shows an enlarged view of a conductive strap of the
prior art.
[0018] FIG. 5 illustrates an enlarged view of the annular housing
assembly connected to the heater of the prior art.
[0019] FIG. 6 illustrates an enlarged view of a conductive strap
according to the invention.
[0020] FIG. 7 shows an enlarged view of the annular housing
assembly connected to the heater according to the invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0021] Chipmaking is a complex manufacturing process-involving
hundreds of steps that must be executed with great precision. In
simplified terms, chipmaking involves three basic operations:
deposition, patterning and etching. These and other processes are
repeated many times on a silicon base substrate resulting in the
buildup of microscopically thin layers of materials. In the process
of building these layers, thousands or millions of transistors are
created and interconnected. When the process is complete, a single
silicon base substrate will contain hundreds of individual chips
that are then diced into separate chip entities, tested for their
electrical properties, packaged and assembled.
[0022] In view of the prior art, it is a principle object of the
present invention to provide an improved design of a conductive
strap and isolation rings contained within the annular housing. The
improvement is put into practice so that a potential difference,
within an electric field, is reduced in order that any cumulative
charge would pass through the bottom of the isolation rings to the
supporting heater surface instead of arching between a gap
separating the inner periphery of the annular housing and the outer
periphery of the heater platform, thereafter, eliminating the cloud
of particulate contaminates that land and short circuit the
sub-micron circuit lines formed on the semiconductor substrate.
[0023] FIG. 1 explains a graph 50 of CVD-TiN (TxZ) particle
analysis. The source of particles versus the particle counts 52 and
percent of particles 53 categorize the analysis. A cumulative
percent plot 56 is shown plotted above the bar chart. The
mechanical and arcing make up 2/3rds of the overall cumulative
percent. As shown by the arcing bar chart 55 in graph 50, arcing
contributes 30% of the overall particle categories and is a close
second to the mechanical category 55 that are caused by handling
and other mechanical associated particle producers. Particulates
caused by arcing have become a major detractor in the CVD-TiN
process.
[0024] Analysis of the process has shown that arcing occurs in the
gap area separating the heater and periphery of the annular
housing. The reason is that the proximity of the periphery of the
annular housing 22 to the outer periphery of the heater 21 creates
a path of least resistance whenever a large difference of electric
potential between the two is too high and the arc current jumps the
gap between the annular housing and heater.
[0025] Referring now to FIGS. 2 through 5 of the prior art. FIG. 2
shows an exploded view of the items making up the annular housing
assembly 15. The annular housing 22, shown inverted, has a top
surface 42, and a bottom surface 41 with a cylindrical wall 44
extending peripherally below the surfaces. The cylindrical wall
encircles and houses a pair of isolator rings 23 and 24, a first
isolator ring 24 separated from the bottom surface 41 of the
annular housing with spacer washers 29, a second isolator ring 23
separated from the bottom of the first isolator ring 24 by a second
set of spacer washers 29. Machine screws 27 are used to secure the
pair of isolator rings 23, 24 and spacer washers 29 to the annular
housing 22. conductive strap 25 electrically connects the annular
housing to the heater to minimize an electrical potential
difference. The heater assembly 20, which includes the annular
housing assembly, is best illustrated in FIGS. 3 and 5. The annular
housing assembly is supported by at least three lift pins 43
extending on the top periphery of heater 21. The annular housing
assembly 15 is placed on heater pins 43 shown in exploded view 16
of FIG. 2 as well as in FIG. 3.
[0026] FIG. 3 of the prior art, is a perspective cut-away view of
the heater assembly 20 to best illustrate the relationship of the
semiconductor substrate 10 and the various parts making up the
CVD-TiN chamber. The annular housing 22 is shown mounted on heater
pins 43. Isolator rings 23 and 24 are contained within the annular
housing and securely held to the bottom of its surface by machine
screws 29. The conductive strap 25 electrically ties heater 21 to
annular housing 22.
[0027] FIG. 5, of the prior art, pictorially illustrates the reason
arcing occurs during TiN deposition. A build of a potential
difference between the annular housing and heater caused by high
resistance contact between the conductive strap 25 and its
connecting terminal ends. The high resistance contact was
attributed to elongated slots 26. During the heat cycles, changing
from room temperature to high process temperatures, thermal
contraction and expansion eventually caused contact failure of the
small connecting surface. The potential difference 22 becomes too
great and the high arc current therefore, discharges to a path of
least resistance. This path was found to be between the annular
housing 22 and heater 21. The proximity of substrate 10 to this
path shows contaminants landing on the surface of the substrate
causing defects to happen in the circuit lines. FIG. 4 is a view of
the conductive strap 25 with the elongated slots 26.
[0028] FIG. 7, of the invention, pictorially illustrates the
solution to the problems described in the prior art. The potential
difference is minimized between the annular housing 32 and heater
21 by eliminating the high resistance contact between the
conductive strap 35 and its connecting terminal ends 36. The
contacting terminal ends were changed to holes. This increases the
contact area under the head of the screw. During the heat cycles,
the bowed portion of the conductive strap takes up changing from
room temperature to high process temperatures, thermal contraction
and expansion. The operation of the conductive strap 35 has since
proven itself by eliminating particulates on substrate 10 caused by
arcing. While the potential difference is minimized and the risk of
discharge is reduced, a path of least resistance has been
redirected to the underside of isolator ring 34. Making and using
one isolator ring 34 that are twice as thick as that used makes
this possible by conventional equipment. This also eliminates the
use of spacer washers. FIG. 6 is a view of the conductive strap 25
showing the terminal ends with holes 36.
[0029] In summary, a substrate processing apparatus for processing
a semiconductor substrate is disclosed. The apparatus includes a
vacuum chamber, and a heater assembly disposed within the vacuum
chamber. The heater assembly consists of a heater with a supporting
surface and an annular housing supported by the heater. The annular
housing has a top surface and a bottom surface and a cylindrical
wall extending peripherally below the top surface and the bottom
surface. An isolating ring is encircled by the cylindrical wall.
The isolating ring is in contact with the bottom surface of the
annular housing and the supporting heater surface of the heater. A
conductive strap electrically connects the annular housing to the
heater through screw holes in place of slots.
[0030] These and further constructional and operational
characteristics of the invention will be more evident from the
detailed description given hereafter with reference to the figures
of the accompanying drawings which illustrate preferred embodiments
and alternatives by way of non-limiting examples.
[0031] While the invention has been particularly shown and
described with reference to the preferred embodiments thereof, it
will be understood by those skilled in the art that various changes
in form and details may be made without departing from the spirit
and scope of the invention.
* * * * *