U.S. patent application number 10/879745 was filed with the patent office on 2005-06-16 for method for fabricating capacitor in semiconductor device.
This patent application is currently assigned to HYNIX SEMICONDUCTOR INC.. Invention is credited to Lee, Kee-Jeung, Roh, Jae-Sung.
Application Number | 20050130326 10/879745 |
Document ID | / |
Family ID | 34651336 |
Filed Date | 2005-06-16 |
United States Patent
Application |
20050130326 |
Kind Code |
A1 |
Lee, Kee-Jeung ; et
al. |
June 16, 2005 |
Method for fabricating capacitor in semiconductor device
Abstract
The present invention relates to a method for fabricating a
capacitor in a semiconductor device through the use of
hafnium-terbium oxide (Hf.sub.1-xTb.sub.xO) as a dielectric layer.
The method includes the steps of: forming a lower electrode on a
substrate; forming an amorphous hafnium-terbium oxide
(Hf.sub.1-xTb.sub.xO) dielectric layer on the lower electrode;
crystallizing the Hf.sub.1-xTb.sub.xO dielectric layer by
performing a thermal process; and forming an upper electrode on the
Hf.sub.1-xTb.sub.xO dielectric layer.
Inventors: |
Lee, Kee-Jeung; (Icho-shi,
KR) ; Roh, Jae-Sung; (Ichon-shi, KR) |
Correspondence
Address: |
FINNEGAN, HENDERSON, FARABOW, GARRETT & DUNNER
LLP
901 NEW YORK AVENUE, NW
WASHINGTON
DC
20001-4413
US
|
Assignee: |
HYNIX SEMICONDUCTOR INC.
|
Family ID: |
34651336 |
Appl. No.: |
10/879745 |
Filed: |
June 30, 2004 |
Current U.S.
Class: |
438/3 ;
257/E21.013; 257/E21.019; 257/E21.274; 257/E21.648; 438/240;
438/398 |
Current CPC
Class: |
C23C 16/405 20130101;
H01L 21/02194 20130101; H01L 21/0228 20130101; H01L 28/91 20130101;
H01L 21/3141 20130101; C23C 16/45531 20130101; H01L 21/02181
20130101; H01L 21/31604 20130101; H01L 21/31645 20130101; H01L
27/10852 20130101; H01L 28/84 20130101; H01L 21/02271 20130101;
C23C 16/56 20130101 |
Class at
Publication: |
438/003 ;
438/240; 438/398 |
International
Class: |
H01L 021/00; H01L
021/8242; H01L 021/76 |
Foreign Application Data
Date |
Code |
Application Number |
Dec 10, 2003 |
KR |
2003-89418 |
Claims
What is claimed is:
1. A method for fabricating a capacitor in a semiconductor device,
comprising the steps of: forming a lower electrode on a substrate;
forming an amorphous hafnium-terbium oxide (Hf.sub.1-xTb.sub.xO)
dielectric layer on the lower electrode; crystallizing the
Hf.sub.1-xTb.sub.xO dielectric layer by performing a thermal
process; and forming an upper electrode on the Hf.sub.1-xTb.sub.xO
dielectric layer.
2. The method of claim 1, wherein a subscript x of the
Hf.sub.1-xTb.sub.xO dielectric layer represents an atomic ratio of
terbium (Tb) and has a value ranging from approximately 0.03 to
approximately 0.1.
3. The method of claim 1, wherein the Hf.sub.1-xTb.sub.xO
dielectric layer is formed with a thickness less than approximately
100 .ANG..
4. The method of claim 3, wherein the Hf.sub.1-xTb.sub.xO
dielectric layer is formed by an atomic layer deposition (ALD)
method.
5. The method of claim 3, wherein the Hf.sub.1-xTb.sub.xO
dielectric layer is formed by a low pressure chemical vapor
deposition (LPCVD) method.
6. The method of claim 4, wherein the Hf.sub.1-xTb.sub.xO
dielectric layer is formed by using a source gas of hafnium (Hf)
selected from a group consisting of C.sub.16H.sub.36HfO.sub.4 and
Hf-precursors of Hf-containing organic metal compounds.
7. The method of claim 4, wherein the Hf.sub.1-xTb.sub.xO
dielectric layer is formed by using a source gas of Tb selected
from a group consisting of Tb(OC.sub.2H.sub.5).sub.3 and
Tb-precursors of Tb-containing organic metal compounds.
8. The method of claim 4, wherein a reaction gas for forming the
Hf.sub.1-xTb.sub.xO dielectric layer is selected from a group
consisting of O.sub.3 gas, O.sub.2 plasma gas and water vapor.
9. The method of claim 6, wherein the Hf-source gas is supplied
with a flow rate ranging from approximately 50 sccm to
approximately 500 sccm.
10. The method of claim 7, wherein the Tb-source gas is supplied
with a flow rate ranging from approximately 50 sccm to
approximately 500 sccm.
11. The method of claim 8, wherein the reaction gas is supplied
with a flow rate ranging from approximately 0.1 slm to
approximately 1 slm.
12. The method of claim 8, wherein if the O.sub.3 gas is used as
the reaction gas, a concentration of the O.sub.3 gas is set to be
in a range of approximately 200.+-.20 g/m.sup.3.
13. The method of claim 5, wherein the Hf.sub.1-xTb.sub.xO
dielectric layer is formed by using a source gas of hafnium (Hf)
selected from a group consisting of C.sub.16H.sub.36HfO.sub.4 and
Hf-precursors of Hf-containing organic metal compounds.
14. The method of claim 5, wherein the Hf.sub.1-xTb.sub.xO
dielectric layer is formed by using a source gas of Tb selected
from a group consisting of Tb(OC.sub.2H.sub.5).sub.3 and
Tb-precursors of Tb-containing organic metal compounds.
15. The method of claim 5, wherein a reaction gas for forming the
Hf.sub.1-xTb.sub.xO dielectric layer is selected from a group
consisting of O.sub.3 gas, O.sub.2 plasma gas and water vapor.
16. The method of claim 13, wherein the Hf-source gas is supplied
with a flow rate ranging from approximately 50 sccm to
approximately 500 sccm.
17. The method of claim 14, wherein the Tb-source gas is supplied
with a flow rate ranging from approximately 50 sccm to
approximately 500 sccm.
18. The method of claim 15, wherein the reaction gas is supplied
with a flow rate ranging from approximately 0.1 slm to
approximately 1 slm.
19. The method of claim 15, wherein if the O.sub.3 gas is used as
the reaction gas, a concentration of the O.sub.3 gas is set to be
in a range of approximately 200.+-.20 g/m.sup.3.
20. The method of claim 4, wherein the ALD method for forming the
Hf.sub.1-xTb.sub.xO dielectric layer proceeds by repeatedly
performing a cycle for forming a hafnium oxide (HfO.sub.2) layer
and a cycle for forming a terbium oxide (Tb.sub.xO.sub.y) layer, in
which subscripts x and y represent atomic ratios of terbium and
oxygen, in a ratio less than approximately 9 to approximately
1.
21. The method of claim 4, wherein the ALD method for forming the
Hf.sub.1-xTb.sub.xO dielectric layer proceeds by repeatedly
performing a cycle of sequentially proving a Hf-source gas, a purge
gas, a Tb source gas, a purge gas, a reaction gas, and a purge gas
under a condition that the Hf source gas and the Tb source gas are
provided in a ratio less than approximately 9 to approximately
1.
22. The method of claim 5, wherein the LPCVD method for forming the
Hf.sub.1-xTb.sub.xO dielectric layer proceeds by vaporizing organic
metal compounds individually containing Hf and Tb in a respective
ratio less than approximately 9 to approximately 1 through the use
of a flow quantity controller and providing individually the
vaporized organic metal compounds to a reaction chamber for the
LPCVD method.
23. The method of claim 22, wherein the reaction chamber for the
LPCVD method is maintained with a temperature ranging from
approximately 250.degree. C. to approximately 500.degree. C.
24. The method of claim 1, wherein the thermal process is one of a
furnace annealing process and a rapid thermal process.
25. The method of claim 1, wherein the thermal process is carried
out at a temperature ranging from approximately 500.degree. C. to
approximately 900.degree. C. in an atmosphere of N.sub.2 under one
of an increasing pressure and a decreasing process.
26. The method of claim 1, wherein the thermal process is carried
out at a temperature ranging from approximately 500.degree. C. to
approximately 900.degree. C. in an atmosphere of O.sub.2 and
N.sub.2 mixed in a ratio less than approximately 1 to 10 under one
of an increasing pressure and a decreasing process.
27. The method of claim 1, wherein the lower electrode and the
upper electrode are made of polysilicon.
28. The method of claim 1, wherein the lower electrode and the
upper electrode are made of a metal selected from a group
consisting of TiN, Ru, TaN, W, WSi, WN, RuO.sub.2, Ir, IrO.sub.2,
and Pt.
Description
FIELD OF THE INVENTION
[0001] The present invention relates to a method for fabricating a
capacitor in a semiconductor device; and, more particularly, to a
method for fabricating a capacitor in a semiconductor device with
use of hafnium-terbium oxide.
DESCRIPTION OF RELATED ARTS
[0002] A recent progression in micronization in semiconductor
technology has led to acceleration in achieving a large-scale of
integration of a memory device. As a result, a unit cell area is
decreased and a required operation voltage becomes low. Although
the unit cell area is decreased, a capacitance is required to be
greater than 25 fF per cell in order to prevent incidences of soft
error and shortened refresh time. Therefore, there have been
diverse approaches to secure a required capacitance. For instance,
in a capacitor for use in a dynamic random access memory (DRAM)
device, wherein a silicon nitride (Si.sub.3N.sub.4) layer formed by
employing dichlorosilane (DCS) gas is used as a dielectric layer
for the capacitor, a lower electrode is formed in three dimensions
and in the form of hemisphere of which surface area is large; and a
height of the capacitor is increased.
[0003] However, the increased height of the capacitor creates a
height difference between the cell region and the peripheral
region, and this height difference adversely results in a
difficulty in securing a depth of focus during a subsequent
photo-exposure process. Hence, it is limited to have a capacitance
of a capacitor required for the next generation DRAM device with a
memory capacitance of over 256 megabytes.
[0004] Because of this limitation, the development of the capacitor
has been currently focused to have an appropriate height along with
a sufficient capacitance by using of a dielectric material having a
high dielectric constant. Examples of such dielectric material are
tantalum oxide (Ta.sub.2O.sub.5) having a dielectric constant of
25, hafnium oxide (HfO.sub.2) having a dielectric constant ranging
from 20 to 30 and alumina (Al.sub.2O.sub.3) having a dielectric
constant of 9.
[0005] Despite of the use of the high dielectric material, a
Ta.sub.2O.sub.5 dielectric layer is susceptible to leakage currents
because the Ta.sub.2O.sub.5 dielectric layer becomes deteriorated
by a thermal process performed after the formation of the
Ta.sub.2O.sub.5 layer. Also, it is limited to form an
Al.sub.2O.sub.3 dielectric layer with a sufficient capacitance
because of a relatively low dielectric constant of Al.sub.2O.sub.3
compared with HfO.sub.2 and Ta.sub.2O.sub.5. Further, an HfO.sub.2
dielectric layer has a low intensity of breakdown voltage, thereby
being susceptible to repeated electric stress. Thus, durability of
a capacitor with the HfO.sub.2 dielectric layer may become
reduced.
SUMMARY OF THE INVENTION
[0006] It is, therefore, an object of the present invention to
provide a method for fabricating a capacitor in a semiconductor
device capable of improving reliability of a dielectric layer and
securing a required capacitance for an operation of a highly
integrated device.
[0007] In accordance with an aspect of the present invention, there
is provided a method for fabricating a capacitor in a semiconductor
device, including the steps of: forming a lower electrode on a
substrate; forming an amorphous hafnium-terbium oxide
(Hf.sub.1-xTb.sub.xO) dielectric layer on the lower electrode;
crystallizing the Hf.sub.1-xTb.sub.xO dielectric layer by
performing a thermal process; and forming an upper electrode on the
Hf.sub.1-xTb.sub.xO dielectric layer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] The above and other objects and features of the present
invention will become better understood with respect to the
following description of the preferred embodiments given in
conjunction with the accompanying drawings, in which:
[0009] FIG. 1 is a cross-sectional view describing a method for
fabricating a cylindrical capacitor in accordance with a first
embodiment of the present invention;
[0010] FIG. 2 is a diagram showing sequential steps of forming a
hafnium-terbium oxide (Hf.sub.1-xTb.sub.xO) layer, in which a
subscript x representing an atomic ratio of terbium (Tb), by
employing an atomic layer deposition method in accordance with the
first embodiment of the present invention;
[0011] FIG. 3 is a cross-sectional view of a capacitor formed in
the form of concave in accordance with a second embodiment of the
present invention; and
[0012] FIG. 4 is a cross-sectional view of a capacitor in the form
of inner cylinder in accordance with a third embodiment of the
present invention.
DETAILED DESCRIPTION OF THE INVENTION
[0013] A method for fabricating a capacitor in a semiconductor
device in accordance with a preferred embodiment of the present
invention will be described in detail with reference to the
accompanying drawings.
[0014] FIG. 1 is a cross-sectional view illustrating a method for
fabricating a cylindrical capacitor in accordance with a first
embodiment of the present invention.
[0015] As shown, an inter-layer insulation layer 11 made of silicon
dioxide (SiO.sub.2) is formed on a semi-finished substrate 10.
Although not illustrated, the semi-finished substrate 10 is
provided with various device elements such as transistors and bit
lines by performing predetermined processes for forming such device
elements. Then, the inter-layer insulation layer 11 is etched to
form contact holes 12A exposing predetermined portions of the
substrate 10. A conductive material is deposited into the contact
holes 12A and on the inter-layer insulation layer 11 until the
contact holes 12A are filled with the conductive material.
Afterwards, a chemical mechanical polishing (CMP) process or an
etch-back process is performed to form contact plugs 12B connecting
a subsequent lower electrode of a capacitor to the substrate
10.
[0016] Although not illustrated, an oxide layer for forming a
capacitor is formed on the above resulting substrate structure and
is then etched to form holes exposing the contact plugs 12B.
[0017] Next, a metal layer or a polysilicon layer for forming a
lower electrode is formed on the holes and the oxide layer. Herein,
the metal layer is made of a material selected from a group
consisting of titanium nitride (TiN), ruthenium (Ru), tantalum
nitride (TaN), tungsten (W), tungsten silicide (WSi), tungsten
nitride (WN), ruthenium dioxide (RuO.sub.2), iridium (Ir), and
platinum (Pt). Then, a CMP process or an etch-back process is
performed to the above metal or polysilicon layer. Thereafter, the
oxide layer is removed to form cylindrical lower electrodes 13.
[0018] In case that the lower electrodes 13 are made of
polysilicon, the lower electrodes 13 are subjected to a cleaning
process before a dielectric layer 14 is formed for the purpose of
removing a native oxide layer formed on the lower electrodes 13 and
blocking hydrogen diffusions. For the cleaning process,
hydrofluoric acid (HF) diluted with water preferably in a ratio of
approximately 1 part of HF to approximately 10 parts to
approximately 100 parts of water, or a mixed solution of deionized
water (DI) and HF that is diluted with ammonium hydroxide
(NH.sub.4OH) in a ratio of 1 part of HF to approximately 5 parts to
approximately 500 parts of NH.sub.4OH is preferably used.
[0019] Although not illustrated, a diffusion barrier layer made of
a material selected from a family of silicon nitride (SiN.sub.x) is
formed on the lower electrodes 13 in order to prevent silicon or
impurities from being diffused into a dielectric layer which will
be subsequently formed. The diffusion barrier layer is formed by
nitriding a surface of the lower electrodes 13 through performing
one of a furnace annealing process and a rapid thermal process
(RTP) in an atmosphere of ammonia (NH.sub.3) gas.
[0020] Also, before and after the above cleaning process, it is
possible to perform an additional cleaning process by using a mixed
solution of ammonium hydroxide (NH.sub.4OH), hydrogen peroxide
(H.sub.2O.sub.2) and water (H.sub.2O), a mixed solution of sulfuric
acid (H.sub.2SO.sub.4) and H.sub.2O.sub.2, or a mixed solution of
H.sub.2SO.sub.4 and H.sub.2O in order to remove organic or
inorganic particles, or other impurities remaining on the lower
electrodes 13 made of polysilicon.
[0021] Next, the above mentioned dielectric layer 14 is formed on
the lower electrodes 13. At this time, the dielectric layer 14 is
made of hafnium-terbium oxide (Hf.sub.1-xTb.sub.xO) and has a
thickness less than approximately 100 .ANG.. Herein, a subscript x
represents an atomic ratio of Tb.
[0022] More specifically, the Hf.sub.1-xTb.sub.xO dielectric layer
14 is formed by employing one of an atomic layer deposition (ALD)
method or a low pressure chemical vapor deposition (LPCVD) method.
At this time, such a material as C.sub.16H.sub.36HfO.sub.4, or a
precursor of Hf such an organic metal compound as
tetrakis-diethylamino-hafnium (TDEAHf) and tetrakis-ethyl
methylamino-hafnium (TEMAHf) is used as a source gas of Hf. For a
source gas of Tb, such a material as Tb(OC.sub.2H.sub.5).sub.3, or
a precursor of Tb such a Tb-containing organic-metal compound as
Tb(CH.sub.3).sub.3 is used. Also, a reaction gas is selected from a
group consisting of O.sub.3, O.sub.2 plasma gas and water
vapor.
[0023] In addition, since a dielectric constant of the
Hf.sub.1-xTb.sub.xO dielectric layer 14, a level of leakage
currents and a breakdown voltage characteristic are determined by a
Tb content, the atomic ratio of Tb, i.e., the subscript x, is set
to be in a range between approximately 0.03 to approximately 0.1 in
order to obtain a dielectric constant of the Hf.sub.1-xTb.sub.xO
dielectric layer 14 in a range from approximately 30 to
approximately 50. That is, if the Hf.sub.1-xTb.sub.xO dielectric
layer 14 having a high dielectric constant ranging from
approximately 30 to approximately 50 is formed by controlling the
Tb content, it is possible to have a thickness of an equivalent
oxide layer ranging from approximately 10 .ANG. to approximately 20
.ANG.. As a result of this effect, it is further possible to secure
a sufficient capacitance of a capacitor, to have a level of leakage
currents lower than a hafnium oxide (HfO.sub.2) layer and to have a
pronounced breakdown voltage characteristic. Also, since the
Hf.sub.1-xTb.sub.xO dielectric layer 14 has a good thermal
stability at a high temperature compared with the HfO.sub.2 layer,
it is possible to prevent degradation of an electric characteristic
during a high thermal process for crystallizing the
Hf.sub.1-xTb.sub.xO dielectric layer 14, thereby improving
durability and reliability of a capacitor.
[0024] Preferably, a flow rate of each of the Hf and Tb source
gases is controlled to be in a range from approximately 50 sccm to
approximately 500 sccm. Meanwhile, a flow rate of the reaction gas
is controlled to be in a range from approximately 0.1 slm to
approximately 1 slm. In case that O.sub.3 is used as the reaction
gas, a concentration of the O.sub.3 reaction gas is controlled to
be in a range between approximately 220 g/m.sup.3 and approximately
180 g/m.sup.3.
[0025] If the Hf.sub.1-xTb.sub.xO dielectric layer 14 is formed by
employing an ALD method, two cycles respectively for forming a
HfO.sub.2 layer and a terbium oxide (Tb.sub.xO.sub.y) layer, in
which subscripts x and y represent a respective atomic ratio of Tb
and O are repeatedly performed. Especially, a first cycle for
forming the HfO.sub.2 layer includes the sequential steps of
providing a source gas of Hf, providing a purge gas such as N.sub.2
or Ar gas, providing a reaction gas of O.sub.3, and providing a
purge gas such as N.sub.2 or Ar gas, and a second cycle for forming
the Tb.sub.xO.sub.y layer includes the sequential steps of
providing a source gas of Tb, providing a purge gas such as N.sub.2
or Ar gas, providing a reaction gas of O.sub.3, and providing a
purge gas such as N.sub.2 or Ar gas. Particularly, the first and
the second cycles are repeated in a respective ratio less than
approximately 9 to approximately 1. It is also possible to
repeatedly perform a cycle including the sequential steps of
providing a source gas of Hf, providing a purge gas of N.sub.2 or
Ar, providing a source gas of Tb, providing a purge gas of N.sub.2
or Ar, providing a reaction gas of O.sub.3, and providing a purge
gas of N.sub.2 or Ar. At this time, the number of providing the Hf
source gas and that of providing the Tb source gas is set to be in
a ratio less than approximately 9 to approximately 1.
[0026] If the LPCVD method is used to form the Hf.sub.1-xTb.sub.xO
dielectric layer 14, inorganic metal compounds individually
containing Hf and Tb are controlled to have a ratio of Hf and Tb
less than approximately 9 to approximately 1 through the use of a
flow controller such as a mass flow controller (MFC) and are then
vaporized by a vaporizer maintained with a temperature ranging from
approximately 150.degree. C. to approximately 300.degree. C.
Thereafter, these Hf and Tb source gases are provided to a LPCVD
reaction chamber maintained with a temperature ranging from
approximately 250.degree. C. to approximately 500.degree. C.
[0027] Next, the Hf.sub.1-xTb.sub.xO dielectric layer 14 is
crystallized by a thermal process to thereby have an improved
dielectric characteristic. Herein, the thermal process is one of a
furnace annealing process and a rapid thermal process (RTP) and
proceeds under an increasing or a decreasing pressure and at a
temperature ranging from approximately 500.degree. C. to
approximately 900.degree. C. in an atmosphere of N.sub.2, or in an
atmosphere of O.sub.2 and N.sub.2 mixed in a ratio less than
approximately 1 to approximately 10. Especially, this thermal
process is performed for the purpose of removing impurities of
carbon contained in the Hf.sub.1-xTb.sub.xO dielectric layer.
[0028] Afterwards, an upper electrode 15 is formed on the
Hf.sub.1-xTb.sub.xO dielectric layer 14 by using a metal layer
selected from a group consisting of TiN, Ru, TaN, W, WSi, WN,
RuO.sub.2, Ir, IrO.sub.2, and Pt, or by using a polysilicon
layer.
[0029] Although not illustrated, in case that the upper electrode
15 is made of polysilicon, a diffusion barrier layer made of a
nitride-based material selected from a family of SiN.sub.x is
formed between the upper electrode 15 and the Hf.sub.1-xTb.sub.xO
dielectric layer 14. The diffusion barrier layer is formed by
nitriding the Hf.sub.1-xTb.sub.xO dielectric layer 14 through the
use of the same method applied for nitriding the lower electrode
13. Also, although not illustrated, a buffer layer is formed on the
upper electrode 15 in order to maintain structural stability to
humidity, temperature, or an electric shock. At this time, the
buffer layer is made of polysilicon or silicon nitride and has a
thickness ranging from approximately 200 .ANG. to approximately
1000 .ANG..
[0030] FIG. 2 is a diagram showing the above described cycles of
the ALD method for forming a hafnium-terbium oxide
(Hf.sub.1-xTb.sub.xO) layer, in which a subscript x represents an
atomic ratio of Tb in accordance with the first embodiment of the
present invention. As shown, each cycle includes steps of
sequentially providing a source gas, a purge gas, a reaction gas
and a purge gas. More specifically, as described above, the
Hf.sub.1-xTb.sub.xO dielectric layer 14 is formed by repeatedly
performing two cycles respectively for forming a HfO.sub.2 layer
and a terbium oxide (Tb.sub.xO.sub.y) layer, in which subscripts x
and y represent a respective atomic ratio of Tb and O. A first
cycle for forming the HfO.sub.2 layer includes the sequential steps
of providing a source gas of Hf, providing a purge gas such as
N.sub.2 or Ar gas, providing a reaction gas of O.sub.3, and
providing a purge gas such as N.sub.2 or Ar gas, and a second cycle
for forming the Tb.sub.xO.sub.y layer includes the sequential steps
of providing a source gas of Tb, providing a purge gas such as
N.sub.2 or Ar gas, providing a reaction gas of O.sub.3, and
providing a purge gas such as N.sub.2 or Ar gas.
[0031] Particularly, the first and the second cycles are repeated
in a respective ratio less than approximately 9 to approximately 1.
It is also possible to repeatedly perform a cycle including the
sequential steps of providing a source gas of Hf, providing a purge
gas of N.sub.2 or Ar, providing a source gas of Tb, providing a
purge gas of N.sub.2 or Ar, providing a reaction gas of O.sub.3,
and providing a purge gas of N.sub.2 or Ar. At this time, the
number of providing the Hf source gas and that of providing the Tb
source gas is set to be in a ratio less than approximately 9 to
approximately 1.
[0032] In accordance with the first embodiment of the present
invention, the Hf.sub.1-xTb.sub.xO layer is used as a dielectric
layer of the capacitor to thereby obtain an equivalent oxide layer
having a thickness (Tox) ranging from approximately 10 .ANG. to
approximately 20 .ANG. and a high dielectric constant ranging from
approximately 30 to approximately 50. As a result of this effect,
it is possible to secure a sufficient capacitance of the capacitor
required for operations of a highly integrated device. Also,
reliability of the dielectric layer can be improved since it is
possible to obtain a low level of leakage currents compared with an
HfO.sub.2 layer and a pronounced breakdown voltage characteristic.
Furthermore, because of a good thermal stability in a high
temperature, it is further possible to improve durability and
reliability of the capacitor.
[0033] Meanwhile, although a case of applying a hemispherical grain
structure or a concavo-convex structure to the lower electrode is
not exemplified in the first embodiment, it is still possible to
maximize a surface area of the capacitor by forming the lower
electrode made of polysilicon and then applying the HSG or
concavo-convex structure to the lower electrode.
[0034] Also, although the first embodiment of the present invention
exemplifies a case of forming the lower electrode 13 in the form of
cylinder, the first embodiment of the present invention can be
applied to form a lower electrode in a concave type or an inner
cylinder type.
[0035] FIG. 3 shows a case of forming the lower electrode 13A in
the concave type in accordance with a second embodiment of the
present invention. Meanwhile, FIG. 4 shows a case of forming the
lower electrode 13B in the inner hemispherical grain (HSG) cylinder
type in accordance with a third embodiment of the present
invention. Herein, the same reference numerals used in the first
embodiment are used for the second embodiment and the third
embodiment, and detailed description on the formation of the lower
electrode 13A in the form of concave type and on that of the lower
electrode 13B in the form of inner HSG cylinder type will be
omitted. It should be noted that, unlike the cylindrical lower
electrode 13 formed under a state that the capacitor oxide layer is
removed, the lower electrode 13A is formed in the presence of a
capacitor oxide layer 11A. In the mean time, the lower electrode
13B is formed by forming HSG on inner walls of the cylindrical
lower electrode.
[0036] Furthermore, the first embodiment can be identically applied
to a case that each of the lower electrode 13A formed in the
cylinder type and the lower electrode 13B formed in the inner
cylinder type is made of polysilicon to form the HSG structure or
the concavo-convex structure on surfaces of the lower electrodes
13A and 13B. The reference numeral 20 in FIGS. 3 and 4 represents
this HSG or concavo-convex structure.
[0037] In accordance with the first to the third preferred
embodiments of the present invention, the dielectric layer made of
Hf.sub.1-xTb.sub.xO makes it possible to improve reliability of the
dielectric layer and secure a sufficient capacitance of the
capacitor.
[0038] The present application contains subject matter related to
the Korean patent application No. KR 2003-0089418, filed in the
Korean Patent Office on Dec. 10, 2003, the entire contents of which
being incorporated herein by reference.
[0039] While the present invention has been described with respect
to certain preferred embodiments, it will be apparent to those
skilled in the art that various changes and modifications may be
made without departing from the spirit and scope of the invention
as defined in the following claims.
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