U.S. patent application number 10/849352 was filed with the patent office on 2004-10-28 for method of fabricating a semiconductor work object.
Invention is credited to Dow, Daniel B..
Application Number | 20040214436 10/849352 |
Document ID | / |
Family ID | 32298413 |
Filed Date | 2004-10-28 |
United States Patent
Application |
20040214436 |
Kind Code |
A1 |
Dow, Daniel B. |
October 28, 2004 |
Method of fabricating a semiconductor work object
Abstract
A method of forming a conductive plug in a contact hole
comprising: providing a wafer having a conductive layer comprising
silicon adjacent a dielectric layer comprising silicon oxide, and a
contact hole disposed in the dielectric layer, the contact hole
having surfaces that include sidewalls formed in the dielectric
layer and a bottom defined by the conductive layer, a contaminant
material being disposed over at least a portion of the conductive
layer defining the bottom of the contact hole, the dielectric layer
having a surface in which the contact hole terminates in an opening
opposing the bottom; depositing a layer of a barrier material on
the work object, the layer having a substantially uniform thickness
from the surface at the opening of the contact hole to the bottom
of the contact hole; and depositing a layer of a protective
material barrier around at least opening of the contact hole;
etching the material at the bottom of the contact hole to expose
the contaminant material while retaining protective material around
the opening of the contact hole; etching the contact hole to remove
contaminant material disposed over the conductive layer at the
bottom of the contact hole; and filling the contact hole with a
conductive material to form a plug.
Inventors: |
Dow, Daniel B.; (Boise,
ID) |
Correspondence
Address: |
BRADLEY M GANZ, PC
P O BOX 10105
PORTLAND
OR
97296
|
Family ID: |
32298413 |
Appl. No.: |
10/849352 |
Filed: |
May 18, 2004 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10849352 |
May 18, 2004 |
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09499594 |
Feb 7, 2000 |
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6737356 |
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Current U.S.
Class: |
438/689 ;
257/E21.252; 257/E21.578; 257/E21.585 |
Current CPC
Class: |
H01L 21/31116 20130101;
H01L 21/76844 20130101; H01L 21/02063 20130101; H01L 21/76877
20130101; H01L 21/76864 20130101; H01L 21/76804 20130101; H01L
21/76843 20130101 |
Class at
Publication: |
438/689 |
International
Class: |
H01L 021/302; H01L
021/461 |
Claims
What is claimed:
1. A method of preparing a contact hole to receive a conductive
plug comprising: providing a work object having a conductive layer
adjacent a dielectric layer, and a contact hole disposed in the
dielectric layer, the contact hole having surfaces that include
sidewalls formed in the dielectric layer and a bottom defined by
the conductive layer, the contact hole having an opening for
receiving a conductive plug material; and depositing a layer of
protective material on at least the surface around the opening of
the contact hole, the material deposited being sufficient to
protect the CDs of the contact hole opening during an etch of the
contact hole to remove any contaminant material disposed over the
conductive layer at the bottom of the contact hole.
2. The method of claim 1 further comprising depositing a layer of
barrier material over the surfaces of the contact hole before
deposition of the protective material, and etching the barrier
layer at the bottom of the contact hole to expose any contaminant
material, while retaining protective material around the opening of
the contact hole following the etch of the barrier layer.
3. The method of claim 2 further wherein a dry etch technique is
used to etch the barrier layer at the bottom of the contact hole
and a wet etch technique is used to etch any contaminant material
exposed following the dry etch.
4. The method of claim 2 wherein the layer of barrier material
comprises a refractory metal based compound extending from the
surface at the opening of the contact hole to the bottom of the
contact hole; and the layer of protective material comprises a
refractory metal based compound extending from the opening of the
contact hole to a selected depth into the contact hole.
5. The method of claim 1 wherein the conductive layer comprises a
silicon based material and the dielectric layer comprises a silicon
oxide based material.
6. The method of claim 4 wherein the conductive layer comprises a
silicon-based material and the dielectric layer comprises a silicon
oxide based material.
7. The method of claim 2 wherein the layer of protective material
is deposited by PVD.
8. The method of claim 7 wherein the layer of barrier material is
deposited by CVD.
9. The method of claim 1 wherein the layer of protective material
comprises TiN.
10. The method of claim 6 wherein the refractory based compound for
at least one of the barrier layer and protective layer comprises
TiN.
11. The method of claim 4 wherein the layer of protective material
is deposited by a CVD process and the layer of protective material
is deposited by a PVD process.
12. The method of claim 8 wherein the layer of protective material
is TiN deposited by a CVD process and the layer of protective
material is TiN deposited by a PVD process.
13. The method of claim 1 wherein the contact hole has a high
aspect ratio.
14. The method of claim 4 wherein the contact hole has a high
aspect ratio.
15. The method of claim 13 wherein the opening of the contact hole
at the surface of the dielectric layer has a width of about 2
microns or less.
16. The method of claim 14 wherein the opening of the contact hole
at the surface of the dielectric layer has a width of about 2
microns or less.
17. The method of claim 15 wherein the aspect ratio of the contact
hole is about 3:1 or more.
18. The method of claim 16 wherein the aspect ratio of the contact
hole is about 3:1 or more.
19. The method of claim 4 further comprising depositing a layer of
a refractory metal on the bottom of the contact hole subsequent to
the wet etch.
20. A method of forming a conductive plug in a contact hole
comprising: providing a work object having a conductive layer
adjacent a dielectric layer, and a contact hole disposed in the
dielectric layer, the contact hole having surfaces that include
sidewalls formed in the dielectric layer and a bottom defined by
the conductive layer, the contact hole having an opening for
receiving a conductive plug material; depositing a layer of
protective material on at least the surface around the opening of
the contact hole, the material deposited being sufficient to
protect the CDs of the contact hole opening during etching of the
contact hole to remove any contaminant material disposed over the
conductive layer at the bottom of the contact hole; etching the
protective material at the bottom of the contact hole to expose the
contaminant material while retaining protective material around the
opening of the contact hole; and filling the contact hole with a
conductive material to form a plug.
21. The method of claim 20 wherein the conductive layer is silicon
based and the dielectric layer is a silicon oxide.
22. The method of claim 21 further comprising depositing a layer of
barrier material over the surfaces of the contact hole before
deposition of the protective material, and etching the barrier
layer at the bottom of the contact hole to expose any contaminant
material, while retaining protective material around the opening of
the contact hole following the etch of the barrier layer.
23. The method of claim 22 further wherein a dry etch technique is
used to etch the barrier layer at the bottom of the contact hole
and a wet etch technique is used to etch any contaminant material
exposed following the dry etch.
24. The method of claim 23 wherein the layer of barrier material
comprises a refractory metal based compound extending from the
surface at the opening of the contact hole to the bottom of the
contact hole; and the layer of protective material comprises a
refractory metal based compound extending from the opening of the
contact hole to a selected depth into the contact hole.
25. The method of claim 22 wherein the layer of protective material
is deposited by PVD.
26. The method of claim 25 wherein the layer of barrier material is
deposited by CVD.
27. The method of claim 25 wherein the layer of protective material
comprises TiN.
28. The method of claim 24 wherein the refractory based compound
for at least one of the barrier layer and protective layer
comprises TiN.
29. The method of claim 24 wherein the first layer of protective
material is deposited by a CVD process and the second layer of
protective material is deposited by a PVD process.
30. The method of claim 24 wherein the first layer of protective
material is TiN deposited by a CVD process and the second layer of
protective material is TiN deposited by a PVD process.
31. The method of claim 22 wherein the contact hole has a high
aspect ratio.
32. The method of claim 29 wherein the contact hole has a high
aspect ratio.
33. The method of claim 31 wherein the opening of the contact hole
at the surface of the dielectric layer has a width of about 2
microns or less.
34. The method of claim 32 wherein the opening of the contact hole
at the surface of the dielectric layer has a width of about 2
microns or less.
35. The method of claim 33 wherein the aspect ratio of the contact
hole is about 3:1 or more.
36. The method of claim 34 wherein the aspect ratio of the contact
hole is about 3:1 or more.
37. The method of claim 23 further comprising depositing a layer of
a refractory metal on the bottom of the contact hole subsequent to
the wet etch.
38. A method of forming a conductive plug in a contact hole
comprising: providing a wafer having a conductive layer comprising
silicon adjacent a dielectric layer comprising silicon oxide, and a
contact hole disposed in the dielectric layer, the contact hole
having surfaces that include sidewalls formed in the dielectric
layer and a bottom defined by the conductive layer, a contaminant
material being disposed over at least a portion of the conductive
layer defining the bottom of the contact hole, the dielectric layer
having a surface in which the contact hole terminates in an opening
opposing the bottom; depositing a layer of a barrier material on
the work object, the layer having a substantially uniform thickness
from the surface at the opening of the contact hole to the bottom
of the contact hole; and depositing a layer of a protective
material barrier around at least the opening of the contact hole;
etching the material at the bottom of the contact hole to expose
the contaminant material while retaining protective material around
the opening of the contact hole; etching the contact hole to remove
contaminant material disposed over the conductive layer at the
bottom of the contact hole; and filling the contact hole with a
conductive material to form a plug.
39. The method of claim 38 wherein the opening of the contact hole
at the surface of the dielectric layer has a width of about 2
microns or less.
40. The method of claim 39 wherein the aspect ratio of the contact
hole is about 3:1 or more.
41. The method of claim 38 wherein a dry etch is used to expose
protective material over the contaminant material.
42. The method of claim 41 wherein a wet etch is used to remove the
contaminant material at the bottom of the contact hole.
43. The method of claim 40 wherein a dry etch is used to expose
protective material over the contaminant material.
44. The method of claim 43 wherein a wet etch is used to remove the
contaminant material at the bottom of the contact hole.
45. The method of claim 38 further comprising depositing a metal
over the conductive layer prior to filling the contact hole with
the conductive material to form the plug.
46. The method of claim 42 further comprising depositing a metal
over the conductive layer prior to filling the contact hole with
the conductive material to form the plug.
47. The method of claim 46 further comprising forming a barrier
layer over the deposited metal.
48. The method of claim 46 wherein the metal comprises Ti.
49. The method of claim 47 wherein the barrier layer comprises
TiN.
50. The method of claim 45 wherein the metal comprises Ti.
51. The method of claim 45 wherein a barrier layer is formed over
the deposited metal.
52. The method of claim 20 wherein the conductive plug comprises
tungsten.
53. The method of claim 20 wherein the conductive plug material
comprises Al, Au, Cu, or Ag.
54. The method of claim 22 further comprising depositing a metal
over the conductive layer before depositing the material for the
conductive plug.
55. The method of claim 54 further comprising depositing a barrier
layer over the deposited metal before depositing the material for
the conductive plug.
56. The method of claim 54 wherein the deposited metal comprises
Ti.
57. The method of claim 55 wherein the barrier metal comprises
TiN.
58. The method of claim 57 wherein the conductive plug comprises
tungsten.
59. The method of claim 20 wherein the contact hole comprises a
via.
60. The method of claim 1 wherein the contact hole comprises a
container for a capacitor.
Description
RELATED APPLICATION
[0001] This invention is a continuation of and claims the benefit
of co-pending U.S. application Ser. No. 09/499,594 entitled METHOD
OF FABRICATING A SEMICONDUCTOR WORK OBJECT filed on Feb. 7, 2000,
the entire disclosure of which is hereby incorporated by reference
and set forth in its entirety for all purposes.
BACKGROUND OF THE INVENTION
[0002] The present invention relates to a method of forming
conductive structures on a semiconductor work object. More
particularly, it relates to cleaning etched contact holes before
metal plugs or other conductive structures are formed therein.
[0003] Every semiconductor chip has electrical connections between
different devices or circuit component parts on the chip. The
devices and components are associated with conductive structures to
provide such connections. The formation of contact plugs, vias,
metal lines and other conductive structures providing connectivity
on a chip will generally be referred to herein as
"metallization".
[0004] In conventional processes, a contact or contact hole (or
similar structure, such as a via) is etched in a layer of a
dielectric material that is disposed over a layer of conductive
material. Typically the dielectric material is a silicon oxide and
the conductive material is a silicon substrate with dopant. The
conductive material could also be another contact or via of
silicon, tungsten, or polysilicon, for example. The contact is
filled with a conductive material, typically a metal, to form a
plug. The plug formed in the contact hole may consist of tungsten,
aluminum, copper or other conductive material known in the art. An
initial layer of a refractory metal such as Titanium is often first
deposited on silicon at the bottom of the contact hole to form a
silicide. Silicides help facilitate the electrical connection
between the plug and silicon. A conductive barrier layer may also
be placed between the conductive layer and the plug to control
eutectic alloying, physical migration, or contamination. The
barrier layer may also help anchor the plug into the contact hole.
Titanium-tungsten (TiW) or titanium nitride (TiN) may be used to
form a barrier layer. At the surface of the dielectric layer, the
metal plug may be connected to thin lines of metal called leads,
metal lines, as well as other interconnects, which connect the
device associated with one conductive plug to another plug or other
structure associated with a different device.
[0005] Metallization techniques are well known in the art. Certain
such techniques are discussed in P. Van Zant, Microchip
Fabrication: A Practical Guide To Semiconductor Processing
(3.sup.rd ed. 1997) McGraw-Hill, New York, Chapters 5 & 13.
Before a contact hole is filled with a conductive material to form
a conductive plug, the hole is cleared of any contaminants
including oxides, other resistive materials, and residuals
(hereinafter such materials are referred to as "contaminant
materials") that may form or remain over the conductive region at
the bottom of the contact hole. After wet etching to remove the
contaminant material, further processing steps will form a plug of
conductive material in the etched hole. If any appreciable amount
of contaminants material remains at the bottom of the contact hole,
it could impede current flow through the contact components or
migrate into the underlying conductive layer. Therefore,
contaminants are highly problematic for at least these reasons.
[0006] Cleaning and etching agents are used to remove contaminants
before filling contact holes. Cleaning the contact hole is
important, for example, to facilitate the formation of acceptable
silicides at the bottom of the contact hole. Wet etchants are
preferred for removing the contaminant material.
[0007] With the drive toward smaller chips with higher device
densities, contact-hole widths are decreasing. Concurrently,
contact holes are getting longer as they are required to extend
through more layers on a die to reach the base silicon,
polysilicon, or other conductive media. Consequently, the
decreasing contact-hole widths and/or increasing contact-hole
lengths means contact holes with high aspect ratios are becoming
more prevalent. This is particularly true in the manufacture of
DRAM memory chips.
[0008] The formation of conductive structures in small, high aspect
ratio contact holes is especially problematic. Given the tight
geometry of such holes, it is difficult, for example, to control
conventional wet etchants so that they do not change the critical
dimensions (CDs) of the contact hole during the process of removing
oxides or other residual materials from the bottom of the contact
hole.
[0009] Wet etchants especially affect CDs of small, high-aspect
ratio contact holes. As etchant moves down the contact hole it
becomes depleted as it reacts with the oxide sidewalls of the
contact hole. Therefore, the etchant's rate of reaction with oxide
or other contaminant materials may be slower at the bottom of the
contact hole and faster at the top of the hole. Unfortunately,
because of the duration of time needed to the etch contaminant
materials at the bottom of the contact hole, structural material at
the top of the contact hole may be overetched during the process of
removing the contaminants. This excessive etching may increase the
width or diameter of the contact hole beyond specified critical
dimensions.
[0010] When a contact hole exceeding critical dimensions is filled
with conductive material to form a plug or other conductive
structure, an oversized plug is formed. The oversized plug may be
closer to adjacent or nearby conductive structures, creating a
problem of electrical shorting.
[0011] To remove contaminants from small, high aspect ratio
contacts, various conventional wet etchants may be used. Persons
skilled in the art may choose from many available etchant
technologies to remove the contaminants, including hydrofluoric
(HF) in deionized (DI) water; HF/TMAH; HCL; and phosphoric and
ammonia fluoride based solutions. Unfortunately, all of these
solutions may adversely affect critical dimensions, as described
above. Accordingly, prior art cleaning techniques are inherently
problematic in their failure to preserve critical contact hole
structures and dimensions.
SUMMARY OF THE INVENTION
[0012] The present invention overcomes the problems and
disadvantages in the prior art by providing a process that
preserves contact hole CDs while allowing removal of contaminant
contacts from the bottom of the contact hole (or other region
adjacent a conductive region). Accordingly, the present invention
improves production yields of dies having contact with small, high
aspect ratios. Further, the present invention helps make higher
density chips possible.
[0013] In one novel embodiment, the present invention provides a
method of preparing a contact hole to receive a conductive plug
comprising: providing a work object having a conductive layer
adjacent a dielectric layer, and a contact hole disposed in the
dielectric layer, the contact hole having surfaces that include
sidewalls formed in the dielectric layer and a bottom defined by
the conductive layer, the contact hole having an opening for
receiving a conductive plug material; and depositing a layer of
protective material on at least the surface around the opening of
the contact hole, the material deposited being sufficient to
protect the CDs of the contact hole opening during an etch of the
contact hole to remove any contaminant material disposed over the
conductive layer at the bottom of the contact hole.
[0014] In another novel embodiment, the present invention provides
a method of forming a conductive plug in a contact hole comprising:
providing a work object having a conductive layer adjacent a
dielectric layer, and a contact hole disposed in the dielectric
layer, the contact hole having surfaces that include sidewalls
formed in the dielectric layer and a bottom defined by the
conductive layer, the contact hole having an opening for receiving
a conductive plug material; depositing a layer of protective
material on at least the surface around the opening of the contact
hole, the material deposited being sufficient to protect the CDs of
the contact hole opening during etching of the contact hole to
remove any contaminant material disposed over the conductive layer
at the bottom of the contact hole; etching the protective material
at the bottom of the contact hole to expose the contaminant
material while retaining protective material around the opening of
the contact hole; and filling the contact hole with a conductive
material to form a plug.
[0015] In another novel embodiment, the present invention provides
a method of forming a conductive plug in a contact hole comprising:
providing a wafer having a conductive layer comprising silicon
adjacent a dielectric layer comprising silicon oxide, and a contact
hole disposed in the dielectric layer, the contact hole having
surfaces that include sidewalls formed in the dielectric layer and
a bottom defined by the conductive layer, a contaminant material
being disposed over at least a portion of the conductive layer
defining the bottom of the contact hole, the dielectric layer
having a surface in which the contact hole terminates in an opening
opposing the bottom; depositing a layer of a barrier material on
the work object, the layer having a substantially uniform thickness
from the surface at the opening of the contact hole to the bottom
of the contact hole; and depositing a layer of a protective
material barrier around at least the opening of the contact hole;
etching the material at the bottom of the contact hole to expose
the contaminant material while retaining protective material around
the opening of the contact hole; etching the contact hole to remove
contaminant material disposed over the conductive layer at the
bottom of the contact hole; and filling the contact hole with a
conductive material to form a plug.
[0016] The foregoing novel embodiments may include other
advantageous features, defining further novel embodiments. Some
such features are noted below and may be added to one or more of
the foregoing embodiments alone or in combinations. In this regard,
the embodiments of the present invention may further comprise the
step of depositing a layer of barrier material over the surfaces of
the contact hole before deposition of the protective material, and
etching the barrier layer at the bottom of the contact hole to
expose any contaminant material, while retaining protective
material around the opening of the contact hole following the etch
of the barrier layer. The embodiments of the present invention may
use a dry etch technique to etch the barrier layer at the bottom of
the contact hole and a wet etch technique to etch any contaminant
material exposed following the dry etch. The embodiments of the
present invention may have a barrier layer material comprising a
refractory metal based compound that extends from the surface at
the opening of the contact hole to the bottom of the contact hole.
The embodiments of the present invention may have a layer of
protective material that comprises a refractory metal based
compound extending from the opening of the contact hole to a
selected depth into the contact hole. The embodiments of the
present invention may have a conductive layer that comprises a
silicon based material and a dielectric layer that comprises a
silicon oxide based material.
[0017] The embodiments of the present invention may use a PVD
process to deposit the layer of protective material. The
embodiments of the present invention may use a CVD process to
deposit the layer of barrier material. The embodiments of the
present invention may use a protective material that is composed
substantially of TiN.
[0018] In the embodiments of the present invention, the contact
hole may have a high aspect ratio. Further, in the embodiments of
the present invention the opening of the contact hole at the
surface of the dielectric layer may have a width of about 2 microns
or less. The aspect ratio of the contact hole may be about 3:1 or
more.
[0019] The embodiments of the present invention may include the
step of depositing a layer of a metal on the conductive layer at
the bottom of the contact hole. The metal is deposited subsequent
to the wet etch to remove contaminants from the bottom of the
contact hole. In certain embodiments, the deposited metal is a
refractory metal. The refractory metal may be Ti. In the
embodiments of the present invention, it is further contemplated
that a barrier layer may be deposited over the metal deposited at
the bottom of the contact. The barrier layer may be TiN.
[0020] In the embodiments of the present invention, conductive plug
may be composed substantially of Ag, Al, Au, Cu, or W. Where
tungsten is the conductive plug material, a preferred barrier layer
material is TiN.
[0021] In the embodiments of the present invention, it is
contemplated that the contact hole may be a via or a container for
a capacitor.
[0022] The foregoing novel embodiments and features of the present
invention and other novel embodiments and features of the present
invention are described below in more detail. It should be
understood that the description contained herein is only
illustrative of the invention. Various alternatives and
modifications can be devised by those skilled in the art without
departing from the spirit of the invention. Accordingly, the
present invention is intended to embrace all such alternatives,
modifications and variances which fall within the scope of the
appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0023] FIG. 1 is a side sectional view of a portion of a device on
a wafer with a contact hole for the device etched into material on
the wafer.
[0024] FIG. 2 is the same view of the contact hole in FIG. 1, now
showing a contaminant material formed at the bottom of the contact
hole, with conductive filler material shown in phantom lines.
[0025] FIG. 3 is the same view of the contact hole in FIG. 2, now
showing a layer of material deposited over existing material,
according to the present invention.
[0026] FIG. 4 is the same view of the contact hole of FIG. 3, now
showing a second layer of protective material deposited over
portions of the material shown in FIG. 3, according to the present
invention.
[0027] FIG. 5A is the same view of the contact hole of FIG. 4, now
showing the contact hole after a selective etch to remove certain
material at the bottom of the contact hole, according to the
present invention.
[0028] FIG. 5B is the same view of the contact hole of FIG. 5A, now
showing the contact hole after a clean and/or etch to remove
certain material at the bottom of the contact hole, according to
the present invention.
[0029] FIG. 6 is the same view of the contact hole of FIG. 5, now
showing the contact hole after further processing and filling of
the hole with conductive material to form a plug and a metal line
connected thereto, according to the present invention.
[0030] FIG. 7 shows a schema for producing a contact hole and
conductive structures of FIG. 6, according to the present
invention.
DETAILED DESCRIPTION OF THE INVENTION
[0031] As used herein, "work object" means wafers (production,
dummy, or pmon), chip, die and packaged parts, incorporating, in
whole or part, silicon substrates, and other known or discovered
semiconductor materials, components, and assemblies, including, for
example, silicon-on-insulator (SOI), silicon-on-sapphire (SOS),
thin film transistor (TFT) materials, or germanium, periodic group
III-IV materials, II-VI materials, hetero-materials (II, III, V,
VI), and conductive glasses.
[0032] It will be apparent to persons of skill in the art that the
present invention is not necessarily limited to any particular kind
of work object. However, to illustrate the principles of the
present invention, the following discussion, unless otherwise
noted, will be in terms of a silicon-based wafer as the work
object.
[0033] FIGS. 1-5 show a contact hole 12 for a portion of a
semiconductor device 10 on a wafer. The contact hole 12 extends
through a layer 14 of a dielectric material. The dielectric layer
14 may be silicon dioxide, BPSG, silicon nitride, polyimide, or
other electrically insulative materials used in the art. The
contact hole 12 extends to an underlying layer or region of a
conductive substrate 16. Typical materials for conductive substrate
16 include doped layers or regions of silicon or polysilicon.
Generally, suitable dopants include boron, phosphorus, and arsenic.
In a common scenario, contact hole 12 is formed in a silicon
dioxide layer 14 disposed over a silicon substrate 16. It is to be
understood that contact hole 12 in device 10 would normally
represent one of a plurality of such structures being formed in
association with individual devices on individual dies on a
wafer.
[0034] The contact hole 12 is defined by sidewalls 18 and bottom
20. As illustrated in the figures and discussed below, the width or
diameter at the bottom 20 of the contact hole may be less than that
at the top of the contact hole. Contact holes may be broader at the
top to facilitate connections of the plug formed in the contact
hole with the metal lines on the surface of the wafer; a contact
hole may be narrower at the bottom where the plug connects to
conductive aspects of the device having relatively small landing
pads. This invention, however, may apply to other contact hole
configuration and is not limited to contact holes having a wider
top and narrower bottom. It could apply, for example, to a contact
hole having a wider bottom and narrower top.
[0035] For purposes of the present invention, "aspect ratio" means
the ratio of the depth D or length of the contact hole to the width
or diameter W.sub.t at the top of the contact hole. Generally, the
critical dimension (CD) of most interest is W.sub.t at the top
opening of contact hole 12. Accordingly, as used hereafter, the CD
is the allowable range or tolerance for W.sub.t.
[0036] A contact hole 12 with a D of about 2.0 microns and a
diameter or W.sub.t of about of 0.3 microns at the top opening in
the surface of dielectric layer 14 is one possible example of a
small contact hole having a high aspect ratio. Due to the tapered
nature of the contact hole, the width or diameter W.sub.b at the
bottom of the contact hole might be about 0.17 microns, for
example. A contact hole of such dimensions would have an aspect
ratio of about 6.67. A contact hole with a "small, high aspect
ratio" may be generally defined as a contact hole where D is about
2.0 microns or less and where W.sub.t is a number that when divided
into the D yields an aspect ratio of about 3:1 or greater.
[0037] Persons skilled in the art will understand that other
dimensions may define high aspect ratios, and that the aspect ratio
range given above is merely an exemplary. Such persons skilled in
the art will also appreciate that the principles of the present
invention may be employed regardless aspect ratios, depending on a
given set of circumstances, including, for example, the particular
compositions of the dielectric and semiconductor layers; the nature
of the etchants used; and the conditions under which processing
occurs. Accordingly, it is contemplated that this invention will be
generally useful to preserve contact hole CDs during etching to
remove contaminant material from contact holes and similar
holes.
[0038] FIG. 7 shows one possible novel scheme according to the
present invention that includes steps for forming a contact hole in
a device, preparing the contact hole for plug formation, and
metallizing the device.
[0039] Referring again to FIG. 2, before a plug is formed in
contact 12, any appreciable amounts of contaminant material 24
should be removed from the bottom 20 of contact hole 12. If there
is any appreciable amount of such contaminant material 24, it will
become interposed between conductive layer 16 and conductive
material 22. This may impede current flow to and from the device
10, preventing it from functioning properly. Contaminant material
24 may accrete at the bottom of a contact hole as a result of the
etching process 110 that forms the contact hole. The contaminant
material 24 may also be a native oxide that forms during or between
process steps.
[0040] The etch process 110 used to form contact hole 12 is
typically a dry etch process. However, other etch techniques that
produce the desired contact hole structure may also be used. Dry
etches are preferably used in forming contact holes because they
act anisotropically on a substrate. Accordingly, they produce the
relatively vertical sidewalls needed for contacts. Dry etch
techniques are useful for etching pattern sizes of three microns or
less. In contrast, conventional wet etch techniques (including
immersion, spray and vapor applications) are isotropic, producing
sloped sidewalls. They also are limited to pattern sizes of about
three microns.
[0041] One form of dry etch, known as a "plasma etch", generally
refers to an etch using reactive gases energized by a plasma field.
Dry etch processes are well known in the art. For example, they are
generally described in P. Van Zant, Microchip Fabrication: A
Practical Guide To Semiconductor Processing (3.sup.rd ed. 1997)
McGraw-Hill, New York, Chapter 9.
[0042] A stripping step 112 for stripping photoresist material from
the surface of the wafer is employed following step 110. Stripping
agents are well known in the art. A wet clean may optionally be
employed in step 113 for removing from the wafer residual material
from the dry etch or other matter. Suitable wet cleaning agents
include HF-deionized water based solutions with or without TMAH;
phosphoric acid (H.sub.3PO.sub.4,) and ammonium fluoride
(NH.sub.4F) based solutions, as well as other known etching and
cleaning solutions. One example of a suitable solution contains
about 40 wt. % NH.sub.4F, about 1.0-1.3 wt. % phosphoric acid
(H.sub.3PO.sub.4,), and deionized water as the remainder. This
optional, but routinely used, cleaning step removes contaminants
from the dry etch process. Also, optionally, the wafer may be
inspected in step 114 to determine whether critical dimensions have
been maintained through the dry etch and stripping/cleaning steps
112 and 113.
[0043] Following contact hole formation and any cleaning/stripping
or inspection steps, a layer of barrier material 26 is deposited on
at least those structures of the wafer whose CDs need to be
protected in subsequent step 124 aimed at removing any contaminant
material 20 from the contact hole 12. Barrier layer 26 generally
may be any material that adheres to the structures of the wafer
and, when subjected to etchants used to remove contaminant material
24 in step 124, will not be etched or will etch at a lower etch
rate than the contaminant material 24.
[0044] In one preferred embodiment for forming a barrier layer 26,
a wafer is subjected to a process 116 that forms a barrier layer 26
over the sidewalls 18 and bottom 20 of contact hole 12. A preferred
method for doing this is using conventional chemical vapor
deposition (CVD) techniques. CVD processes tend to deposit
materials in a uniform thickness on all exposed surfaces. The
functions of barrier layer 26 include (1) wetting conductive
material 22 to the sidewalls 18 and bottom 20 of contact hole 12;
(2) providing a barrier against migration; and (3) protecting the
underlying oxide (or other dielectric) structure from loss of CDs
during etching in subsequent step 124 to remove contaminant
material at the bottom of contact hole 12. Barrier layer 26 may be
any material that will adhere to dielectric layer 14 and to
conductive material 22 deposited into the contact hole 12.
Preferably, barrier layer 26 is deposited so as to provide about a
uniform thickness along the surfaces that are covered with the
deposited material.
[0045] Certain refractory metal based compounds are known to be
suitable as a barrier layer. Titanium nitride (TiN) is one example
of a suitable refractory metal based compound that is a suitable
material for barrier layer 26. It is particularly suitable for use
where conductive material 22 is composed of tungsten (W) and the
dielectric layer 14 is a silicon oxide. Tungsten does not adhere
well to bare oxide. Therefore, direct deposit of the tungsten onto
the oxide may produce voids in the deposited material. Tungsten
does adhere well to TiN. Therefore, the TiN barrier layer is used
to wet the W to the bare oxide, forming a plug 32. Barrier layer 26
also protects a silicon based conductive layer 16 from attack by
fluorine species that may be present in the process of
metallization using tungsten, for example.
[0046] In addition to TiN, other suitable materials contemplated as
barrier layer 26 include other metal nitrides, including TaN, CoN,
an TuN; and other materials that will bond well with dielectric
layer 14 and provide conductivity. (Conductivity is not important
if the barrier layer is not deposited on bottom 20 or is cleaned
off bottom 20 before metallization.)
[0047] For contact holes having a Wb of about 0.3 microns and a D
of about 0.17 microns, the contact hole being formed in silicon
oxide over silicon, a suitable thickness for a TiN barrier 26 is
believed to be about 150 angstroms of TiN deposited by CVD process.
CVD TiN is preferred because it conforms particularly well to
silicon and its oxides. This means that sidewalls 18 and bottom 20
of contact hole 12 have about the same thickness of material 26 as
that on the wafer surface 28. The process for deposition of CVD TiN
is well known in the art.
[0048] After deposition of barrier layer 26, an anneal step 118,
according to known or available techniques, may optionally be
performed. It is usually carried out under N.sub.2 gas or an inert
gas. The anneal step helps to drive out any moisture in barrier
layer 26 and to harden the barrier layer and other layered
materials to improve the integrity of the layers.
[0049] After TiN or other material is deposited on the wafer
surface 28 and in contact hole 12 to provide a barrier layer 26, a
protective layer 30 is provided. In step 120, the protective layer
30 is selectively deposited over at least the structures that need
to be protected during etching of contaminants 20 in subsequent
step 124. To protect the CDs of contact hole 12, step 120 deposits
a layer 30 of material at the top surface 28 of the wafer and
around the upper portions of contact hole 12, as indicated in FIG.
4. The protective layer 30 adds thickness and thereby more
resistance to etchant used in step 122. Instead of, or in addition
to, protecting underlying structure by being a thickened layer for
etchant to work through, the protective layer 30 could be a
material that protects by having a lower etch rate than contaminant
material 24 when subjected to the same etchant. By either approach,
the CDs of contact hole 12 are less vulnerable to change during
subsequent steps using etchants to remove contaminant material 24
at bottom 20.
[0050] Persons skilled in the art will understand that there may be
situations where the step of forming barrier layer 26 is
unnecessary. That is, the protective layer 30 may be directly
deposited over the structures to be protected without a barrier
layer 26 interposed between the protective layer 30 and the
dielectric layer 14. In such situations, the protective layer 30
may also serve one or more of the functions of barrier layer
26.
[0051] Relative to bottom 20, a formation of protective material 30
can be formed on the wafer surface 28 around the opening of contact
hole 12 by any known or available method. A preferred method by is
a physical vapor deposition (PVD) process. In contrast to chemical
vapor deposition, PVD conditions may be controlled to deposit more
material at top surfaces 28 and around the top opening of contact
hole 12 relative to the amounts deposited on sidewalls 18 and
bottom 20. FIG. 4 illustrates that little to no material has been
deposited onto sidewalls 18 and bottom 20 of contact hole 20.
[0052] Preferably, protective layer 30 may be selected from the
same materials used for barrier layer 26, examples of which are
listed above. TiN may be deposited by PVD over an initial barrier
layer 26 of TiN or other compatible barrier layer material. It
should be noted that this invention contemplates that barrier 26 or
protective layer 30 material may be formed in a single layering
step or multiple layering steps.
[0053] In one possible embodiment of the invention, a contact hole
for a DRAM chip has about a diameter of about 0.3 micron at the top
opening. It has a depth of about 2 microns. It has a bottom
diameter of about 0.17 diameters. The contact hole is etched in a
silicon dioxide dielectric layer 14 over a silicon-based conductive
layer 16. Suitable thickness of a CVD barrier layer of TiN is about
150 angstroms. PVD TiN is deposited to about 250 angstroms over the
CVD TiN at the top surface of the dielectric layer around the
opening of contact hole 12.
[0054] After protective layer 30 is in place to protect the CDs of
underlying structure, the wafer may now be etched in step 122. The
etch process should selectively etch the bottom of contact hole 12.
The purpose of the etch is to expose any contaminant material 24
from any underlying barrier layer 26 and/or protective layer 30.
The contaminant material 24 must be sufficiently exposed so that it
may be acted upon by etchants in subsequent etch step 124. Because
of their good surface selectivity, dry etch techniques are
preferably used in step 122--dry etch techniques are anisotropic,
acting on surfaces that are relatively perpendicular to the flow of
ions. Accordingly, a dry etch may selectively etch material at
bottom 20 with relatively little or no etching of the sidewalls 18
or barrier or protective layer over the sidewalls. The dry etch may
be based on various conventional reactants. Fluorine or chlorine
based reactants are preferred. Suitable fluorine reactants for
etching TiN include CF.sub.4, CHF.sub.3, or C.sub.4F.sub.8 in
combination with Argon or other gas used known for use in dry etch
methods. The dry etch is typically carried out under medium to high
vacuum.
[0055] During the dry etch, protective layer 30 protects CDs at the
top of the contact hole 12. A dry etch would generally not be used
to remove the exposed contaminants because the underlying
conductive layer is vulnerable to damage if over exposed to
reactants used in dry etch techniques.
[0056] In the embodiment illustrated in FIG. 5, a portion of layer
26 at bottom 20 is removed by the etch step 122. If any additional
layers are over contaminant material 24, they too are removed to
expose or to etch through contaminant material 24.
[0057] After any contaminant 24 is exposed in step 122, the wafer
may then be cleaned and/or etched in step 124 to remove any
contaminant 24. Known techniques may be used in this etch step.
Suitable cleaning techniques include HF-DI based solutions with or
without TMAH; phosphoric acid (H.sub.3PO.sub.4,) and ammonium
fluoride (NH.sub.4F) based solutions, as well as other known
etching and cleaning solutions. One example of a suitable solution
contains about 40 wt. % NH.sub.4F, about 1.0-1.3 wt. % phosphoric
acid (H.sub.3PO.sub.4,), and deionized water as the remainder.
Typically, these solutions are used at about room temperature to
about 60.degree. C.
[0058] Using typical wet cleaning or etching techniques, the amount
of time needed to etch bottom 20 clean is typically about sixty
seconds, but contact hole CDs are adversely affected after about
thirty seconds. By providing protective layer 26 and/or barrier
layer 30 over bottom 20, an etch using such wet etch techniques may
be as long as necessary to remove contaminant 24. The CDs of the
contact hole 12 are protected through clean or etch step 124
because protective layer 30 is deposited around the opening of
contact hole 12 (or at other desired locations). Following clean or
etch step 124, an inspection step may be optionally performed to
confirm CDs in the contact hole 12 have been maintained.
[0059] The device 10 now may be subject to metallization process
steps 125-127 to form conductive plugs, metal lines, and other
conductive structures in the wafer. In step 125, a suitable metal,
such as titanium, tungsten, or cobalt is deposited over the cleaned
conductive surface 16 at bottom 20 of contact hole 12. This forms a
silicide that acts as a more conductive contact layer to the
material for plug 32. In step 126, a barrier layer 29 may be
redeposited onto the bottom 20 of contact hole 20. For the same
reasons given above relative to barrier layer 26, a preferred
material for barrier layer 29 is TiN. The barrier may be interposed
between plug 32 and conductive substrate 16 to prevent the
formation of eutectic alloys. The barrier layers 26, 27 plugs 32,
metal lines 34, protective layers, and other conductive structures
may be consist of or be based on Al, Au, Cu, Mo, Pt, Ta, Ti, W, and
polysilicon (preferably doped with boron, phosphorous, or arsenic),
and silicides or polycides of the foregoing, and/or alloys of two
or more of the foregoing. The selection and application of suitable
materials for particular situations is well within the skill of
persons skilled in the art.
[0060] In small contact holes having high aspect ratios, refractory
metals such as Ti, W, Ta, Mo are preferred for use in forming plugs
and other conductive structures. Refractory metals reduce contact
resistance, which is influenced by the resistivity, length,
thickness, and total contact resistance of all metal wafer
interconnects. Generally, refractory metals may be deposited in
contact holes, vias, and similar structures using conventional CVD
techniques.
[0061] In step 127, conductive material 22 is deposited in one or
more steps to form plug 32 and metal line 34. Referring to FIG. 6,
a conductive material 22 may be deposited onto the surface of
dielectric layer 14 and into contact hole 18 to form conductive
plug 32 and metal line 34. The metallization to form the plugs and
metal lines may be carried out in a single step or in multiple
steps according to well known techniques in the art.
[0062] While the foregoing principles of the present invention are
described generally in terms of contact holes, they could be
readily applied to form other structures involving small, high
aspect ratio holes. For example, the principles could be used to
form vias. Vias are passages that are etched in a dielectric layer
and then filled with a conductive material. The conductive fill
provides connections between different levels of metal lines on a
chip. A via may be filled with metals such as tungsten, aluminum,
or copper, as well as other conductive material. Since vias can be
quite small, with high aspect ratios, the principles applicable to
cleaning contacts of contaminants can advantageously be used to
clean vias of such contaminants. The cleaning will help preserve
CDs in the vias. For another example, DRAM capacitor containers are
cut into an oxide down to silicon substrate or a polysilicon plug.
The holes for such container may also have contaminants after
formation. Therefore, the present invention may be used to clear
contaminants from the holes for the containers. Accordingly, as
used herein the terms "contact hole" and "plug" generally may refer
to different kinds of holes formed on a work object and the
conductive structures filling or lining such holes.
* * * * *