U.S. patent application number 10/845848 was filed with the patent office on 2004-10-21 for semiconductor component in a wafer assembly.
Invention is credited to Lutter, Stefan.
Application Number | 20040207063 10/845848 |
Document ID | / |
Family ID | 8177787 |
Filed Date | 2004-10-21 |
United States Patent
Application |
20040207063 |
Kind Code |
A1 |
Lutter, Stefan |
October 21, 2004 |
Semiconductor component in a wafer assembly
Abstract
Semiconductor components in a wafer assembly, in which the
components are connected to a frame by means of in each case one
holder and are formed from the same silicon wafer. The holder
connects the respective component to the frame on one side and has
a desired breaking point. The desired breaking point is designed as
a V-shaped groove, the surfaces of which form crystal planes.
According to the method, the patterning for production of the
holder takes place on the wafer back surface, with subsequent wet
chemical anisotropic etching of the V-groove. In this way, the
holder is produced independently of the processing of the wafer
front surface, and when the semiconductor component is removed a
defined broken edge is formed without there being any risk of the
semiconductor component being damaged.
Inventors: |
Lutter, Stefan; (Neuchatel,
CH) |
Correspondence
Address: |
BACHMAN & LAPOINTE, P.C.
900 CHAPEL STREET
SUITE 1201
NEW HAVEN
CT
06510
US
|
Family ID: |
8177787 |
Appl. No.: |
10/845848 |
Filed: |
May 14, 2004 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
10845848 |
May 14, 2004 |
|
|
|
10178636 |
Jun 21, 2002 |
|
|
|
6780767 |
|
|
|
|
Current U.S.
Class: |
257/678 |
Current CPC
Class: |
Y10T 29/49124 20150115;
B81C 1/00888 20130101; Y10T 29/49121 20150115 |
Class at
Publication: |
257/678 |
International
Class: |
B24B 005/00 |
Foreign Application Data
Date |
Code |
Application Number |
Jun 22, 2001 |
EP |
01 115 136.2 |
Claims
1. A wafer assembly comprises a frame, at least one semiconductor
component, holder means for connecting the at least one
semiconductor component to the frame wherein the holder means and
the semiconductor component are formed of the same material, the
holder means has one end connected to the frame and is provided
with a desired breaking point.
2. The wafer assembly as claimed in claim 1, wherein the holder
means has a large-area thickened portion connected to the frame and
the desired breaking point is formed by a groove between the frame
and the semiconductor component.
3. The wafer assembly as claimed in claim 2, wherein the groove is
of V-shaped design.
4. The wafer assembly as claimed in claim 3, wherein the groove has
surfaces which form crystal planes.
5-9. (canceled)
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] The instant application is a divisional of U.S. patent
application Ser. No. 10/178,636 filed on Jun. 21, 2002 which is
currently pending.
BACKGROUND OF THE INVENTION
[0002] Semiconductor components in a wafer assembly, in which the
components are connected to a frame by means of in each case one
holder and are formed from the same silicon wafer. The invention
also relates to a method for fabricating semiconductor components
in a wafer assembly of this type.
[0003] During fabrication of semiconductor components from a
silicon wafer ((100) silicon wafer), the individual components,
together with a frame and a holder which connects the component to
the frame, are produced from a single silicon wafer. The holder
comprises a bar which extends transversely across the component and
is fixed to the frame on both sides. These bars, the only purpose
of which is to fix the components to the frame, are fabricated by
photolithographic patterning of the wafer front surface with
subsequent dry or wet chemical etching processes for shaping. The
opening up of the components and of the frame, i.e. the separation
of the components from the frame, is effected by photolithographic
patterning of the wafer front surface and/or the wafer back surface
with subsequent dry or wet chemical etching processes for shaping.
The component itself is then broken out of the frame by applying
pressure to the component until the bar breaks. Alternatively, the
bar may also be broken by the application of a torsional load by
rotating the component out of the wafer plane.
[0004] In this method of fabricating the semiconductor component,
the bars are fabricated from the wafer front surface, so that all
the fabrication and machining processes carried out on the
semiconductor component have to be adapted to the fabrication
process used for the bars. Consequently, there is a considerable
interdependency between fabrication of the bars and processing of
the semiconductor component. There are generally no
crystallographically preferred breaking edges, since these require
additional process steps. Therefore, during the breaking-out
operation, there are no reproducible broken edges formed on the
bars, or the bars may splinter when the semiconductor component is
broken out, and these splinters may cause damage to the
semiconductor component. A further drawback is that the thickness
of the bars usually has to be defined by time-controlled etching
during the opening up of the semiconductor components.
[0005] The present invention is therefore based on the object of
proposing a possible way of eliminating the above-mentioned
drawbacks.
SUMMARY OF THE INVENTION
[0006] According to the invention, this object is achieved by the
semiconductor components in a wafer assembly in which the
components are connected to a frame by means of in each case one
holder and are formed from the same silicon wafer, wherein the
holder on one side connects the respective component to the frame
and has a desired breaking point and by a method for fabricating
semiconductor components having semiconductor components which are
connected to a frame by holder means and are formed from the same
silicon wafer, comprising the following steps: photolithographic
patterning of the wafer back surface with a holder on one side,
wherein the holder connects the semiconductor component to the
frame; producing a desired breaking point on the holder by means of
an etching operation between the frame and the semiconductor
component; and opening up the semiconductor component and the frame
by photolithographic patterning of the wafer front surface or back
surface with subsequent chemical etching for shaping.
[0007] Accordingly, the semiconductor components in a wafer
assembly have a holder which connects the respective component to
the frame on one side and has a desired breaking point. In
principle, this desired breaking point may be designed in various
ways in the form of a thinning of the material in the region of the
holder. The desired breaking point is advantageously formed by a
groove between the frame and the component, which is preferably of
V-shaped design. According to a preferred embodiment, the surfaces
of the V-groove form (111) crystal planes. According to the method,
a single-sided holder is produced, which holder in each case
connects the component to the frame, by photolithographic
patterning of the wafer back surface with subsequent etching of a
groove in a region in which the frame has a thickened portion. The
opening up of the component and of the frame is effected by
photolithographic patterning of the wafer front surface and/or back
surface with subsequent dry or wet chemical etching processes for
shaping. If the process sequence is selected in a suitable way, the
opening-up operation may take place at the same time as the
fabrication of the holder.
[0008] The production of the desired breaking point may in
principle be effected by means of a known etching operation, in
which, according to a preferred configuration of the method, the
V-groove is produced by wet chemical anisotropic etching.
[0009] The last of the three method steps mentioned above in
connection with the opening up corresponds to the measures which
are also employed in the prior art and is generally known. However,
the lithographic patterning of the single-sided holder takes place
on the wafer back surface. Therefore, the fabrication of the holder
is completely independent of the processing of the wafer front
surface. The cut edge of the converging crystallographic (111)
planes of the V-groove according to a preferred configuration
defines a desired breaking edge. The application of pressure to a
component leads to the component tilting and therefore to the
semiconductor component breaking out of the frame along the desired
breaking edge. The result is the formation of a defined broken
edge. Splintering of the silicon crystal is considerably reduced if
not completely prevented. The risk of the component being damaged
when it is being broken out is therefore likewise considerably
reduced.
[0010] When the two surfaces of the V-groove converge, the depth
etching stops on account of the crystallographic properties of the
silicon. Consequently, very simple, time independent control of the
thickness of the desired breaking point can be achieved during
production.
[0011] In principle, it is also conceivable for the holder
described above to be provided on a plurality of sides, for example
on both sides of the semiconductor component in accordance with the
prior art, but in this case the above-described advantages relating
to the breaking out of the semiconductor component no longer apply
in the manner which has been described above, and consequently the
semiconductor component may once again be damaged.
[0012] The method provides an inexpensive way, which entails
reduced scrap, of fabricating semiconductor components in a wafer
assembly.
BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The invention is explained in more detail below with
reference to an exemplary embodiment and in conjunction with the
accompanying drawings, in which:
[0014] FIG. 1 shows a plan view of a semiconductor component in
the. wafer assembly in accordance with the prior art;
[0015] FIG. 2 shows a plan view of a semiconductor component in the
wafer assembly in accordance with the invention, and
[0016] FIG. 3 shows an exemplary embodiment for fabrication of the
holder of a semiconductor component in the wafer assembly in
accordance with the invention, including the individual process
steps required for this purpose.
DETAILED DESCRIPTION
[0017] FIG. 1 shows part of a silicon wafer (not shown) having a
frame 1, in which the semiconductor component 2 is secured. The
semiconductor component 2 is connected to the frame by means of a
bar 3. It can be seen from the enlarged view that the bar 3
connects the frame 1 and the semiconductor component 2 with a
certain gap, i.e. semiconductor component 2 and frame 1 are spaced
apart from one another.
[0018] FIG. 2 shows an arrangement corresponding to that shown in
FIG. 1, but with the fabrication of the semiconductor component 2
in the frame 1 having taken place using the method according to the
invention. The semiconductor component 2 is connected on one side
by means of a holder 4. In this area, the holder 4 comprises a
thickened portion 5 of the frame 1, so that the thickened portion 5
directly adjoins the semiconductor component 2. As can be seen from
the enlarged illustration shown in FIG. 2, a V-groove 6, the
surfaces of which converge in the silicon in such a way that a
residual wall thickness d remains, is arranged between the
thickened portion 5 of the holder 4 and the semiconductor component
2. As has already been mentioned above, the depth etching is
stopped on account of the crystallographic properties of the
silicon and the fact that the surfaces form (111) crystal planes.
Consequently, the desired breaking point can be produced in a
defined way.
[0019] FIGS. 3A to 3E explain the individual process steps involved
in the fabrication of a holder for semiconductor components in the
wafer assembly in accordance with the invention. In this specific
exemplary embodiment, it is assumed that the processing of the
component from the front surface has already been completed. In
this case, the opening up of the component may take place together
with the fabrication of the holding device. This means that there
is no need for additional process steps in order to open up the
component.
[0020] FIG. 3A shows a (100) silicon wafer 11, on the front surface
of which (corresponding to the top side in the illustration) the
active surface of the component or sensor is to be located. This
silicon wafer 11 is covered by a masking layer 12 on both sides.
This masking layer may, for example, be a silicon oxide layer
produced by oxidation or a silicon nitride layer produced by vapor
deposition. In general, they must be layers which are suitable to
act as an etching mask for anisotropic silicon etching.
[0021] Then, as illustrated in FIG. 3B, a photosensitive resist 13
is applied to the back surface of the silicon wafer 11. The mask
for fabrication of the holder 4 is transferred to this resist 13 by
photolithographic patterning. Then, a resist 13 is also applied to
the wafer front surface 7, in order to protect the latter, but this
resist is not patterned. It is also possible to use a different
resist from the resist which was applied to the wafer back surface
8.
[0022] FIG. 3C shows the next step, in which the mask structure
which has been transferred to the photoresist 13 is transferred to
the masking layer 12 on the wafer back surface 8 by wet or dry
chemical etching techniques. If the masking layer consists of
silicon oxide or silicon nitride, this may be achieved by etching
in dilute hydrofluoric acid.
[0023] Then, the photoresist 13 is removed again from both sides of
the silicon wafer 11. This may, for example, take place in a
solvent, such as acetone. To completely remove residues of resist,
it is then possible for cleaning to take place in a heated mixture
of sulfuric acid and hydrogen peroxide. A subsequent anisotropic
silicon etching step, which may, for example, take place in dilute,
heated potassium hydroxide solution, causes a V-groove 6 to be
etched into the silicon wafer 11. The boundary surfaces of this
V-groove 6 form (111) crystal planes of the silicon. The depth
etching stops automatically when the two (111) crystal planes meet.
This is illustrated in FIG. 3D.
[0024] FIG. 3E shows a plan view of the back surface of the silicon
wafer 11 after the anisotropic silicon etching has ended. The shape
of the etching mask 12 which is required in order to fabricate a
holder 4 in accordance with the invention can also be seen from
this figure. The etch masking located on the wafer front surface 7
is not illustrated in this figure.
[0025] Finally, the etching masks 12 on the front and back surfaces
of the silicon wafer 11 are removed again. If these masking layers
consist of silicon oxide or silicon nitride, this can once again
take place by etching in dilute hydrofluoric acid. If a silicon
etching step of sufficient length is carried out, contact between
component 2 and frame 1 remains only in the region of the thickened
portion 5 of the frame 1 which has been produced. Otherwise, the
component 2 is completely separate from the frame 1 (cf. FIG.
2).
[0026] It is to be understood that the invention is not limited to
the illustrations described and shown herein, which are deemed to
be merely illustrative of the best modes of carrying out the
invention, and which are susceptible of modification of form, size,
arrangement of parts and details of operation. The invention rather
is intended to encompass all such modifications which are within
its spirit and scope as defined by the claims.
* * * * *