U.S. patent application number 10/604513 was filed with the patent office on 2004-09-16 for wafer holder for semiconductor manufacturing device and semiconductor manufacturing device in which it is installed.
This patent application is currently assigned to SUMITOMO ELECTRIC INDUSTRIES, LTD.. Invention is credited to Hashikura, Manabu, Nakata, Hirohiko, Natsuhara, Masuhiro.
Application Number | 20040178114 10/604513 |
Document ID | / |
Family ID | 32958621 |
Filed Date | 2004-09-16 |
United States Patent
Application |
20040178114 |
Kind Code |
A1 |
Natsuhara, Masuhiro ; et
al. |
September 16, 2004 |
WAFER HOLDER FOR SEMICONDUCTOR MANUFACTURING DEVICE AND
SEMICONDUCTOR MANUFACTURING DEVICE IN WHICH IT IS INSTALLED
Abstract
Wafer holder for semiconductor manufacturing and semiconductor
manufacturing device in which the holder is installed, the wafer
holder having a wafer-carrying surface whose wafer-retaining face
has an enhanced isothermal rating. In the wafer holder having a
wafer-carrying surface, multiple nubs having a flat portion are
formed on the wafer-carrying surface; and by making the surface
area of the flats on the nubs 70 mm.sup.2 or less per nub,
distribution in obverse-surface temperature of a wafer set in place
on the wafer holder can be brought within .+-.1.0%. If moreover the
per-nub flat surface area is 30 mm.sup.2 or less, the temperature
can be brought within .+-.0.5%. In addition, the total surface area
of the flats on the nubs preferably is 40% or less of the wafer
surface area, inasmuch as the incidence of trouble when de-chucking
the wafers can be kept under control.
Inventors: |
Natsuhara, Masuhiro;
(Itami-shi, JP) ; Nakata, Hirohiko; (Itami-shi,
JP) ; Hashikura, Manabu; (Itami-shi, JP) |
Correspondence
Address: |
JUDGE PATENT FIRM
RIVIERE SHUKUGAWA 3RD FL.
3-1 WAKAMATSU-CHO
NISHINOMIYA-SHI, HYOGO
662-0035
JP
|
Assignee: |
SUMITOMO ELECTRIC INDUSTRIES,
LTD.
5-33 Kitahama 4-chome Chuo-ku
Osaka-shi
JP
|
Family ID: |
32958621 |
Appl. No.: |
10/604513 |
Filed: |
July 28, 2003 |
Current U.S.
Class: |
206/725 ;
206/714 |
Current CPC
Class: |
H01L 21/6875
20130101 |
Class at
Publication: |
206/725 ;
206/714 |
International
Class: |
B65D 085/00 |
Foreign Application Data
Date |
Code |
Application Number |
Feb 12, 2003 |
JP |
JP-2003-033330 |
Claims
What is claimed is:
1. A wafer holder for semiconductor manufacturing device, the wafer
holder having a surface for carrying wafers and comprising multiple
nubs formed on the wafer-carrying surface, said nubs each having a
flat portion whose surface area is 70 mm.sup.2 or less per nub.
2. A wafer holder for semiconductor manufacturing device as set
forth in claim 1, the total surface area of the flat portions of
said multiple nubs is 40% or less of the surface area of wafers
that the wafer holder carries.
3. Semiconductor manufacturing device wherein the wafer holder set
forth in claim 1 is installed.
4. Semiconductor manufacturing device wherein the wafer holder set
forth in claim 2 is installed.
5. A wafer holder for semiconductor manufacturing device, the wafer
holder having a surface for carrying wafers and comprising multiple
nubs formed on the wafer-carrying surface and each having a flat
portion, the total surface area of the flat portions of said
multiple nubs being 40% or less of the surface area of wafers that
the wafer holder carries.
6. Semiconductor manufacturing device wherein the wafer holder set
forth in claim 5 is installed.
Description
BACKGROUND OF INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to wafer holders employed in
semiconductor manufacturing device such as plasma-assisted CVD,
low-pressure CVD, metal CVD, dielectric-film CVD, ion-implantation,
etching, Low-K film heat treatment, and degassing heat treatment
device, and furthermore to process chambers and semiconductor
manufacturing device in which the wafer holders are installed.
[0003] 2. Description of the Background Art
[0004] Conventionally, in semiconductor manufacturing procedures
various processes such as film deposition processes and etching
processes are carried out on semiconductor substrates that are the
processed objects. Ceramic susceptors that retain such
semiconductor substrates in order to heat them are used in the
processing equipment in which the processes on the semiconductor
substrates are carried out.
[0005] Japanese Pat. App. Pub. No. 2002-237375 for example
discloses conventional ceramic susceptors of this sort. The ceramic
susceptors disclosed in Pat. App. Pub. No. 2002-237375 are
structures in the surface or interior of which a resistive heating
element is formed, and in the edge portion of which pins for
fitting to a semiconductor wafer are formed, and in which to the
inside of the pins numerous bumps that come into contact with the
semiconductor wafer are formed.
[0006] The case with this invention is that the numerous bumps that
come into contact with a semiconductor wafer on the heating face of
the ceramic substrate enable the temperature to be raised rapidly
and the heating face to be given a uniform temperature. The
invention has it that constituting the tops of the foregoing bumps
in flat surfaces is desirable. Nevertheless, a problem with these
multitudes of bumps has been that if the flat portion of the bumps
singly is too large, the isothermal properties of a wafer carried
on the susceptor can be disrupted; and in some cases the wafer
cannot be de-chucked from the carrying surface.
[0007] Scaling-up of semiconductor substrates has been moving
forward in recent years, however. For example, with silicon (Si)
wafers, a transition from 8-inch to 12-inch is in progress.
Consequent on this diametric enlargement of the semiconductor
substrate, that the temperature distribution in the heating surface
(retaining surface) of semiconductor substrates on ceramic
susceptors be within .+-.1.0% has become a necessity; that it be
within .+-.0.5% has, moreover, become an expectation.
SUMMARY OF INVENTION
[0008] The present invention has been brought about to address the
foregoing issues. In particular, an object of the present invention
is to realize a wafer holder for semiconductor manufacturing
device, and semiconductor manufacturing device in which the holder
is installed, which enhances the isothermal properties of the
wafers carried and with which wafer removability is excellent.
[0009] The present invention was arrived at by discovering that
with the semiconductor-manufacturing-device wafer holder set forth
in the foregoing Japanese Pat. App. Pub. No. 2002-237375, if the
surface area of the flat portion of a single nub turns out to be
too large, a wafer set in place on the holder will prove difficult
to de-chuck, and more-over, the isothermal properties of the wafer
will be disrupted.
[0010] Namely, in a wafer holder having a wafer-carrying surface
according to the present invention, a number of nubs having a flat
portion are formed on the wafer-carrying surface, and the surface
area of the flats on the nubs is 70 mm.sup.2 or less per nub. In
addition, the total surface area of the flats on the multiple nubs
is 40% or less of the surface area of the wafers that the holder
carries; preferably the surface area of the flat on a nub is 30
mm.sup.2 or less, while the total surface area is preferably 10% or
less. What is more, semiconductor manufacturing device in which a
wafer holder such as just described is installed, temperature of
wafers that are the processed objects proves to be more uniform
than is conventional, which enables manufacturing semiconductors
with better throughput.
[0011] From the following detailed description in conjunction with
the accompanying drawings, the foregoing and other objects,
features, aspects and advantages of the present invention will
become readily apparent to those skilled in the art.
BRIEF DESCRIPTION OF DRAWINGS
[0012] FIG. 1 in a plan view schematically illustrates one example
of a wafer holder according to the present invention;
[0013] FIG. 2 is a schematic view of planar section A-A in FIG.
1;
[0014] FIG. 3 is a schematic view representing temperature
distribution in the present invention through a wafer section;
and
[0015] FIG. 4 is a schematic view representing temperature
distribution in comparative example through a wafer section.
DETAILED DESCRIPTION
[0016] The inventors discovered that in order to get the
temperature distribution of a wafer that a wafer holder 1 (FIG. 1)
carries to be within .+-.1.0%, multiple nubs 2 having a flat
portion should be formed on its wafer-carrying surface 4, and the
surface area of the flats on the nubs should be 70 mm.sup.2 or less
per nub.
[0017] The wafer holder heats a wafer by means of a resistive
heating element 5 formed either in the interior of the wafer
holder, or else on a surface other than its wafer-carrying surface,
wherein a predetermined process(es) is carried out on the wafer. At
that time, the heat of the wafer holder being heated is transferred
to the wafer via the nubs. If the surface area of the flat on the
nubs singly exceeds 70 mm.sup.2, however, when the heat generated
by the resistive heating element is transferred via the nubs, more
of a distribution in temperature in the wafer obverse surface would
be liable to arise. Uneven drop in the temperature of a carried
wafer means that for example wherein a film deposition process is
carried out on the wafer, the thickness and properties of the
formed film will fluctuate.
[0018] For these reasons, the slighter the distribution in
obverse-surface temperature of a carried wafer the better; and in
terms of temperature distribution in practice, isothermal ratings
of within .+-.1.0%, and more desirably, isothermal ratings of
within .+-.0.5%, are being sought. It was discovered that in order
to gain an isothermal rating along these lines, the per-nub surface
area of the flats should be made 70 mm2 or less.
[0019] The wafer holder is heated by passing current through the
resistive heating element. The heat therein generated by the
resistive heating element spreads into the wafer holder and is
transmitted to the wafer via the nubs. In terms of the temperature
distribution in a cross section of the wafer directly over the
nubs, the temperature in the lower portion of the wafer directly
above the nubs becomes maximal, while the temperature will diminish
in the upper portion and radial direction of the wafer. It was
discovered that if the surface area of the flat on the nubs is 70
mm.sup.2 or less, directly above a nub as illustrated schematically
in FIG. 3 a high-temperature zone 7 will be present, and
encompassing that region, a low-temperature zone 8 where the
temperature is lower than the high-temperature zone will be
present, and that inas-much as the high-temperature zone 7 and
low-temperature zone 8 do not reach to the wafer obverse surface,
the wafer obverse-surface temperature proves to be approximately
uniform.
[0020] It was meanwhile discovered that if the surface area of the
flat on the nubs exceeds 70 mm.sup.2, however, the high-temperature
zone 7 will reach the wafer obverse surface, as shown schematically
in FIG. 4, and the low-temperature zone 8 where the temperature is
lower than that will appear at the wafer obverse surface, which
will produce a distribution in the wafer obverse-surface
temperature.
[0021] Consequently, wafer obverse-surface temperature distribution
can be brought within .+-.1.0% if the surface area of the flat on
the nubs is 70 mm.sup.2 or less. Likewise, a surface area of the
flats on the nubs of 30 mm.sup.2 or less is more preferable, since
the wafer obverse-surface temperature distribution can then be
within .+-.0.5%.
[0022] It is also preferable that the total surface area of the
flats on the nubs is 40% or less of the wafer surface area. In
wafer holders whose wafer-retaining face is not fashioned with
nubs, since a wafer comes entirely into contact with the
wafer-retaining face the wafer is brought into a state in which it
is cohered to and is hard to de-chuck from the wafer-retaining
face. The total surface area of the flats on the nubs exceeding 40%
of the wafer surface area will, like the situation in which
wafer-retaining face is not fashioned with nubs, make the wafer
hard to de-chuck, inviting wafer breakage and also placing strain
on the wafers.
[0023] Making the total surface area of the flats on the nubs 40%
or less of the wafer surface area is accordingly preferable
inasmuch as it means that the wafers will be readily de-chucked and
that incidence of the problems just described will be slight. What
is more, making the total surface area of the flats 10% or less is
more preferable in that problems when the wafers are de-chucked
disappear completely.
[0024] Insofar as the substances for a wafer holder according to
the present invention are insulative ceramics, they are not
particularly restricted, but aluminum nitride (AlN) is preferable
for its high thermal conductivity and superior corrosion
resistance. In the following, a method according to the present
invention of manufacturing a wafer holder in a AlN instance will be
described in detail.
[0025] An AlN raw-material powder whose specific surface area is
2.0 to 5.0 m.sup.2/g is preferable. The sinterability of the
aluminum nitride declines if the specific surface area is less than
2.0 m.sup.2/g. Handling proves to be a problem if on the other hand
the specific surface area is over 5.0 m.sup.2/g, because the powder
coherence becomes extremely strong. Furthermore, the quantity of
oxygen contained in the raw-material powder is preferably 2 wt. %
or less. In sintered form, its thermal conductivity deteriorates if
the oxygen quantity is in excess of 2 wt. %. It is also preferable
that the amount of metal impurities contained in the raw-material
powder other than aluminum be 2000 ppm or less. The thermal
conductivity of the powder in sintered form deteriorates if the
amount of metal impurities exceeds this range. In particular, the
content respectively of Group IV elements such as Si, and elements
of the iron family, such as Fe, which have a serious worsening
effect on the thermal conductivity of the sinter, is advisably 500
ppm or less.
[0026] Because AlN is not a readily sinterable material, adding a
sintering promoter to the AlN raw-material powder is advisable. The
sintering promoter added preferably is a rare-earth element
compound. Since rare-earth element compounds react with aluminum
oxides or aluminum oxynitrides present on the surface of the
particles of the aluminum nitride powder, acting to promote
densification of the aluminum nitride and to eliminate oxygen being
a causative factor that worsens the thermal conductivity of an
aluminum nitride sinter, they enable the thermal conductivity of
aluminum sinters to be improved.
[0027] Yttrium compounds, whose oxygen-eliminating action is
particularly pronounced, are preferable rare-earth element
compounds. The amount added is preferably 0.01 to 5 wt. %. If less
than 0.01 wt. %, producing ultrafine sinters is problematic, along
with which the thermal conductivity of the sinters deteriorates.
Added amounts in excess of 5 wt. % on the other hand lead to
sintering promoter being present at the grain boundaries in an
aluminum nitride sinter, and consequently, if the aluminum nitride
sinter is employed under a corrosive atmosphere, the sintering
promoter present along the grain boundaries gets etched, becoming a
source of loosened grains and particles. More preferably the amount
of sintering promoter added is 1 wt. % or less. If less than 1 wt.
% sintering promoter will no longer be present even at the grain
boundary triple points, which improves the corrosion
resistance.
[0028] To characterize the rare-earth compounds further: oxides,
nitrides, fluorides, and stearic oxide compounds may be employed.
Among these oxides, being inexpensive and readily obtainable, are
preferable. By the same token, stearic oxide compounds are
especially suitable since they have a high affinity for organic
solvents, and if the aluminum nitride raw-material powder,
sintering promoter, etc. are to be mixed together in an organic
solvent, the fact that the sintering promoter is a stearic oxide
compound will heighten the miscibility.
[0029] Next, the aluminum nitride raw-material powder, sintering
promoter as a powder, a predetermined volume of solvent, a binder,
and further, a dispersing agent or a coalescing agent added as
needed, are mixed together. Possible mixing techniques include
ball-mill mixing and mixing by ultrasound. Mixing can thus produce
a raw material slurry.
[0030] The obtained slurry can be molded, and by sintering the
molded product, an aluminum nitride sinter can be produced.
Co-firing and post-metallization are two possible methods as a way
of doing this.
[0031] Post-metallization will be described first. Granules are
prepared from the slurry by means of a technique such as
spray-drying. The granules are inserted into a predetermined mold
and subject to press-molding. The pressing pressure therein
desirably is 0.1 t/cm.sup.2 or more. With pressure less than 0.1
t/cm.sup.2, in most cases sufficient strength in the molded mass
cannot be produced, making it liable to break in handling.
[0032] Although the density of the molded mass will differ
depending on the amount of binder contained and on the amount of
sintering promoter added, preferably it is 1.5 g/cm.sup.4 or more.
Densities less than 1.5 g/cm.sup.3 would mean a relatively large
distance between particles in the raw-material powder, which would
hinder the progress of the sintering. At the same time, the molded
mass density preferably is 2.5 g/cm.sup.3 or less. Densities of
more than 2.5 g/cm.sup.3 would make it difficult to eliminate
sufficiently the binder from within the molded mass in a degreasing
process of a subsequent step. It would consequently prove difficult
to produce an ultrafine sinter as described earlier.
[0033] Next, heating and degreasing processes are carried out on
the molded mass within a non-oxidizing atmosphere. Carrying out the
degreasing process under an oxidizing atmosphere such as air would
degrade the thermal conductivity of the sinter, because the AlN
powder would become superficially oxidized. Preferable
non-oxidizing ambient gases are nitrogen and argon. The heating
temperature in the degreasing process is preferably 500.degree. C.
or more and 1000.degree. C. or less. With temperatures of less than
500.degree. C., surplus carbon is left remaining within the
laminate following the degreasing process because the binder cannot
sufficiently be eliminated, which interferes with sintering in the
subsequent sintering step. On the other hand, at temperatures of
more than 1000.degree. C., the ability to eliminate oxygen from the
oxidized coating superficially present on the surface of the AlN
powder deteriorates, such that the amount of carbon left remaining
is too little, degrading the thermal conductivity of the
sinter.
[0034] The amount of carbon left remaining within the molded mass
after the degreasing process is preferably 1.0 wt. % or less. If
carbon in excess of 1.0 wt. % remains, it will interfere with the
sintering, which would mean that ultrafine sinters could not be
produced.
[0035] Next, sintering is carried out. The sintering is carried out
within a non-oxidizing nitrogen, argon, or like atmosphere, at a
temperature of 1700 to 2000.degree. C. Therein the moisture
contained in the ambient gas such as nitrogen that is employed is
preferably -30.degree. C. or less given in dew point. If it were to
contain more moisture than this, the thermal conductivity of the
sinter would likely be degraded, because the AlN would react with
the moisture within the ambient gas during sintering and form
nitrides. Another preferable condition is that the volume of oxygen
within the ambient gas be 0.001 vol. % or less. A larger volume of
oxygen would lead to a likelihood that the AlN would oxidize,
impairing the sinter thermal conductivity.
[0036] As another condition during sintering, the jig employed is
suitably a boron nitride (BN) molded part. Inasmuch as the jig as a
BN molded part will be sufficiently heat resistant against the
sintering temperatures, and superficially will have solid
lubricity, when the laminate contracts during sintering, friction
between the jig and the laminate will be lessened, which will
enable sinters to be produced with little distortion.
[0037] The obtained sinter is subjected to processing according to
requirements. In cases where a conductive paste is to be
screen-printed onto the sinter in a succeeding step, the surface
roughness is preferably 5 .mu.m or less in Ra. If over 5 .mu.m, in
screen printing to form circuits, defects such as blotting or
pinholes in the pattern are liable to arise. More suitable is a
surface roughness of 1 .quadrature.m or less in Ra.
[0038] In polishing to the abovementioned surface roughness,
although cases in which both sides of the sinter are screen printed
are a matter of course, even in cases where screen printing is
effected on one side only the polishing process is best carried out
on the face on the side opposite the screen-printing face. This is
because polishing only the screen-printing face would mean that
during screen printing, the sinter would be supported on the
unpolished face, and in that situation burrs and debris would be
present on the unpolished face, destabilizing the fixedness of the
sinter such that the circuit pattern by the screen printing might
not be drawn well.
[0039] Furthermore, at this point the thickness uniformity
(parallelism) between the processed faces is preferably 0.5 mm or
less. Thickness uniformity exceeding 0.5 mm can lead to large
fluctuations in the thickness of the conductive paste during screen
printing. Particularly suitable is a thickness uniformity of 0.1 mm
or less. Another preferable condition is that the planarity of the
screen-printing face be 0.5 mm or less. If the planarity exceeds
0.5 mm, in that case too there can be large fluctuations in the
thickness of the conductive paste during screen printing.
Particularly suitable is a planarity of 0.1 mm or less.
[0040] Screen printing is used to spread a conductive paste and
form the electrical circuits onto a sinter having undergone the
polishing process. The conductive paste can be obtained by mixing
together with a metal powder an oxidized powder, a binder, and a
solvent according to requirements. The metal powder is preferably
tungsten, molybdenum or tantalum, since their thermal expansion
coefficients match those of ceramics.
[0041] Adding the oxidized powder to the conductive paste is also
to enhance the strength with which it bonds to AlN. The oxidized
powder preferably is an oxide of Group ha or Group IIIa elements,
or is Al.sub.2O.sub.3 SiO.sub.2, or a like oxide. Yt-trium oxide is
especially preferable because it has very good wettability with
AlN. The amount of such oxides added is preferably 0.1 to 30 wt. %.
If the amount is less than 0.1 wt. %, the bonding strength between
AlN and the metal layer being the circuit that has been formed
deteriorates. On the other hand, amounts in excess of 30 wt. % make
the electrical resistance of the circuit metal layer high.
[0042] The thickness of the conductive paste is preferably 5
.quadrature.m or more and 100 .quadrature.m or less in terms of it
post-drying thickness. If the thickness were less than 5
.quadrature.m the electrical resistance would be too high and the
bonding strength decline. Likewise, if in excess of 100
.quadrature.m the bonding strength would deteriorate in that case
too.
[0043] Also preferable is that in the patterns for the circuits
that are formed, in the case of the heater circuit (resistive
heating element circuit), the pattern spacing be 0.1 mm or more.
With a spacing of less than 0.1 mm, shorting will occur when
current flows in the resistive heating element and, depending on
the applied voltage and the temperature, leakage current is
generated. Particularly in cases where the circuit is employed at
temperatures of 500.degree. C. or more, the pattern spacing
preferably should be 1 mm or more; more preferable still is that it
be 3 mm or more.
[0044] After the conductive paste is degreased, baking follows.
Degreasing is carried out within a non-oxidizing nitrogen, argon,
or like atmosphere. The degreasing temperature is preferably
500.degree. C. or more. At less than 500.degree. C., elimination of
the binder from the conductive paste is inadequate, leaving behind
carbon in the metal layer that during baking will form carbides
with the metal and consequently raise the electrical resistance of
the metal layer.
[0045] The baking is suitably done within a non-oxidizing nitrogen,
argon, or like atmosphere at a temperature of 1500.degree. C. or
more. At temperatures of less than 1500.degree. C., the post-baking
electrical resistance of the metal layer turns out too high because
the baking of the metal powder within the paste does not proceed to
the grain growth stage. A further baking parameter is that the
baking temperature should not surpass the firing temperature of the
ceramic produced. If the conductive paste is baked at a temperature
beyond the firing temperature of the ceramic, dispersive
volatilization of the sintering promoter incorporated within the
ceramic sets in, and moreover, grain growth in the metal powder
within the conductive paste is accelerated, impairing the bonding
strength between the ceramic and the metal layer.
[0046] In order to ensure that the metal layer is electrically
isolated, an insulative coating can be formed on the metal layer.
Preferably the insulative coating substance is the same substance
as the ceramic on which the metal layer is formed. Problems such as
post-sintering warpage arising from the difference in thermal
expansion coefficient will occur if the ceramic and insulative
coating substances differ significantly. For example, in a case
where the ceramic is AlN, a predetermined amount of an
oxide/carbide of a Group ha element or a Group IIIa element can be
added to and mixed together with AlN powder, a binder and a solvent
added and the mixture rendered into a paste, and the paste can be
screen-printed to spread it onto the metal layer.
[0047] In that case, the amount of sintering promoter added
preferably is 0.01 wt. % or more. With an amount less than 0.01 wt.
% the insulative coating does not densify, making it difficult to
secure electrical isolation of the metal layer. It is further
preferable that the amount of sintering promoter not exceed 20 wt.
%. Surpassing 30 wt. % leads to excess sintering promoter invading
the metal layer, which can end up altering the metal-layer
electrical resistance. Although not particularly limited, the
spreading thickness preferably is 5 .quadrature.m or more. This is
because securing electrical isolation proves to be problematic at
less than 5 .quadrature.m.
[0048] Further according to the present method, the ceramic as
substrates can be laminated according to requirements. Lamination
may be done via an adhesive agent. The adhesive agent--being a
compound of Group IIa or Group IIIa elements, and abinder and
solvent, added to an aluminum oxide powder or aluminum nitride
powder and made into a paste--is spread onto the bonding surface by
a technique such as screen printing. The thickness of the applied
adhesive agent is not particularly restricted, but preferably is 5
.quadrature.m or more. Bonding defects such as pinholes and bonding
irregularities are liable to arise in the adhesive layer with
thicknesses of less than 5 .quadrature.m.
[0049] The ceramic substrates onto which the adhesive agent has
been spread are degreased within a non-oxidizing atmosphere at a
temperature of 500.degree. C. or more. The ceramic substrates are
thereafter bonded to one another by stacking the ceramic substrates
together, applying a predetermined load to the stack, and heating
it within a non-oxidizing atmosphere. The load preferably is 0.05
kg/cm.sup.2 or more. With loads of less than 0.05 kg/cm.sup.2
sufficient adhesive strength will not be obtained, and otherwise
defects in the joint will likely occur.
[0050] Although the heating temperature for bonding is not
particularly restricted as long as it is a temperature at which the
ceramic substrates adequately bond to one another via the adhesive
layers, preferably it is 1500.degree. C. or more. At less than
1500.degree. C. adequate adhesive strength proves difficult to
gain, such that defects in the bond are liable to arise. Nitrogen
or argon is preferably employed for the non-oxidizing atmosphere
during the degreasing and boding just discussed.
[0051] A ceramic laminated sinter that serves as a wafer holder
thus can be produced as in the foregoing. As far as the electrical
circuits are concerned, it should be understood that if they are
heater circuits for example, then a molybdenum coil can be
utilized, and in the electrostatic-chuck electrode and RF electrode
cases, molybdenum or tungsten mesh can be, without employing
conductive paste.
[0052] In this case, the molybdenum coil or the mesh can be built
into the AlN raw-material powder, and the wafer holder can be
fabricated by hot pressing. While the temperature and atmosphere in
the hot press may be on par with the AlN sintering temperature and
atmosphere, the hot press desirably applies a pressure of 10
kg/cm.sup.2 or more. With pressure of less than 10 kg/cm.sup.2, the
wafer holder might not exhibit its capabilities, because gaps arise
between the AlN and the molybdenum coil or the mesh.
[0053] Co-firing will now be described. The earlier-described
raw-material slurry is molded into a sheet by doctor blading. The
sheet-molding parameters are not particularly limited, but the
post-drying thickness of the sheet advisably is 3 mm or less. The
sheet thickness surpassing 3 mm leads to large shrinkage in the
drying slurry, raising the probability that fissures will be
generated in the sheet.
[0054] A metal layer of predetermined form that serves as an
electrical circuit is formed onto the abovementioned sheet using a
technique such as screen printing to spread onto it a conductive
paste. The conductive paste utilized can be the same as that which
was descried under the post-metallization method. Nevertheless, not
adding an oxidized powder to the conductive paste does not hinder
the co-firing method.
[0055] Subsequently, sheets that have undergone circuit formation
are laminated with sheets that have not. Lamination is by setting
the sheets each into position to stack them together. Therein,
according to requirements, a solvent is spread on between sheets.
In the stacked state, the sheets are heated as may be necessary. In
cases where the stack is heated, the heating temperature is
preferably 150.degree. C. or less. Heating to temperatures in
excess of this greatly deforms the laminated sheets. Pressure is
then applied to the stacked-together sheets to unitize them. The
applied pressure is preferably within a range of from 1 to 100 MPa.
At pressures less than 1 MPa, the sheets are not adequately
unitized and can peel apart during subsequent processes. Likewise,
if pressure in excess of 100 MPa is applied, the extent to which
the sheets deform becomes too great.
[0056] This laminate undergoes a degreasing process as well as
sintering, in the same way was with the post-metallization method
described earlier. Parameters such as the temperature in degreasing
and sintering, and the amount of carbon are the same as with
post-metallization. In the previously described screen printing of
a conductive paste onto sheets, a wafer holder having a plurality
of electrical circuits can be readily fabricated by printing heater
circuits, electrostatic-chuck electrodes, etc. respectively onto a
plurality of sheets and laminating them. In this way a ceramic
laminated sinter that serves as a wafer holder can be produced.
[0057] The obtained ceramic laminated sinter is subject to
processing according to requirements. Routinely with semiconductor
manufacturing device, in the sintered state the ceramic laminated
sinter often cannot be gotten into the precision demanded. The
planarity of the wafer-carrying surface as an example of processing
precision is preferably 0.5 mm or less; moreover 0.1 mm or less is
particularly preferable. The planarity surpassing 0.5 mm is apt to
give rise to gaps between the wafer and the wafer holder, keeping
the heat of the wafer holder from being uniformly transmitted to
the wafer and making likely the generation of temperature
irregularities in the wafer.
[0058] A further preferable condition is that the surface roughness
of the wafer-carrying surface be 5 .quadrature.m in Ra. If the
roughness is over 5 .quadrature.m in Ra, grains loosened from the
AlN due to friction between the wafer holder and the wafer can grow
numerous. Particles loosened in that case become contaminants that
have a negative effect on processes, such as film deposition and
etching, on the wafer. Furthermore, then, a surface roughness of 1
.quadrature.m or less in Ra is ideal.
[0059] In addition, the nubs having a flat portion according to the
present invention can be fashioned utilizing a publicly known
processing technique such as machining or sand blasting. Under the
circumstances, inasmuch as the flat portion of the nubs is the
wafer-retaining face mentioned earlier, when fashioning the nubs,
care must be taken that the surface roughness of the flats and
their planarity as a whole be within the just-noted
surface-roughness and planarity ranges for the wafer-carrying
surface.
[0060] A wafer holder base part can thus be fabricated as in the
foregoing. Furthermore, a shaft is attached to the wafer holder.
Although the shaft substance is not particularly limited as long as
its thermal expansion coefficient is not appreciably different from
that of the wafer-holder ceramic, the difference in thermal
expansion coefficient between the shaft substance and the wafer
holder preferably is 5.times.10.sup.-6 K or less.
[0061] If the difference in thermal expansion coefficient exceeds
5.times.10.sup.-6 K, cracks can arise adjacent the joint between
the wafer holder and the shaft when it is being attached; but even
if cracks do not arise when the two are joined, splitting and
cracking can occur in the joint in that it is put through heating
cycling in the course of being repeatedly used. For cases in which
the wafer holder is AlN, for example, the shaft substance is
optimally AlN; but silicon nitride, silicon carbide, or mullite can
be used.
[0062] The shaft is mounted by joining it to the wafer holder via
an adhesive layer. The adhesive layer constituents preferably are
composed of AlN and Al.sub.2O.sub.3, as well as rare-earth oxides.
These constituents are preferable because of their favorable
wettability with ceramics such as the AlN that is the substance of
the wafer holder and the shaft, which makes the joint strength
relatively high, and readily produces a gastight joint surface.
[0063] Likewise, a ZnO-system glass ceramic can also be utilized as
an adhesive layer constituent. This option is preferable in that
the shaft can be joined at a relatively low temperature since the
crystallization temperature of glass is 700 to 800.degree. C.
Nevertheless, since ambient gases within the process chamber in the
semiconductor manufacturing device will in some cases invade the
glass constituent, depending on the semiconductor manufacturing
conditions there will be situations in which glass ceramics cannot
be employed.
[0064] The planarity of the respective joining faces of the shaft
and wafer holder to be joined preferably is 0.5 mm or less.
Planarity greater than this makes gaps liable to occur in the
joining faces, impeding the production of a joint having adequate
gastightness. A planarity of 0.1 mm or less is more suitable. Here,
still more suitable is a planarity of the wafer holder joining
faces of 0.02 mm or less. Likewise, the surface of the respective
joining faces preferably is 5 .quadrature.m or less in Ra. Surface
roughness exceeding this would then also mean that gaps are liable
to occur in the joining faces. A surface roughness of 1
.quadrature.m or less in Ra is still more suitable.
[0065] Subsequently, electrodes are attached to the wafer holder.
The attaching can be done according to publicly known techniques.
For example, the side of the wafer holder opposite its
wafer-retaining face, may be spot faced through to the electrical
circuits, and metallization carried out on the circuit, or without
metallizing, electrodes of molybdenum, tungsten, etc. may be
connected to it directly using an active metal brazing material.
The electrodes can thereafter be plated as needed to improve their
resistance to oxidation. In this way, a wafer holder for
semiconductor manufacturing device can be fabricated.
[0066] Moreover, semiconductor wafers can be processed on a wafer
holder according to the present invention, assembled into a
semiconductor manufacturing device. Inasmuch as the temperature of
the wafer-retaining face of a wafer holder by the present invention
is uniform, the temperature distribution in the wafer will be more
uniform than is conventional, to yield stabilized characteristics
in terms of deposited films, heating process, etc.
EMBODIMENTS
Embodiment 1
[0067] 99 parts by weight aluminum nitride powder and 1 part by
weight Y.sub.2O.sub.3 powder were mixed and blended with 10 parts
by weight polyvinyl butyral as a binder and 5 parts by weight
dibutyl phthalate as a solvent, and doctor-bladed into a green
sheet 430 mm in diameter and 1.0 mm in thickness. Here, an aluminum
nitride powder having a mean particle diameter of 0.6 .quadrature.m
and a specific surface area of 3.4 m.sup.2/g was utilized. In
addition, a tungsten paste was prepared utilizing 100 parts by
weight of a tungsten powder whose mean particle diameter was 2.0
.quadrature.m; and per that, 1 part by weight Y.sub.2O.sub.3 and 5
parts by weight ethyl cellulose, being a binder; and butyl
Carbitol.TM. as a solvent. A pot mill and a triple-roller mill were
used for mixing. This tungsten paste was formed into a heater
circuit pattern by screen-printing onto the green sheet.
[0068] Pluralities of separate green sheets of thickness 1.0 mm
were laminated onto the green sheet printed with the heater circuit
to create laminates. Lamination was carried out by stacking the
sheets in place in a mold, and thermopressing 2 minutes in a press
at a pressure of 10 MPa while maintaining 50.degree. C. heat. The
laminates were there-after degreased within a nitrogen atmosphere
at 600.degree. C., and sintered within a nitrogen atmosphere under
time and temperature conditions of 3 hours and 1800.degree. C.,
whereby wafer holders were produced. Here, after sintering a
polishing process was performed on the wafer-retaining face so that
it would be 1 .quadrature.m or less in Ra, and on the shaft-joining
face so that it would be 5 .quadrature.m or less in Ra. The wafer
holders were also processed to true their outer diameter. The
dimensions of the post-processing wafer holders were 340 mm outside
diameter and 20 mm thickness. Also, the distance separating the
wafer-carrying surface from the RF-generating electrode circuit was
1 mm.
[0069] Next, wafer holders on whose wafer-carrying surface nubs as
follows were fashioned by a drilling process were fabricated.
Namely: wafer holders fashioned with 532 nubs (arranged in a 15 mm
pitch), with the diameter of the flats on the nubs being 1, 2.54,
4, 6, 8 and 10 mm; and wafer holders fashioned with 127 nubs
(arranged in a 45 mm pitch), with the diameter of the flats on the
nubs being 1, 2.54, 4, 6, 8, 10, 12, 15 and 20 mm.
[0070] The heater circuits in the wafer holders were partially
exposed by spot-facing through the surface in two locations on the
side opposite the wafer-retaining face, up to the heater circuit.
Electrodes made of tungsten were connected directly to the exposed
portions of the heater circuits utilizing an active metal brazing
material. The wafer holders were heated by passing current through
the electrodes, and their isothermal ratings were measured.
Measurement of isothermal ratings was by setting a 12-inch wafer
temperature gauge on the wafer-retaining faces and measuring their
temperature distributions. It should be understood that the power
supply was adjusted so that the temperature in the midportion of
the wafer temperature gauge would be 550.degree. C. The isothermal
rating results are set forth in Table I and Table II.
[0071] In addition, tabulated and entered under "Lift test" in
Tables I and II are: as "Good," wafer holders with which breakage
and like problems in the wafers did not arise at all when the
wafers were lifted off the wafer holders by means of a
not-illustrated wafer lift pin; as "Fair," wafer holders with which
breakage arose in part of the wafer; and as "NG" (no good), the
wafer holder with which the wafer was broken. It should be
understood that in Tables I and II "Surface area" is the surface
area of the flat on the nubs singly, while "Relative surface area"
is the ratio of the total surface area of the flats on the nubs to
the surface area of the (12-inch diameter) wafers.
1TABLE I Relative Nub surface dia. Surface area Isothermal No. (mm)
area (mm.sup.2) Nub count (%) Lift test rating (%) 1 1 0.8 532 0.6
Good .+-.0.3 2 2.54 5.1 532 3.7 Good .+-.0.3 3 4 12.6 532 9.2 Good
.+-.0.4 4 6 28.3 532 20.6 Fair .+-.0.5 5 8 50.3 532 36.6 Fair
.+-.0.8 6 10 78.5 532 57.4 NG .+-.1.2
[0072]
2TABLE II Relative surface Nub dia. Surface area Lift Isothermal
No. (mm) area (mm.sup.2) Nub count (%) test rating (%) 7 1 0.8 127
0.1 Good .+-.0.3 8 2.54 5.1 127 0.9 Good .+-.0.3 9 4 12.6 127 2.2
Good .+-.0.4 10 6 28.3 127 4.9 Good .+-.0.5 11 8 50.3 127 8.7 Good
.+-.0.9 12 10 78.5 127 13.7 Fair .+-.1.1 13 12 113.1 127 19.7 Fair
.+-.1.2 14 15 176.7 127 30.8 Fair .+-.1.5 15 20 314.2 127 54.7 NG
.+-.1.6
[0073] As is evident from Tables I and II, by making the surface
area of the flat on the nubs singly 70 mm.sup.2 or less, the
temperature distribution in the wafer obverse surface can be
brought to within .+-.1%. What is more, by making the aforesaid
surface area 30 mm.sup.2 or less, the temperature distribution in
the wafer obverse surface can be brought to within .+-.0.5%.
Meanwhile, making the total surface area of the flats on the nubs
40% or less of the wafer surface area can make it so that problems
when de-chucking the wafers hardly occur; making it 10% or less can
make it so that problems when de-chucking the wafers do not occur
at all.
Embodiment 2
[0074] The wafer holders of Tables I and II were assembled into
semiconductor manufacturing device, wherein TiN films were formed
onto silicon wafers 12 inches in diameter. The results were that in
the cases in which wafer holders Nos. 6 and 15 were used,
fluctuations in the TiN film thickness were a large 15% or more,
and the wafers were damaged when the wafers were de-chucked; in the
cases in which wafer holders Nos. 12-14 were utilized, fluctuations
in the TiN film thickness were a large 15% or more, and when the
wafers were de-chucked there was some slight breakage in the
wafers; but in the cases in which wafer holders Nos. 1-5 and 7-11
were utilized, fluctuations in the TiN film thickness were a small
10% or less, excellent TiN films could be formed, and there were no
problems at all when de-chucking the wafers.
[0075] According to the present invention as given in the
foregoing, with nubs having a flat portion, making the surface area
of the flat on the nubs singly 70 mm.sup.2 or less enables the
realization of wafer holders and semiconductor manufacturing device
whose isothermal rating is outstanding. Likewise, making the total
surface area of the flats on the nubs 40% or less of the wafer
surface area enables the incidence of problems when de-chucking the
wafers to be kept under control.
[0076] Only selected embodiments have been chosen to illustrate the
present invention. To those skilled in the art, however, it will be
apparent from the foregoing disclosure that various changes and
modifications can be made herein without departing from the scope
of the invention as defined in the appended claims. Furthermore,
the foregoing description of the embodiments according to the
present invention is provided for illustration only, and not for
limiting the invention as defined by the appended claims and their
equivalents.
* * * * *