U.S. patent application number 10/174722 was filed with the patent office on 2003-12-25 for plasma ashing/etching using solid sapphire disk.
This patent application is currently assigned to Taiwan Semiconductor Manufacturing Co., Ltd.. Invention is credited to Jiang, Yue-Ying, Kuo, Wen-Chang, Lee, Kuo-Ching, Lin, Cheng-Ta, Lin, Yih-Ann.
Application Number | 20030234079 10/174722 |
Document ID | / |
Family ID | 29733663 |
Filed Date | 2003-12-25 |
United States Patent
Application |
20030234079 |
Kind Code |
A1 |
Jiang, Yue-Ying ; et
al. |
December 25, 2003 |
Plasma ashing/etching using solid sapphire disk
Abstract
Plasma ashing and/or etching using a solid sapphire disk is
disclosed. A plasma etcher/asher of one embodiment of the invention
includes at least a chamber body, upper and lower baffles, and a
solid sapphire disk. The chamber body defines an interior chamber
in which a semiconductor wafer is positionable for etching or
ashing. The baffles are positioned over the semiconductor wafer,
and distribute gas onto the semiconductor wafer. The solid sapphire
disk has no holes, and is positioned over one of the baffles to
affect distribution of the gas onto the semiconductor wafer. The
solid sapphire disk of the invention provides for more uniform
distribution of the gas onto the semiconductor wafer. As a result,
etching or ashing of the semiconductor wafers occurs more
uniformly, providing for more uniformly thick wafers.
Inventors: |
Jiang, Yue-Ying; (Nanton,
TW) ; Lee, Kuo-Ching; (Tainan, TW) ; Kuo,
Wen-Chang; (Hsin-Chu, TW) ; Lin, Yih-Ann;
(Taipei, TW) ; Lin, Cheng-Ta; (Kaohsiung,
TW) |
Correspondence
Address: |
TUNG & ASSOCIATES
Suite 120
838 W. Long Lake Road
Bloomfield Hills
MI
48302
US
|
Assignee: |
Taiwan Semiconductor Manufacturing
Co., Ltd.
|
Family ID: |
29733663 |
Appl. No.: |
10/174722 |
Filed: |
June 19, 2002 |
Current U.S.
Class: |
156/345.33 |
Current CPC
Class: |
H01J 37/32449 20130101;
H01J 2237/3342 20130101; H01J 37/3244 20130101 |
Class at
Publication: |
156/345.33 |
International
Class: |
C23F 001/00 |
Claims
We claim:
1. A plasma etcher/asher comprising: a chamber body defining an
interior chamber in which a semiconductor wafer is positionable; an
upper baffle and a lower baffle positioned over the semiconductor
wafer, the upper and the lower baffles distributing gas onto the
semiconductor wafer; and, a solid sapphire disk positioned over one
of the upper and the lower baffles to affect distribution of the
gas onto the semiconductor wafer.
2. The plasma etcher/asher of claim 1, further comprising a chamber
dome covering the chamber body, a process gas inlet port disposed
within the chamber dome.
3. The plasma etcher/asher of claim 1, further comprising a pump
port disposed within a bottom of the chamber body.
4. The plasma etcher/asher of claim 1, further comprising a chuck
on which the semiconductor wafer rests.
5. The plasma etcher/asher of claim 4, further comprising a cooling
jacket for the chuck.
6. The plasma etcher/asher of claim 1, wherein the solid sapphire
disk is positioned substantially on one of the upper and the lower
baffles.
7. The plasma etcher/asher of claim 1, wherein the solid sapphire
disk is positioned substantially on the upper baffle.
8. The plasma etcher/asher of claim 1, wherein the solid sapphire
disk affects the distribution of the gas onto the semiconductor
wafer such that the gas is substantially uniformly distributed onto
the semiconductor wafer, and etching/ashing of the semiconductor
wafer occurs substantially uniformly.
9. The plasma etcher/asher of claim 1, wherein the plasma
etcher/asher is a plasma etcher.
10. The plasma etcher/asher of claim 1, wherein the plasma
etcher/asher is a plasma asher.
11. A plasma etcher/asher comprising: a chamber body defining an
interior chamber; a chuck within the chamber body on which a
semiconductor wafer can rest; a chamber dome covering the chamber
body and defining a process gas inlet port; an upper baffle and a
lower baffle positioned over the semiconductor wafer, the upper and
the lower baffles distributing gas onto the semiconductor wafer;
and, a solid sapphire disk positioned over one of the upper and the
lower baffles to affect distribution of the gas onto the
semiconductor wafer.
12. The plasma etcher/asher of claim 11, further comprising a pump
port disposed within a bottom of the chamber body.
13. The plasma etcher/asher of claim 12, further comprising a
cooling jacket for the chuck.
14. The plasma etcher/asher of claim 11, wherein the solid sapphire
disk is positioned substantially on the upper baffle.
15. The plasma etcher/asher of claim 11, wherein the solid sapphire
disk affects the distribution of the gas onto the semiconductor
wafer such that the gas is substantially uniformly distributed onto
the semiconductor wafer, and etching/ashing of the semiconductor
wafer occurs substantially uniformly.
16. The plasma etcher/asher of claim 11, wherein the plasma
etcher/asher is only one of a plasma etcher and a plasma asher.
17. A plasma etcher/asher comprising: a chamber body defining an
interior chamber in which a semiconductor wafer is positioned; an
upper baffle and a lower baffle positioned over the semiconductor
wafer, the upper and the lower baffles distributing gas onto the
semiconductor wafer; and, a metallic disk without holes positioned
over one of the upper and the lower baffles to affect distribution
of the gas onto the semiconductor wafer.
18. The plasma etcher/asher of claim 17, wherein the metallic disk
without holes is a solid sapphire disk.
19. The plasma etcher/asher of claim 17, wherein the metallic disk
affects the distribution of the gas onto the semiconductor wafer
such that the gas is substantially uniformly distributed onto the
semiconductor wafer, and etching/ashing of the semiconductor wafer
occurs substantially uniformly.
20. The plasma etcher/asher of claim 17, wherein the plasma
etcher/asher is only one of a plasma etcher and a plasma asher.
Description
FIELD OF THE INVENTION
[0001] The invention relates generally to plasma ashing and etching
of photoresist and dry film resist from semiconductor wafers, and
more particularly to such plasma ashing and etching in which a
sapphire disk is utilized.
BACKGROUND OF THE INVENTION
[0002] Dry film resist (DFR) and photoresist are commonly used
types of resist for the photolithography and other processing of
semiconductor wafers into semiconductor devices fabricated from the
wafers. More generally, DFR and photoresist are types of resist. At
times during the processing of semiconductor wafers, the resist
must be removed from the wafers. This process can be accomplished
by ashing or etching, among other types of processes.
[0003] Ashing is the operation of removing the resist by oxidation,
in which a reaction between a chemical and the resist removes the
resist. Wet etching refers to the use of wet chemical processing to
remove the resist. The chemicals are placed on the surface of the
wafer, or the wafer itself is submerged in the chemicals. Dry
etching refers to the use of plasma stripping, using a gas such as
oxygen (O.sub.2), C.sub.2F.sub.6 and O.sub.2, or another gas.
Whereas wet etching is a low-temperature process, dry etching is
typically a high-temperature process. The removal of resist is also
known as resist stripping.
[0004] Ashing and dry etching may be able to be performed using the
same type of device, a plasma etcher or asher. Downstream plasma
reactors generate plasmas using microwave sources at low or high
pressures. Other types of sources, such as radio frequency (RF)
sources, may alternatively be used. Plasma ashers and etchers are
available from Matrix Integrated Systems, of Richmond, Calif.,
among other suppliers and manufacturers.
[0005] A difficulty with plasma ashing and etching is that the
processes may not be uniform. For instance, in ashers and etchers
from Matrix Integrated Systems, more resist may be removed towards
the center of the wafer than from the edges of the semiconductor
wafer. This can be problematic, because semiconductor foundries and
their customers have tight tolerances and expected specifications
of semiconductor wafer uniformity. If the thickness of the wafer
varies too much over the wafer, it may have to be relegated to
scrap, which can be costly.
[0006] Semiconductor wafer uniformity can be defined as the
thickness of the wafer at its thickest minus the thickness of the
wafer at its thinnest, divided by two times the average thickness
of the wafer. Desirably, the uniformity should be less than ten
percent, but in actuality may be as high as eleven to thirteen
percent, which is problematic. That is, in ashers and etchers such
as those from Matrix Integrated Systems, the uniformity may be as
high as eleven to thirteen percent, but some foundries and their
customers may desire a uniformity of no greater than ten
percent.
[0007] FIG. 1 shows a cross-sectional side view of a plasma asher
or etcher chamber 100 according to the prior art that exhibits
these problems. A semiconductor wafer 120 is positioned on a chuck
108 of the chamber 100. The chuck 108 has an associated cooling
jacket 106. The chamber 100 has a primary chamber body 104 covered
by a chamber dome 114, in which there is a process gas inlet port
116 to inlet the gas. A pump port 102 on the bottom end of the
chamber 100 pumps in the gas through the chamber 100. There are
upper and lower baffles 112 and 110, respectively, to evenly
distribute the gas on the semiconductor wafer 120. In particular,
the upper baffle 112 has a holed sapphire disk 118 inserted
therein. Sapphire is the mono-crystalline form of aluminum
oxide.
[0008] The gas flows onto the semiconductor wafer 120 as indicated
by the gas flow 122. In particular, the gas flows through the holed
sapphire disk 118 of the upper baffle 112, and then through the
lower baffle 110, before reaching the wafer 120. As indicated by
the gas flow 122, significantly more gas reaches the center of the
wafer 120 than the edges of the wafer 120. As a result, more resist
is removed from the center of the semiconductor wafer 120 than from
the edges of the semiconductor wafer 120, causing the problems that
have been described.
[0009] FIGS. 2, 3, and 4 show the sapphire disk 118, the upper
baffle 112, and the lower baffle 110, respectively, in more detail.
Thus, each of the sapphire disk 118, the upper baffle 112, and the
lower baffle 110 has a number of holes therein. Another problem
with the prior art is that the etching or ashing that occurs within
the chamber 100 of FIG. 1 also tends to etch the baffles 112 and
110, as well as the sapphire disk 118. More particularly, the holes
of the sapphire disk 118 and the baffles 112 and 110 are etched by
the plasma. This reduces their longevity, requiring more frequent
replacement.
[0010] Therefore, there is a need to overcome these disadvantages.
More specifically, there is a need for a plasma asher or etcher
that more uniformly removes resist from semiconductor wafers, so
that the thickness of such a wafer is more uniform. Furthermore,
there is a need for a plasma asher or etcher that does not reduce
the longevity of the sapphire disk, the upper baffle, and/or the
lower baffle. For these and other reasons, there is a need for the
present invention.
SUMMARY OF THE INVENTION
[0011] The invention relates to plasma ashing and/or etching using
a solid sapphire disk. A plasma etcher/asher of one embodiment of
the invention includes at least a chamber body, upper and lower
baffles, and a solid sapphire disk. The chamber body defines an
interior chamber in which a semiconductor wafer is positionable for
etching or ashing. The baffles are positioned over the
semiconductor wafer, and distribute gas onto the semiconductor
wafer. The solid sapphire disk has no holes, and is positioned over
one of the baffles to affect distribution of the gas onto the
semiconductor wafer.
[0012] Embodiments of the invention provide for advantages over the
prior art. The solid sapphire disk of the invention, unlike the
holed sapphire disk of the prior art, provides for more uniform
distribution of the gas onto the semiconductor wafer. As a result,
etching or ashing of the semiconductor wafers occurs more
uniformly, providing for a more uniform thickness of the wafers.
That is, the uniformity of the semiconductor wafers is more likely
to be at or under ten percent by using an embodiment of the
invention as compared to the prior art. In addition, etching of the
sapphire disk is reduced as a result of the elimination of its
holes, prolonging the longevity of the disk and reducing the need
for its replacement.
[0013] It has also been determined that etching and ashing occur at
a faster rate using the solid sapphire disk of the invention, as
compared to using the holed sapphire disk of the prior art. Still
other advantages, aspects, and embodiments of the invention will
become apparent by reading the detailed description that follows,
and by referring to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] FIG. 1 is a diagram of a cross-sectional side view of a
plasma asher/etcher chamber according to the prior art. The chamber
of FIG. 1 specifically utilizes a sapphire disk that has holes.
Etching and ashing performed in the chamber of FIG. 1 result in
non-uniformly thick semiconductor wafers, which can be
problematic.
[0015] FIG. 2 is a diagram of a perspective view of the sapphire
disk of FIG. 1 in more detail, according to the prior art. The disk
has a number of holes.
[0016] FIG. 3 is a diagram of a perspective view of an upper baffle
of the chamber of FIG. 1 in more detail, according to the prior
art. The upper baffle also has a number of holes.
[0017] FIG. 4 is a diagram of a perspective view of a lower baffle
of the chamber of FIG. 1 in more detail, according to the prior
art. The lower baffle, like the upper baffle and the holed sapphire
disk of the prior art, has a number of holes.
[0018] FIG. 5 is a diagram of a cross-sectional side view of a
plasma asher/etcher chamber according to an embodiment of the
invention. The chamber of FIG. 5 specifically utilizes a solid
sapphire disk without holes. Etching and ashing performed in the
chamber of FIG. 5 result in more uniformly thick semiconductor
wafers as compared to the prior art.
[0019] FIG. 6 is a diagram of a perspective view of the solid
sapphire disk of FIG. 5 in more detail, according to an embodiment
of the invention. Unlike the sapphire disk of the prior art, the
solid sapphire disk of FIG. 6 does not have any holes.
DETAILED DESCRIPTION OF THE INVENTION
[0020] In the following detailed description of exemplary
embodiments of the invention, reference is made to the accompanying
drawings that form a part hereof, and in which is shown by way of
illustration specific exemplary embodiments in which the invention
may be practiced. These embodiments are described in sufficient
detail to enable those skilled in the art to practice the
invention. Other embodiments may be utilized, and logical,
mechanical, and other changes may be made without departing from
the spirit or scope of the present invention. For instance, whereas
the invention is substantially described in relation to a solid
sapphire disk, other types of metallic disks may be able to used as
well. The following detailed description is, therefore, not to be
taken in a limiting sense, and the scope of the present invention
is defined only by the appended claims.
[0021] FIG. 5 shows a cross-sectional side view of a plasma asher
and/or etcher chamber 500 according to an embodiment of the
invention. The chamber 500 may in one embodiment specifically be
only an asher chamber, whereas in another embodiment specifically
be only an etcher chamber. The chamber body 504 defines an interior
cavity or chamber in which the semiconductor wafer 520 is
positioned or situated. The semiconductor wafer 520 specifically
rests on the chuck 508, which has a cooling jacket 506. A chamber
dome 514 covers the chamber 504 and its interior cavity, and also
has a process gas inlet port 516 disposed therein. The process gas
used is preferably oxygen, but may be another gas as well. A pump
port 502 is disposed within the bottom of the chamber body 504.
[0022] The upper baffle 512 and the lower baffle 510 are positioned
over the semiconductor wafer 520 and under the process gas inlet
port 516. A solid sapphire disk 518 is positioned over the baffles
512 and 510, and preferably is positioned substantially on the
upper baffle 512. Gas is received through the process gas inlet
port 516. The upper and lower baffles 510 and 512 distribute the
gas over the top surface of the semiconductor wafer 520. The solid
sapphire disk 518 specifically affects this distribution of the
gas, so that ashing or etching occurs more uniformly as compared to
using a holed sapphire disk as in the prior art.
[0023] The gas flow 522 specifically shows the pattern of the
distribution of the gas by the baffles 510 and 512 as affected by
the solid sapphire disk 518. It is noted that the gas flow 522 is
more directed towards the edges of the semiconductor wafer 520 as
compared to the gas flow of the prior art. As a result, ashing or
etching occurs more uniformity at the edges and the center of the
semiconductor wafer 520. As indicated, this preferably allows for a
uniformity no greater than ten percent, which is desirable and an
advantage of the invention.
[0024] Finally, FIG. 6 shows a perspective view of the solid
sapphire disk 518 of FIG. 5 in more detail. By comparison, the
upper and lower baffles 512 and 510 of FIG. 5 may be implemented as
has been described in relation to FIGS. 3 and 4. The solid sapphire
disk 518 is solid in that it has no holes. Furthermore, whereas in
the preferred embodiment the disk 518 is in fact sapphire, or
mono-crystalline aluminum oxide, it may be another metal as well.
For instance, such an alternative metal may be another type of
aluminum oxide, or another type of metal besides aluminum oxide, as
can be appreciated by those of ordinary skill within the art.
[0025] It is noted that, although specific embodiments have been
illustrated and described herein, it will be appreciated by those
of ordinary skill in the art that any arrangement is calculated to
achieve the same purpose may be substituted for the specific
embodiments shown. This application is intended to cover any
adaptations or variations of the present invention. Therefore, it
is manifestly intended that this invention be limited only by the
claims and equivalents thereof.
* * * * *