U.S. patent application number 10/147094 was filed with the patent office on 2003-11-20 for heat dissipating flip-chip ball grid array.
Invention is credited to Hortaleza, Edgardo R., Torres, Orlando F..
Application Number | 20030214049 10/147094 |
Document ID | / |
Family ID | 29418952 |
Filed Date | 2003-11-20 |
United States Patent
Application |
20030214049 |
Kind Code |
A1 |
Hortaleza, Edgardo R. ; et
al. |
November 20, 2003 |
HEAT DISSIPATING FLIP-CHIP BALL GRID ARRAY
Abstract
The present invention discloses a heat dissipating flip-chip
Ball Grid Array (BGA) (10). In one embodiment, the flip-chip BGA
comprises a substrate (12), a die (14), a first set of solder balls
(16) adapted to couple the die with the substrate, a thermal
compound (20) adapted to couple to a backside of the die, a second
set of solder balls (28) adapted to couple with the substrate, and
a printed circuit board (22) comprising a heat dissipating metal
(24), wherein the heat dissipating metal is adapted to couple with
the thermal compound, and wherein the second set of solder balls is
adapted to couple with the printed circuit board.
Inventors: |
Hortaleza, Edgardo R.;
(Garland, TX) ; Torres, Orlando F.; (Richardson,
TX) |
Correspondence
Address: |
Mike Skrehot
Texas Instruments Incorporated
M/S 3999
P. O. Box 655474
Dallas
TX
75265
US
|
Family ID: |
29418952 |
Appl. No.: |
10/147094 |
Filed: |
May 16, 2002 |
Current U.S.
Class: |
257/778 ;
257/668; 257/700; 257/701; 257/737; 257/738; 257/774; 257/E23.069;
257/E23.105; 438/107; 438/108 |
Current CPC
Class: |
H01L 2924/1532 20130101;
H01L 2924/01046 20130101; H01L 2924/15321 20130101; H01L 23/49816
20130101; H01L 2924/01079 20130101; H01L 23/3128 20130101; H01L
23/3677 20130101; H01L 2224/16225 20130101; H01L 2224/73253
20130101 |
Class at
Publication: |
257/778 ;
257/668; 257/738; 257/737; 257/700; 257/701; 257/774; 438/108;
438/107 |
International
Class: |
H01L 023/495; H01L
023/053; H01L 023/12; H01L 023/48; H01L 023/52; H01L 021/44; H01L
021/48; H01L 021/50; H01L 029/40 |
Claims
What we claim is:
1. A flip-chip ball grid array, comprising: a substrate; a die; a
first set of solder balls adapted to couple the die and the
substrate; a thermal compound adapted to couple with a backside of
the die; a second set of solder balls adapted to couple with the
substrate; and a printed circuit board comprising a heat
dissipating metal, wherein the heat dissipating metal is adapted to
couple with the thermal compound, and wherein the second set of
solder balls is adapted to couple with the printed circuit
board.
2. The flip-chip ball grid array of claim 1, wherein the heat
dissipating metal further comprises thermal vias.
3. The flip-chip ball grid array of claim 1, wherein the printed
circuit board further comprises thermal vias.
4. The flip-chip ball grid array of claim 3, wherein the printed
circuit board thermal vias are adapted to couple with the second
set of solder balls.
5. The flip-chip ball grid array of claim 1, wherein the heat
dissipating metal is located on select areas of the printed circuit
board that are adapted to couple with the thermal compound.
6. The flip-chip ball grid array of claim 1, wherein the he at
dissipating metal is located on an entire area of the printed
circuit board that is adapted to couple with the thermal
compound.
7. The flip-chip ball grid array of claim 1, wherein the first set
of solder balls and the second set of solder balls are adapted to
be coupled with the substrate via solder pads.
8. The flip-chip ball grid array of claim 1, wherein the second set
of solder balls are adapted to be coupled with the printed circuit
board via BGA pads.
9. The flip-chip ball grid array of claim 1, wherein the second set
of solder balls are adapted to be coupled with the printed circuit
board via solder pads.
10. The flip-chip ball grid array of claim 1, wherein the first set
of solder balls are solder bumps.
11. The flip-chip ball grid array of claim 1, wherein the first set
of solder balls are ball bumps.
12. The flip-chip ball grid array of claim 1, wherein the thermal
compound is silicon grease.
13. The flip-chip ball grid array of claim 1, wherein the heat
dissipating metal is a copper pad.
14. The flip-chip ball grid array of claim 1, further comprising
underfill adapted to be placed between the die and the
substrate.
15. A flip-chip ball grid array, comprising: a substrate; a die
comprising a plated backside; a plurality of solder bumps adapted
to couple the die and the substrate; a heat dissipating metal
adapted to couple with the plated backside of the die; a plurality
of solder balls adapted to couple with the substrate; and a
multi-layer printed circuit board adapted to couple with the heat
dissipating metal and with the plurality of solder balls.
16. The flip-chip ball grid array of claim 15 wherein at least one
of the printed circuit board layers comprise copper foils.
17. The flip-chip ball grid array of claim 16 further comprising
thermal vias adapted to couple the copper foils with the plurality
of solder balls.
18. The flip-chip ball grid array of claim 16 further comprising
thermal vias adapted to couple the copper foils with the heat
dissipating metal.
19. The flip-chip ball grid array of claim 15 wherein the plated
portion of the die comprises gold.
20. The flip-chip ball grid array of claim 15 wherein the plated
portion of the die comprises copper.
21. The flip-chip ball grid array of claim 15 wherein the plated
portion of the die comprises nickel.
22. The flip-chip ball grid array of claim 15 wherein the plated
portion of the die comprises palladium.
23. The flip-chip ball grid array of claim 15 wherein the plated
portion of the die comprises a solderable material.
24. A flip-chip ball grid array, comprising: a substrate; a die; a
first set of solder balls adapted to couple the die and the
substrate; a thermal compound adapted to couple with a backside of
the die; a second set of solder balls adapted to couple with the
substrate; and a multi-layer printed circuit board comprising: a
heat dissipating metal, comprising thermal vias, adapted to couple
with the thermal compound; and thermal vias adapted to couple with
the second set of solder balls.
25. The flip-chip ball grid array of claim 24 wherein the heat
dissipating metal thermal vias and the multi-layer printed circuit
board thermal vias originate at a plurality of the printed circuit
board layers.
26. The flip-chip ball grid array of claim 25 wherein the heat
dissipating metal thermal vias and the multi-layer printed circuit
board thermal vias are adapted to dissipate heat through the
printed circuit board.
27. The flip-chip ball grid array of claim 26 structured such that
the heat is dissipated through the heat dissipating metal.
28. The flip-chip ball grid array of claim 26 structured such that
the heat is dissipated through the thermal compound.
29. The flip-chip ball grid array of claim 26 structured such that
the heat is dissipated through the die.
30. The flip-chip ball grid array of claim 26 structured such that
the heat is dissipated through the first set of solder balls.
31. The flip-chip ball grid array of claim 24 structured such that
the heat is dissipated through the second set of solder balls.
32. A method for producing a flip-chip ball grid array, comprising:
coupling a die and a first set of solder balls; coupling a
substrate and the first set of solder balls; coupling a thermal
compound and a backside of the die; coupling a second set of solder
balls and the substrate; coupling a heat dissipating metal on a
printed circuit board and the thermal compound; and coupling the
second set of solder balls and the printed circuit board.
33. A method for producing a flip-chip ball grid array, comprising:
coupling a die and a plurality of solder bumps; coupling a
substrate and the plurality of solder bumps; coupling a plated
backside of the die and a heat dissipating metal; coupling a
plurality of solder balls and the substrate; coupling a multi-layer
printed circuit board and the heat dissipating metal; and coupling
the multi-layer printed circuit board and the plurality of solder
balls.
34. A method for producing a flip-chip ball grid array, comprising:
coupling a die and a first set of solder balls; coupling a
substrate and the first set of solder balls; coupling a thermal
compound and a backside of the die; coupling a second set of solder
balls and the substrate; coupling a multi-layer printed circuit
board heat dissipating metal and the thermal compound; and coupling
thermal vias, of the multi-layer printed circuit board, and the
second set of solder balls.
Description
FIELD OF THE INVENTION
[0001] The present invention relates to flip-chip ball grid arrays
and, more particularly, to a heat dissipating flip-chip ball grid
array.
BACKGROUND OF THE INVENTION
[0002] Flip chip assembly involves the direct electrical connection
of face-down electronic components onto substrates or circuit
boards by means of conductive bumps on the chip bond pads. By
contrast, wire bonding uses face-up chips with a wire connection to
each pad. There are three primary stages in making flip chip
assemblies: bumping the die or wafer, 1% attaching the bumped die
to the board or substrate, and, in most cases, filling the
remaining space under the die with an electrically non-conductive
material. The bump serves several functions in the flip chip
assembly. Electrically, the bump provides the conductive path from
chip to substrate. The bump also provides a thermally conductive
path to carry heat from the chip to the substrate. In addition, the
bump provides part of the mechanical mounting of the die to the
substrate. Finally, the bump provides a space, preventing
electrical contact between the chip and substrate. In the final
stage of assembly, this space is usually filled with a
non-conductive "underfill" adhesive joining the entire surface of
the chip to the substrate. The underfill protects the bumps from
moisture or other environmental hazards, provides additional
mechanical strength to the assembly, and compensates for any
thermal expansion difference between the chip and the substrate.
Underfill mechanically "locks together" chip and substrate so that
differences in thermal expansion do not break or damage the
electrical connection of the bumps.
[0003] A Ball Grid Array (BGA) package is primarily composed of
three basic parts: the bare chip, a BGA substrate, and an
interconnection matrix. The flip-chip is connected to the BGA
substrate face-down, while the interconnection matrix connects the
bare chip to the BGA substrate using direct attach flip-chip style
connections. The BGA substrate, which includes very small traces
and vias, conveys signals to the underlying printed circuit board
through the solder-bump attachment pads on its bottom surface. A
metal cover or plastic encapsulation is then used to seal the
package.
[0004] One of the problems facing flip-chip devices is the heat
that is formed during use of the devices and as a result of power
consumption. If the flip-chip device is heated above a certain
threshold, the speed, performance, and lifetime of the device may
be adversely affected. To aid in the removal of such heat, some
packages incorporate a heat spreader which ensures safe operation
of the device by efficiently diffusing the released heat and
preventing over heating of the chip.
[0005] Utilizing a heat spreader, however, has various limitations.
For example, an interface layer is added between the die and the
heat spreader and a second interface is placed between the heat
spreader and the heat sink. With the small package and die sizes
involved, these interface layers are not very efficient, thus
limiting the amount of heat that can be removed efficiently from
the back of a package or chip. Other limitations include the
limited area of dissipation and the cost associated with a heat
spreader. As such, a larger area of dissipation at a lower cost
would be very advantageous.
[0006] It is therefore desirable for the present invention to
overcome the limitations described above that are involved in
dissipating heat from flip-chip packages.
SUMMARY OF THE INVENTION
[0007] The present invention achieves technical advantages as a
heat dissipating flip-chip Ball Grid Array (BGA) including
additional structure that dissipates heat from the flip-chip to a
supporting structure, such as a printed circuit board.
[0008] In one embodiment, a flip-chip ball grid array comprises a
substrate, a die, a first set of solder balls adapted to couple the
die with the substrate, a thermal compound adapted to couple to a
backside of the die, a second set of solder balls adapted to couple
with the substrate, and a printed circuit board comprising a heat
dissipating metal, wherein the heat dissipating metal is adapted to
couple with the thermal compound, and wherein the second set of
solder balls is adapted to couple with the printed circuit
board.
[0009] In another embodiment, a flip-chip ball grid array comprises
a substrate, a die comprising a plated backside, a plurality of
solder bumps adapted to couple the die to the substrate, a heat
dissipating metal adapted to couple to the plated backside of the
die, a plurality of solder balls adapted to couple to the
substrate, and a multi-layer printed circuit board adapted to
couple to the heat dissipating metal and to the plurality of solder
balls.
[0010] In a further embodiment, a flip-chip ball grid array
comprises a substrate, a die, a first set of solder balls adapted
to couple the die to the substrate, a thermal compound adapted to
couple to a backside of the die, a second set of solder balls
adapted to couple to the substrate, and a multi-layer printed
circuit board comprising: a heat dissipating metal, comprising
thermal vias, adapted to couple to the thermal compound, and
thermal vias adapted to couple to the second set of solder
balls.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] FIG. 1 illustrates a heat dissipating flip-chip Ball Grid
Array in accordance with an exemplary embodiment of the present
invention;
[0012] FIG. 2 illustrates a flow chart for producing a flip-chip
Ball Grid Array in accordance with an exemplary embodiment of the
present invention;
[0013] FIG. 3 illustrates another flow chart for producing a
flip-chip Ball Grid Array in accordance with an exemplary
embodiment of the present invention; and
[0014] FIG. 4 illustrates a further flow chart for producing a
flip-chip Ball Grid Array in accordance with an exemplary
embodiment of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
[0015] Referring now to FIG. 1, a flip-chip Ball Grid Array (BGA)
10 is presented which includes a substrate 12, a die 14, solder
bumps (or a first set of solder balls) 16, solder pads (bump pads
and/or BGA pads) 18, a thermal compound 20, a printed circuit board
22, a heat dissipating metal 24, vias 26, solder balls (or a second
set of solder balls) 28, and BGA pads 30.
[0016] In one embodiment, the first set of solder balls 16 (or ball
bumps) are adapted to couple the die 14 and the substrate 12, while
the second set of solder balls 28 are adapted to couple with the
printed circuit board 22 to the substrate 12. The first set of
solder balls 16 and the second set of solder balls 28 are adapted
to be coupled with the substrate 12 via the solder pads 18. The
second set of solder balls 28 are adapted to be coupled with the
printed circuit board 22 via solder pads and/or BGA pads 30. The
thermal compound 20 (such as, for example, silicon grease) is
adapted to couple with a backside of the die 14 and with the heat
dissipating metal 24 (such as, for example, a copper pad) of the
printed circuit board 22. The printed circuit board 22 and/or the
heat dissipating metal 24 further comprise thermal vias. The
thermal vias (not shown) of the printed circuit board 22 and the
thermal vias 26 of the heat dissipating metal 24 are utilized to
allow heat to dissipate from the die 14 through the printed circuit
board. The printed circuit board thermal vias are adapted to couple
to the second set of solder balls 28. As such, heat may dissipate
from the flip-chip BGA 10, through the thermal vias, the second set
of solder balls 28, and the heat dissipating metal 24. The heat
dissipating metal 24 may be located on a select area(s) of the
printed circuit board 22 or on an entire area of the printed
circuit board that is adapted to couple to the thermal compound 20.
Underfill (not shown) is adapted to be placed between the die 14
and the substrate 12.
[0017] In another embodiment, the flip-chip ball grid array 10
comprises a substrate 12, a die 14 comprising a plated backside
(not shown), and a plurality of solder bumps 16 adapted to couple
the die 14 and the substrate 12. The plated portion, coupled with
the backside of the die 14 comprises, for example, gold, copper,
nickel, palladium, and/or any solderable material. A heat
dissipating metal 24 is adapted to couple with the plated backside
of the die 14 and a plurality of solder balls 28 are adapted to
couple with the substrate 12. A multi-layer (not shown) printed
circuit board 22 is then adapted to couple with the heat
dissipating metal 24 and with the plurality of solder balls.
[0018] The layers of the printed circuit board 22 comprise, for
example, copper foils. The layers are of varying depths within the
printed circuit board 22 and are adapted to couple with the
plurality of solder balls 28 via the thermal vias (not shown) of
the printed circuit board. The various layers may represent, for
example, the core, inputs, outputs, etc. of the printed circuit
board 22. Similarly, the heat dissipating metal 24 thermal vias 26
are adapted to couple the copper foil layers with the heat
dissipating metal. As such, heat can be dissipated from the
flip-chip BGA through the thermal vias coupled to the plurality of
layers of the printed circuit board 22.
[0019] In a further embodiment, a flip-chip ball grid array 10
comprises a substrate 12, a die 14, a first set of solder balls 16
adapted to couple the die and the substrate, a thermal compound 20
adapted to couple with a backside (not shown) of the die 14, a
second set of solder balls 28 adapted to couple with the substrate
12, and a multi-layer printed circuit board 22. The board 22
comprises a heat dissipating metal 24, comprising thermal vias 26,
adapted to couple with the thermal compound 20, and further
comprises thermal vias (not shown) adapted to couple with the
second set of solder balls 28. The heat dissipating metal 24
thermal vias 26 and the multi-layer printed circuit board 22
thermal vias are coupled with a plurality of the printed circuit
board layers and are adapted to dissipate heat through the printed
circuit board. The heat from the flip-chip BGA 10 is dissipated
through at least one of the following items: the heat dissipating
metal 24, the thermal compound 20, the die 14, the first set of
solder balls 16, and the second set of solder balls 28.
[0020] Referring now to FIG. 2, a method for producing a flip-chip
ball grid array is presented. The method begins by coupling a die
and a first set of solder balls at step 30, coupling a substrate
and the first set of solder balls at step 32, and coupling a
thermal compound and a backside of the die at step 34. The method
proceeds to coupling a second set of solder balls and the substrate
at step 36, coupling a heat dissipating metal on a printed circuit
board and the thermal compound; at step 38, and coupling the second
set of solder balls and the printed circuit board at step 40.
[0021] Referring now to FIG. 3, another method for producing a
flip-chip ball grid array is presented. The method begins by
coupling a die and a plurality of solder bumps at step 50, coupling
a substrate and the plurality of solder bumps at step 52, and
coupling a plated backside of the die and a heat dissipating metal
at step 54. The method proceeds to coupling a plurality of solder
balls and the substrate at step 56, coupling a multi-layer printed
circuit board and the heat dissipating metal at step 58, and
coupling the multi-layer printed circuit board and the plurality of
solder balls at step 60.
[0022] Referring now to FIG. 4, another method for producing a
flip-chip ball grid array is presented. The method begins by
coupling a die and a first set of solder balls at step 70, coupling
a substrate and the first set of solder balls at step 72, and
coupling a thermal compound and a backside of the die at step 74.
The method proceeds to coupling a second set of solder balls and
the substrate at step 76, coupling a multi-layer printed circuit
board heat dissipating metal and the thermal compound at step 78,
and coupling thermal vias, of the multi-layer printed circuit
board, and the second set of solder balls at step 80.
[0023] Although an exemplary embodiment of the present invention
has been illustrated in the accompanied drawings and described in
the foregoing detailed description, it will be understood that the
invention is not limited to the embodiments disclosed, but is
capable of numerous rearrangements, modifications, and
substitutions without departing from the spirit of the invention as
set forth and defined by the following claims. For example, the
flip-chip may be affixed to the BGA substrate either face-up or
face-down. Also, the interconnection matrix may connects the bare
chip to the BGA substrate using wire-bond, tape-automated-bonding,
or direct attach flip-chip style connections. Still further, the
thermal compound 20 and the heat dissipating metal 24 may cover a
lesser and/or greater area than depicted in FIG. 1. Also, the
number of printed circuit board vias, heat dissipating metal vias
26, the first set of solder balls 16, and the second set of solder
balls 28 may be a lesser and/or greater number than depicted in
FIG. 1. Also, the heat dissipating metal may not include any
thermal vias.
* * * * *