U.S. patent application number 10/047475 was filed with the patent office on 2003-04-24 for corrosion-resistant electrode structure for integrated circuit decoupling capacitors.
This patent application is currently assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION. Invention is credited to Copeland, Bruce A., Gorrell, Rebecca Yung, Scheider, Donald W., Takacs, Mark A., Travis, Kenneth J. JR., Ulanmo, Peter O., Wang, Jun.
Application Number | 20030075805 10/047475 |
Document ID | / |
Family ID | 21949200 |
Filed Date | 2003-04-24 |
United States Patent
Application |
20030075805 |
Kind Code |
A1 |
Copeland, Bruce A. ; et
al. |
April 24, 2003 |
CORROSION-RESISTANT ELECTRODE STRUCTURE FOR INTEGRATED CIRCUIT
DECOUPLING CAPACITORS
Abstract
A corrosion resistant electrode structure for interconnecting a
decoupling capacitor to a substrate is disclosed. In an exemplary
embodiment of the invention, the electrode structure includes a
first chromium layer formed upon the capacitor and a first nickel
layer formed upon the first chromium layer. A noble metal
conductive layer is then formed upon the first nickel layer and a
second nickel layer is formed upon said noble metal conductive
layer. The second nickel layer has a thickness which is greater
than a thickness of the first nickel layer. A second chromium layer
is then formed upon the nickel layer.
Inventors: |
Copeland, Bruce A.;
(Wappingers Falls, NY) ; Gorrell, Rebecca Yung;
(Lagrangeville, NY) ; Scheider, Donald W.;
(Poughquag, NY) ; Takacs, Mark A.; (Poughkeepsie,
NY) ; Travis, Kenneth J. JR.; (Newburgh, NY) ;
Ulanmo, Peter O.; (Hopewell Junction, NY) ; Wang,
Jun; (Poughkeepsie, NY) |
Correspondence
Address: |
Sean F. Sullivan, Esq.
Cantor Colburn LLP
55 Griffin Road South
Bloomfield
CT
06002
US
|
Assignee: |
INTERNATIONAL BUSINESS MACHINES
CORPORATION
ARMONK
NY
|
Family ID: |
21949200 |
Appl. No.: |
10/047475 |
Filed: |
October 23, 2001 |
Current U.S.
Class: |
257/766 ;
257/E21.021 |
Current CPC
Class: |
H01L 2924/00 20130101;
H01L 28/75 20130101; H01L 2924/0002 20130101; H01L 23/642 20130101;
H01L 2924/0002 20130101 |
Class at
Publication: |
257/766 |
International
Class: |
H01L 031/062; H01L
031/113; H01L 023/495; H01L 029/40; H01L 023/48; H01L 023/52 |
Claims
What is claimed is:
1. An electrode structure for interconnecting a decoupling
capacitor to a substrate, comprising: a first chromium layer formed
upon said capacitor; a first nickel layer formed upon said first
chromium layer; a noble metal conductive layer formed upon said
first nickel layer; a second nickel layer formed upon said noble
metal conductive layer, said second nickel layer having a thickness
which is greater than a thickness of said first nickel layer; and a
second chromium layer formed upon said nickel layer.
2. The electrode structure of claim 1, wherein said noble metal
conductive layer is a gold layer.
3. The electrode structure of claim 2, wherein said first and
second chromium layers are about 1,500 .ANG. in thickness.
4. The electrode structure of claim 2, wherein said gold layer is
about 2,500 .ANG. in thickness.
5. The electrode structure of claim 2, wherein said first nickel
layer is about 1,000 .ANG. in thickness, and said second nickel
layer is at least 5,000 .ANG. in thickness.
6. The electrode structure of claim 5, wherein said second nickel
layer is about 6,000 .ANG. in thickness.
7. A decoupling capacitor for interconnection to an integrated
circuit device, comprising: a ceramic body; an electrode structure
mounted to said ceramic body, said electrode structure further
comprising, a first chromium layer formed upon said ceramic body; a
first nickel layer formed upon said first chromium layer; a noble
metal conductive layer formed upon said first nickel layer; a
second nickel layer formed upon said noble metal conductive layer,
said second nickel layer having a thickness which is greater than a
thickness of said first nickel layer; and a second chromium layer
formed upon said nickel layer; a solder interconnect; and a ball
limiting metallurgy (BLM), disposed between said solder
interconnect and said electrode structure, said BLM preventing the
spread of said solder interconnect into said noble metal conductive
layer.
8. The decoupling capacitor of claim 7, wherein said noble metal
conductive layer is a gold layer.
9. The decoupling capacitor of claim 8, wherein said first and
second chromium layers are about 1,500 .ANG. in thickness.
10. The decoupling capacitor of claim 8, wherein said gold layer is
about 2,500 .ANG. in thickness.
11. The decoupling capacitor of claim 8, wherein said first nickel
layer is about 1,000 .ANG. in thickness, and said second nickel
layer is at least 5,000 .ANG. in thickness.
12. The decoupling capacitor of claim 11, wherein said second
nickel layer is about 6,000 .ANG. in thickness.
13. A method for forming an electrode structure for interconnecting
a decoupling capacitor to a substrate, the method comprising:
depositing a first chromium layer upon said capacitor; depositing a
first nickel layer upon said first chromium layer; depositing a
noble metal conductive layer upon said first nickel layer;
depositing a second nickel layer upon said noble metal conductive
layer, said second nickel layer having a thickness which is greater
than a thickness of said first nickel layer; and depositing a
second chromium layer upon said nickel layer.
14. The method of claim 13, wherein said noble metal conductive
layer is a gold layer.
15. The method of claim 14, wherein said first and second chromium
layers are about 1,500 .ANG. in thickness.
16. The method of claim 14, wherein said gold layer is about 2,500
.ANG. in thickness.
17. The method of claim 14, wherein said first nickel layer is
about 1,000 .ANG. in thickness, and said second nickel layer is at
least 5,000 .ANG. in thickness.
18. The method of claim 17, wherein said second nickel layer is
about 6,000 .ANG. in thickness.
Description
BACKGROUND
[0001] The present invention relates generally to integrated
circuit devices and, more particularly, to a corrosion-resistant
electrode structure for integrated circuit decoupling capacitors
used in non-hermetic environments.
[0002] As ultra large-scale integrated (ULSI) circuits have
continued to evolve, they have become more complex with respect to
switching more and more output driver circuits at higher and higher
speeds. In addition, an increase in the use of parallel processing
has resulted in the design of integrated circuits with a high
number of driver circuits to switch simultaneously at fast
transition speeds and high currents. Since the effective inductance
of semiconductor chips for these active switching circuits is
directly related to the amount of power distribution noise, the
driver circuit power connections are particularly sensitive to the
noise created by the effective inductance inherent in simultaneous
switching activity.
[0003] This effective inductance can be lowered by connecting
decoupling capacitors in proximity to an integrated circuit (IC).
Since inductance is a function of current path length, the shorter
the current path, the lower the inductance. High inductance, which
yields higher supply noise in semiconductor packages, reduces the
performance of ICs. Decoupling capacitors placed close to power
consuming circuits are able to smooth out voltage variation with a
stored charge thereon. The stored charge may be dissipated, or may
also be used as a local power supply to device inputs during signal
switching stages, thereby allowing the decoupling capacitor to
negate the effects of voltage noise induced into the system by
parasitic inductance.
[0004] Decoupling capacitors have been provided as discrete
components on integrated circuit chip carriers (i.e., modules which
carry either single or multiple IC chips). Such decoupling
capacitors provided "off chip" are typically mounted upon a
packaging substrate by means of solder ball pads (also known in the
art as C4 technology) formed upon the electrode interconnect
metallurgy of the capacitor body. Typically, this interconnect
metallurgy includes a copper layer to provide sufficient electrical
conductivity between the capacitor and the substrate. Although
copper is a suitable conductive metal for a decoupling capacitor
electrode structure in a hermetic environment, there are also
applications in which IC modules are operated in non-hermetic
environments. In this case, the metallurgy (i.e., copper) of a
conventional electrode structure is subject to corrosive effects
and, accordingly, structural weakening of the interconnection
between the capacitor and the substrate.
BRIEF SUMMARY
[0005] The above discussed and other drawbacks and deficiencies of
the prior art are overcome or alleviated by an electrode structure
for interconnecting a decoupling capacitor to a substrate. In an
exemplary embodiment of the invention, the electrode structure
includes a first chromium layer formed upon the capacitor and a
first nickel layer formed upon the first chromium layer. A noble
metal conductive layer is then formed upon the first nickel layer
and a second nickel layer is formed upon said noble metal
conductive layer. The second nickel layer has a thickness which is
greater than a thickness of the first nickel layer. A second
chromium layer is then formed upon the nickel layer.
[0006] In a preferred embodiment, the noble metal conductive layer
is a gold layer which is about 2,500 .ANG. in thickness. The first
and second chromium layers are each about 1,500 .ANG. in thickness.
The first nickel layer is about 1,000 .ANG. in thickness, and the
second nickel layer is at least 5,000 .ANG. in thickness, and
preferably is about 6,000 .ANG. in thickness.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Referring to the exemplary drawings wherein like elements
are numbered alike in the several Figures:
[0008] FIG. 1 is a cross-sectional view of an existing electrode
structure for a ceramic decoupling capacitor terminated in a C4
solder connection;
[0009] FIG. 2 is a cross-sectional view of a novel electrode
structure for a ceramic decoupling capacitor, in accordance with an
embodiment of the invention;
[0010] FIG. 3 is an enlarged photograph of a decoupling capacitor
having the existing electrode structure of FIG. 1, following
salting, temperature & humidity exposure, and a pull test
applied thereto; and
[0011] FIG. 4 is an enlarged photograph of a decoupling capacitor
having the novel electrode structure of FIG. 2, following salting,
temperature & humidity exposure, and a pull test applied
thereto.
DETAILED DESCRIPTION
[0012] Referring initially to FIG. 1, there is shown a
cross-sectional view of an existing electrode structure 10 for a
ceramic decoupling capacitor 12. Prior to the attachment of the
capacitor 12 upon an IC carrier or substrate (not shown), a
metallurgical process is used to form the electrode structure 10
having a C4 solder ball termination 16 at an end thereof. Electrode
structure 10 includes a first chromium (Cr) layer 18, formed upon
the ceramic body 20 of decoupling capacitor 12 by techniques such
as by physical vapor deposition, sputtering, evaporation or any
other suitable technique. A representative thickness of first
chromium layer 18 is about 1,500 .ANG.. The first chromium layer 18
serves as an adhesive layer between ceramic body 20 and a
conductive copper (Cu) layer 22 formed atop the first chromium
layer 18.
[0013] The copper layer 22 is formed to a thickness of about 10,000
.ANG. (1 micron), after which a second chromium layer 24 is
deposited thereupon. As is the case with the first chromium layer
18, the second chromium layer 24 has a thickness of about 1,500
.ANG.. The electrode structure 10 is then provided with a ball
limiting metallurgy (BLM) 26, which is a pad that limits the flow
and spread of the solder ball 16 material upon heating. The
presently favored BLM 26 includes, chromium, copper and gold
(CrCuAu). Finally, the lead/tin (PbSn) solder C4 connection is
applied to the BLM 26 and the capacitor 12 is prepared for
attachment to the appropriate location on the substrate.
[0014] As mentioned previously, however, when such an electrode
structure for decoupling capacitors is used in an unsealed or
non-hermetic environment, the exposed sidewalls of copper layer 22
become subject to corrosive effects. Over time, these corrosive
effects can weaken the overall electrode structure 10 and degrade
the electrical performance of the capacitor 12.
[0015] One existing approach to protecting a copper-based electrode
structure is to encapsulate the same on an already-mounted
decoupling capacitor with a polymeric underfill material.
Typically, the underfill material is applied in a two stage
process, the first being a liquid or gel stage. Then, the gel is
subjected to a hardening stage, such as by curing. While this
process allows the copper in the electrode structure to be
protected, there are at least two disadvantages with this approach.
First, there are additional processing steps involved following the
attachment of the decoupling capacitor to the substrate. Second,
once the electrode structure is cured, the option of reworking by
removing the solder connection is eliminated.
[0016] Therefore, in accordance with an embodiment of the
invention, a novel electrode structure 100 and a method of forming
the same is disclosed herein, as shown in FIG. 2. The electrode
structure 100 allows for a low-inductance decoupling capacitor to
be used in a non-hermetic environment without the need for applying
underfill material thereto. For ease of description, like
components are designated with like reference numerals.
[0017] A first chromium layer 102 is deposited upon the ceramic
body 20 of decoupling capacitor 12. The first chromium layer is
about 1,500 .ANG. in thickness and serves 102 as an adhesive layer
between ceramic body 20 and a first nickel (Ni) layer 104 deposited
atop the first chromium layer 102. The first nickel layer 104 has a
thickness of about 1,000 .ANG..
[0018] Then, a noble metal conductive layer 106 is deposited atop
the first nickel layer 104. In a preferred embodiment, the noble
metal conductive layer 106 is gold; however, palladium (Pd) is also
a suitable element. The first nickel layer 104 also serves as an
adhesive layer since gold (or palladium) does not adhere well to
chromium.
[0019] The thickness of the deposited noble metal conductive layer
106 is about 2,500 .ANG.. It will be noted that this is
approximately four times thinner than the copper layer 22 of the
conventional electrode structure 10 in FIG. 1. However, it is found
that a 2,500 .ANG. layer of gold provides sufficiently low
resistance so as to meet desired circuit performance standards.
Used as both an adhesive layer and a protective barrier for
subsequent metallurgy, a second nickel layer 108 is formed upon
noble metal conductive layer 106. In a preferred embodiment, the
second nickel layer 108 is formed to a thickness of at least 5,000
.ANG., and more preferably to a thickness of about 6,000 .ANG.. In
any case, it will be noted that the thickness of the second nickel
layer 108 is greater than that of the first nickel layer 104 since
second nickel layer 108 also serves as a barrier layer, as will be
described in greater detail later.
[0020] Finally, the electrode structure 100 is completed with the
formation of a second chromium layer 110 atop the second nickel
layer 108. Like the first chromium layer 102, the second chromium
layer 110 also serves as an adhesion layer. Once the electrode
structure 100 is completed, the BLM 26 may then be formed
thereupon. Then, the PbSn C4 solder connection 16 is applied to the
BLM 26. Not only does the second nickel layer 108 provide adhesion
between the noble metal conductive layer 106 and the second
chromium layer 110, but it also prevents the interaction of the
noble metal material (e.g., gold) with the PbSn solder connection
16.
[0021] A comparison of the electrical characteristics of a group of
decoupling capacitors fabricated in accordance with the above
described invention embodiments was performed with a group of
capacitors fabricated in accordance with the existing electrode
structure (i.e., copper as the conductive metal) illustrated in
FIG. 1. Specifically, measurements of capacitance (in nanofarads)
as a function of temperature were taken at a test frequency between
1-3 KHz. The measured values of capacitance for the inventive noble
metal decoupling capacitors, taken over a temperature range of
about 25.degree. C. to about 85.degree. C., compare favorably to
the capacitance values of the existing decoupling capacitors.
Generally speaking, the capacitance for both types of decoupling
capacitors increases as temperature increases, up to about
55.degree. C. As temperature is further increased above 55.degree.
C., however, the capacitance values begin to decrease.
[0022] The results were also consistent at a higher test frequency
of 40 MHz. Again, the electrical characteristics of the corrosion
resistant decoupling capacitors compared favorably with those
having the conventional copper electrode structure. Moreover, at
ambient temperature (about 25.degree. C.), the corrosion resistant
decoupling capacitors were actually found to have a higher
capacitance than the conventional decoupling capacitors (e.g.,
about 145 nF for the corrosion resistant decoupling capacitors as
compared to about 125 nF for the conventional decoupling
capacitors).
[0023] In addition to performing a comparison of electrical
characteristics, a corrosion test was designed to examine the
behavioral difference between the corrosion resistant decoupling
capacitors and the conventional decoupling capacitors. Both types
were mounted to modules and subjected to low ppm salting in various
solutions of 1% NaCl, 10% NaCl and 3% sea water. The test samples
were then placed in a temperature and humidity chamber (at
85.degree. C., 81% relative humidity) for a duration of 2000 hours.
Afterward, no electrical degradation was observed as to either type
of electrode structure. However, mechanical stress testing of both
types of electrode structures revealed a reduced mechanical
strength in the metallurgy of the conventional copper electrode
structure.
[0024] On average, the conventional electrode structure
demonstrated about 20% less pull strength at an applied pull
strength of 1 pound, whereas the corrosion resistant electrode
structure demonstrated 0.99 pound pull strength. More
significantly, the mechanical failures after pull testing for the
existing decoupling capacitors were located within the CrCuCr
electrode structures, whereas the mechanical failures for the
inventive CrNiAuNiCr electrode structures were located at the C4
solder connection (also known as a "taffy-pull" failure in the
art). Because this mechanical failure mechanism was not
demonstrated in the existing electrode structures absent a
corrosion test (i.e., without salting), the corrosion in the copper
electrode and subsequent mechanical weakening is attributable to
the corrosive environment.
[0025] FIG. 3 is a photograph of one of the corrosion-tested
decoupling capacitors having the existing electrode structure 10.
As can be seen, the mechanical failures therein are located within
the electrode structures (seen as elongated metallic strips in FIG.
3) themselves. In contrast, FIG. 4 is a photograph of one of the
corrosion-tested decoupling capacitors having the inventive
electrode structure 100. In this case, it is seen that the
metallurgy of structure 100 is substantially intact, with the pull
failures all occurring at the C4 interconnect.
[0026] As disclosed herein, a reliable, low-inductance decoupling
capacitor may be used in a non-hermetic environment. Moreover, such
a device may be implemented without the need for underfill or other
resin materials that would otherwise limit the possibility of
reworking (i.e., removing the C4 interconnect and subsequently
reattaching).
[0027] While the invention has been described with reference to a
preferred embodiment, it will be understood by those skilled in the
art that various changes may be made and equivalents may be
substituted for elements thereof without departing from the scope
of the invention. In addition, many modifications may be made to
adapt a particular situation or material to the teachings of the
invention without departing from the essential scope thereof.
Therefore, it is intended that the invention not be limited to the
particular embodiment disclosed as the best mode contemplated for
carrying out this invention, but that the invention will include
all embodiments falling within the scope of the appended
claims.
* * * * *