U.S. patent application number 10/107146 was filed with the patent office on 2002-12-05 for process for preparing cu damascene interconnection.
This patent application is currently assigned to NATIONAL SCIENCE COUNCIL. Invention is credited to Lee, Yueh-Chuan, Lin, Chien-Hsing, Yeh, Ching-Fa.
Application Number | 20020182851 10/107146 |
Document ID | / |
Family ID | 21677933 |
Filed Date | 2002-12-05 |
United States Patent
Application |
20020182851 |
Kind Code |
A1 |
Yeh, Ching-Fa ; et
al. |
December 5, 2002 |
PROCESS FOR PREPARING CU DAMASCENE INTERCONNECTION
Abstract
The present invention discloses a technique of enhancing
adhesion between a passivation layer and a low-K dielectric layer,
in which a SiO.sub.2 layer as the passivation formed on the low-K
dielectric layer is subjected to N2O plasma annealing. This
technique is useful in improving the yield of a process for
preparing Cu damascene interconnection.
Inventors: |
Yeh, Ching-Fa; (Hsinchu,
TW) ; Lee, Yueh-Chuan; (Hsinchu, TW) ; Lin,
Chien-Hsing; (Hsinchu, TW) |
Correspondence
Address: |
BACON & THOMAS
4th Floor
625 Slaters Lane
Alexandria
VA
22314
US
|
Assignee: |
NATIONAL SCIENCE COUNCIL
Taipei
TW
|
Family ID: |
21677933 |
Appl. No.: |
10/107146 |
Filed: |
March 28, 2002 |
Current U.S.
Class: |
438/633 ;
257/E21.576 |
Current CPC
Class: |
H01L 21/76831 20130101;
H01L 21/76826 20130101; H01L 21/76834 20130101 |
Class at
Publication: |
438/633 |
International
Class: |
H01L 021/4763 |
Foreign Application Data
Date |
Code |
Application Number |
Apr 12, 2001 |
TW |
90108745 |
Claims
What is claimed is:
1. A process for preparing a Cu damascene interconnection
comprising the following steps: forming a low-K dielectric layer on
a substrate; forming a passivation layer on said low-K dielectric
layer; subjecting said passivation layer/low-K dielectric layer to
a N.sub.2O plasma annealing treatment; forming a plurality of
trenches on said low-K dielectric layer/passivation layer; forming
a pad oxidation layer on side walls of each of said plurality of
trenches; forming a barrier metal layer on said pad oxidation
layer; depositing copper on the resulting structure; and chemical
mechanical polishing said copper until said passivation layer is
exposed, thereby forming a Cu damascene interconnection on said
low-K dielectric layer.
2. The process as claimed in claim 1, wherein said N.sub.2O plasma
annealing improves the yield of the process for preparing a Cu
damascene interconnection.
3. The process as claimed in claim 1, wherein said N.sub.2O plasma
annealing treatment uses the following conditions: N.sub.2O flow
rate 50.about.1000 sccm, pressure 10.about.1000 mTorr, temperature
of plate 20.about.450.degree. C., radio frequency power
50.about.1000W, and processing time 1.about.100 minutes.
4. The process as claimed in claim 1, wherein said low-K dielectric
layer is hydrogen silsesquiuxane or methyl silsesquioxane.
5. The process as claimed in claim 1, wherein said passivation
layer is SiO.sub.2 or SiNx, wherein O<x<1.4.
6. The process as claimed in claim 5, wherein said passivation
layer is SiO.sub.2.
7. The process as claimed in claim 6, wherein said SiO.sub.2 is a
SiO.sub.2 deposited by a chemical vapor phase deposition.
Description
FIELD OF THE INVENTION
[0001] The present invention relates to a process for preparing a
Cu damascene interconnection, particularly a process for preparing
a Cu damascene interconnection with an improved yield.
BACKGROUND OF THE INVENTION
[0002] In the damascene of copper in a low dielectric material, a
copper line structure is formed by forming trenches in a low
dielectric layer by using an active ionic etching, depositing
copper on the whole surface (including filling the trench with
copper), and using a chemical mechanical polishing (CMP) to polish
off the copper on the surface and leaving copper in the
trenches.
[0003] A photoresist is used as a mask layer when the active ionic
etching is carried out. In order to protect the organic low
dielectric layer from damage during the stripping of the
photoresist mask layer, a passivation layer is required between the
photoresist and the organic low dielectric layer [J. M. Neirynck,
R. J. Gutmann, and S. P. Murarka, J. Electrochem. Soc., 1602,
(1999); D. T. Price, R. J. Gutmann, and S. P. Murarka, Thin Solid
Films, 308-309, 523 (1997)]. However, due to a poor adhesion
between the passivation layer and the low dielectric layer, the
deposited copper layer is torn off from the surface and the
trenches during the CMP process. As a result, a copper damascene
interconnection can not be completed.
SUMMARY OF THE INVENTION
[0004] The present invention provides a process for preparing a Cu
damascene interconnection, which comprises forming a low-K
dielectric layer on a substrate; forming a passivation layer on
said low-K dielectric layer; forming a plurality of trenches on
said low-K dielectric layer/passivation layer; forming a pad
oxidation layer on the inner walls of each of said plurality of
trenches; forming a barrier metal layer on said pad oxidation
layer; depositing copper on the resulting structure; and chemical
mechanical polishing said copper until said passivation layer is
exposed, thereby forming a Cu damascene interconnection on said
low-K dielectric layer, characterized in subjecting said
passivation layer/low-K dielectric layer with a N.sub.2O plasma
annealing prior to the formation of said plurality of trenches.
[0005] The present invention uses said N.sub.2O plasma annealing to
improve the yield of the process for preparing a Cu damascene
interconnection.
[0006] Preferably, said N.sub.2O plasma annealing uses the
following conditions: N.sub.2O flow rate 50.about.1000 sccm,
pressure 10.about.1000 mTorr, temperature of plate
20.about.450.degree. C., radio frequency power 50.about.1000 W, and
processing time 1.about.100 minutes.
[0007] Preferably, said low-K dielectric layer is hydrogen
silsesquiuxane or methyl silsesquioxane.
[0008] Preferably, said passivation layer is SiO.sub.2 or SiNx,
wherein 0<x<1.4. More preferably, said passivation layer is
SiO.sub.2, particularly a SiO.sub.2 deposited by a chemical vapor
phase deposition (CVD).
BRIEF DESCRIPTION OF THE FIGURES
[0009] FIGS. 1(a) to 1(e) show the schematic sectional view of the
device in the essential steps for preparing a Cu damascene
interconnection according to the present invention;
[0010] FIG. 2 shows the structural layout of a Cu damascene
interconnection;
[0011] FIGS. 3(a) to 3(c) separately show the optical microscopic
photos of a Cu damascene interconnection prepared according to the
present invention, wherein FIG. 3(a) is 200X, FIG. 3(b) is 500X,
and FIG. 3(c) is 1000X;
[0012] FIGS. 4(a) to 4(c) separately show the electron microscopic
photos of a Cu damascene interconnection prepared by a conventional
process, wherein FIG. 4(a) is 5000X, FIG. 4(b) is 10000X, and FIG.
4(c) is 5000X; and
[0013] FIG. 5 is a plot of C/Si count ratio vs. sputter time (sec)
in a secondary ion mass spectrum (SIMS) analysis of a 500 .ANG.
SiO.sub.2/MSQ with/without N.sub.2O plasma annealing, wherein the
dash line represents the sample with N.sub.2O plasma annealing and
the solid line represents the sample without N.sub.2O plasma
annealing.
DETAILED DESCRIPTION OF THE INVENTION
[0014] The present invention proposes using a CVD SiO.sub.2 treated
by a N.sub.2O plasma annealing as a passivation layer in a Cu
damascene interconnection structure. The CVD SiO.sub.2 formed on
the surface of the organic low-K dielectric layer (e.g. hydrogen
silsesquiuxane or methyl silsesquioxane (MSQ)) will form a
re-bonding with the organic low-K dielectric layer during the
N.sub.2O plasma annealing treatment, thereby increasing the
adhesion therebetween. As a result, the lamination can withstand
the tearing force generated during the subsequent CMP on the copper
metal layer.
[0015] In the following text, a low-K (.about.2.8) dielectric MSQ
was used as an example. Such a MSQ was covered by a SiO.sub.2
formed by a chemical vapor phase deposition (CVD), and then was
subjected to a N.sub.2O plasma annealing treatment to form a
passivation layer, or just simply covered by a simple SiNx as a
passivation layer. After the CMP, a planar evaluation on the
resulting copper lines whether they remain intact in the trenches
of the organic low-K dielectric layer or not was used to verify the
improvement and applicability of the present invention.
[0016] According to a preferred embodiment of the present
invention, a damascene structure of copper/low-K dielectric layer
was prepared by the following steps, as shown in FIGS. 1(a) to
1(e).
[0017] spin-coating an organic low-K dielectric layer (MSQ)
(thickness 4000 .ANG.) on a wet oxide layer 100;
[0018] covering said MSQ layer with a layer of SiO.sub.2 10
(thickness 500 .ANG.) as a passivation layer by plasma-enhanced
chemical vapor phase deposition [T. Rukuda, T. Ohshima, H. Aoki, H.
Maruyama, H. Miyazaki, N. Konishi, S. Fukada, T. Yunogami, S.
Hotta, S. Maekawa, K. Hinode, K. Nojiri, T. Tokunaga, and N.
Kobayashi, in Tech. Dig. IEEE Int. Electron Devices Meeting.
(IEDM), 619 (1999)], wherein tetraethoxysilane (TEOS) was used as a
precursor of said SiO.sub.2;
[0019] performing said N.sub.2O plasma annealing in a parallel
plate type plasma enhanced deposition device under the following
working conditions: N.sub.2O gas flow rate 200 sccm, temperature of
the upper/lower plates 250/300.degree. C., radio frequency power
200 W, internal pressure of the reaction chamber 200 mTorr, and
processing time 15 minutes (FIG. 1(a));
[0020] spin coating a photoresist on the passivation layer 10,
imagewise exposing and developing the photoresist to form a
patterned photoresist 20, and forming a plurality of trenches in
the MSQ layer by active ionic etching said passivation layer 10 and
the MSQ layer by using said patterned photoresist as a mask layer
(FIG. 1(b));
[0021] prior to the removal of said photomask, using a selective
liquid phase deposition to grow SiO.sub.2(300 .ANG.) on the side
walls and the bottoms of said trenches as a pad oxidation layer 30
(C. F. Yeh, Y. C. Lee, Y. C. Su, K. H. Wu, and C. H. Lin, "Novel
Sidewall Capping for Degradation-Free Damascene Trenches of
Low-Permitivity Methylsilsesquioxane", Jpn. J. Appl. Phys., Vol.39,
Part 2, p.354-p.356, 2000; U.S. Pat. No. 6,251,753B1), thereby
protecting said side walls and the bottoms from being damaged by
the subsequent oxygen plasma treatment; stripping the patterned
photoresist by using oxygen plasma ashing, and cleaning in
H.sub.2SO.sub.4/H.sub.2O.sub.2 solution
(H.sub.2SO.sub.4/H.sub.2O.sub.2=3:1) afterward, thereby completely
removing said photomask (FIG. 1(c));
[0022] vacuum sputtering TiN (300 .ANG.) as a barrier metal layer
40 and Cu (10000 .ANG.) (FIG. 1(d));
[0023] using a two-stage chemical mechanical polishing (CMP)
process to polish off Cu and TiN (barrier metal layer 40) until
said passivation layer 10 was exposed (the detailed operation
conditions of the CMP process is listed in Table 1), and
immediately covering the exposed surface with SiNx to prevent
oxidation of Cu, thereby completing the preparation of the Cu
damascene interconnection (FIG. 1(e)).
1 TABLE 1 Removal Rate Function Composition of Slurry (nm/min)
Selectivity Stage1 Cu removal HNO.sub.3 3 wt. % 600 -- citric acid
10.sup.-3 M Al.sub.2O.sub.3 3 wt. % Stage2 TiN removal Bayer's
456417F9 168 6.7 (to Cu) 50 vol. % H.sub.2O.sub.2 3 wt. %*
*absolute concentration
[0024] Said passivation layer 10 has a function of preventing said
organic low-K dielectric layer MSQ from being damaged by said
oxygen plasma treatment.
[0025] A Cu damascene interconnection with a structure layout as
shown in FIG. 2 was prepared according to by the abovementioned
preferred embodiment of the present invention, wherein the middle
portion is a Cu line 11 with length.times.width (L.times.W)=500
.mu.m.times.2 .mu.m, and the two sides are Cu line pads 12. A
net-shaped pad was particularly used for avoiding the occurrence of
a dishing effect during the CMP process. Furthermore, a net-shaped
Cu pad was also be used to observe the adhesion between copper and
the low-K dielectric layer MSQ in this portion during the CMP
process as to whether the copper is intact in the trenches. As
shown in FIGS. 3(a) to 3(c) ((a) 200X, (b) 500X, and (c) 1000X),
the Cu damascene interconnection prepared according to the present
invention show no peeling off between the copper and the organic
low-K dielectric layer MSQ after the CMP process, and the copper
remains in the trench intact.
[0026] The N.sub.2O-plasma-annealing treated passivation layer 10
was replaced by a SiNx layer in a control example. As shown in the
scanning electron microscopy (SEM) photos of FIGS. 4(a)-4(c) ((a)
5000X, (b) 10000X, (c) 5000X), the copper is pulled out from the
trenches completely (as shown in FIGS. 4(a) and (b)) after the CMP
process in the control example, and even the organic low-K
dielectric layer MSQ is pulled out together (as shown in FIG.
4(c)). This could be resulted from a poor adhesion between the SiNx
and the organic low-K dielectric layer MSQ.
[0027] On the other hand, the passivation layer 10 of the present
invention, which is SiO.sub.2 formed by a chemical vapor phase
deposition and subjected to a N.sub.2O plasma annealing, is
believed having a re-bonding with the surface of the organic low-K
dielectric layer MSQ, thereby increasing the adhesion
therebetween.
[0028] In order to understand whether the N.sub.2O plasma annealing
will cause a re-bonding between the SiO.sub.2 deposited by a
chemical vapor phase deposition and the surface of said organic
low-K dielectric layer, a secondary ion mass spectrum (SIMS)
analysis was carried out on said organic low-K dielectric layer
(MSQ) covered with the chemical vapor phase deposited SiO.sub.2,
wherein comparisons were made between specimens with or without the
N.sub.2O plasma annealing. The results are shown in FIG. 5. It can
be seen from FIG. 5 that, after the N.sub.2O plasma annealing, an
oxidation seems to occur on the surface of the organic low-K
dielectric layer. The profile of C/Si count ratio vs. sputter time
of the sample with N.sub.2O plasma annealing shifts to the right,
indicating that there is a re-bonding on the surface of the organic
low-K dielectric layer in the sample with N.sub.2O plasma
annealing. Therefore, it might be concluded that the N.sub.2O
plasma annealing can increase the adhesion between the
chemical-vapor-phase-depo- sited SiO.sub.2 and the organic low-K
dielectric layer.
* * * * *