U.S. patent application number 09/817264 was filed with the patent office on 2002-10-03 for encapsulated semiconductor die package, and method for making same.
This patent application is currently assigned to WALSIN ADVANCED ELECTRONICS LTD.. Invention is credited to Jen, Yung-Chao, Liu, Wen-Chun, Wu, Ming-Feng.
Application Number | 20020140113 09/817264 |
Document ID | / |
Family ID | 25222688 |
Filed Date | 2002-10-03 |
United States Patent
Application |
20020140113 |
Kind Code |
A1 |
Liu, Wen-Chun ; et
al. |
October 3, 2002 |
ENCAPSULATED SEMICONDUCTOR DIE PACKAGE, AND METHOD FOR MAKING
SAME
Abstract
A semiconductor die package has a lead frame, a die attached to
the lead frame and an encapsulant enclosing the lead frame and the
die. The distance between the top outside face of the encapsulant
and the frame is substantially equal to the distance between the
bottom outside face of the encapsulant and the die, and the
distance between the top outside face of the encapsulant and the
frame is substantially two and half times the distance between the
bottom outside face of the encapsulant and the lead frame.
Consequently, the different thickness of different encapsulant
portions achieves an optimum balance during curing that effectively
reduces the deformation of the encapsulant. In addition, the
encapsulant can be completely formed by an injection process, and
no crack will form in the encapsulant.
Inventors: |
Liu, Wen-Chun; (Pingtung
City, TW) ; Jen, Yung-Chao; (Kaohsiung, TW) ;
Wu, Ming-Feng; (Kaohsiung Hsien, TW) |
Correspondence
Address: |
Parkhurst & Wendel, L.L.P.
Suite 210
1421 Prince Street
Alexandria
VA
22314-2805
US
|
Assignee: |
WALSIN ADVANCED ELECTRONICS
LTD.
|
Family ID: |
25222688 |
Appl. No.: |
09/817264 |
Filed: |
March 27, 2001 |
Current U.S.
Class: |
257/787 ;
257/666; 257/E21.502; 257/E23.124 |
Current CPC
Class: |
H01L 21/56 20130101;
H01L 2224/05599 20130101; H01L 2224/48091 20130101; H01L 2924/00014
20130101; H01L 2224/73215 20130101; H01L 2224/48091 20130101; H01L
2224/85399 20130101; H01L 2224/05599 20130101; H01L 23/3107
20130101; H01L 2224/85399 20130101; H01L 2224/4826 20130101; H01L
2224/45099 20130101; H01L 24/48 20130101; H01L 2224/45099 20130101;
H01L 2924/00014 20130101; H01L 2224/32245 20130101; H01L 2924/00014
20130101; H01L 2224/45099 20130101; H01L 2924/00 20130101; H01L
2924/207 20130101; H01L 2924/00014 20130101; H01L 2224/73215
20130101; H01L 2224/4826 20130101; H01L 2924/00014 20130101; H01L
2924/00014 20130101; H01L 2224/32245 20130101; H01L 2224/45015
20130101; H01L 2924/00014 20130101 |
Class at
Publication: |
257/787 ;
257/666 |
International
Class: |
H01L 023/495; H01L
023/28 |
Claims
What is claimed is:
1. A semiconductor die package comprising: a lead frame having
multiple leads attached around the lead frame; a die attached to
the lead frame; multiple bonding wires each electrically connected
between the lead frame and the die; and an encapsulant enclosing
the lead frame, the die and the bonding wires; wherein a distance
between an outermost face of the encapsulant and the lead frame is
substantially equal to that between an innermost face of the
encapsulant and the die; and the distance between the innermost
face of the encapsulant and the lead frame is substantially two and
half times the distance between an outermost face of the
encapsulant and the lead frame.
2. The semiconductor die package as claimed in claim 1, wherein the
ratio of the distance between the innermost face of the encapsulant
and the lead frame to the distance between the outermostface of the
encapsulant and the lead frame is achieved by means of adjusting
the thickness of the die to become 2.5 so as to accomplish the
purposes of an optimum balance of thickness of different
encapsulant portions and keeping the encapsulant from bending and
deforming.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a semiconductor die
package, and more particularly to an encapsulated semiconductor die
package that can keep from bending.
[0003] 2. Description of Related Art
[0004] With reference to FIG. 2, a conventional semiconductor die
package in accordance with the prior art comprises a lead frame
(21), a die (20) and an encapsulant (23). A passage (211) is
defined in the middle portion of the lead frame (21), and multiple
internal leads (not shown) are mounted on the lead frame (12)
around the passage (211). Multiple external leads (112) are mounted
around the lead frame (21) and extend outward from the encapsulant
(23). In practice, because the I/O nodes (not shown) of the die
(20) are arranged in the middle portion of the die (20), the die
(20) is usually mounted on the bottom of the lead frame (Lead on
Chip, LOC) by means of an adhesive layer (24). A bonding wire (22)
is electrically connected between each internal lead (not shown) of
the lead frame (21) and each corresponding I/O node (not shown) of
the die (20). The encapsulant (23) is used to enclose the lead
frame (21), die (20) and all of the bonding wires (22) to protect
the encapsulated components. In the prior art, the distance (e)
between the lead frame (21) and outside face of the encapsulant
(23) is equal to the distance (f) between the lead frame (21) and
the other outside face of the encapsulant (23).
[0005] However, the distance (g) between the die (20) and the
outside bottom face of the encapsulant (23) in the conventional
semiconductor die package is smaller than the distance (e) between
the lead frame (21) and the top face of the encapsulant (23). The
surface of the package easily bends upward in the packaging process
due to the uneven curing speed between different parts of the
encapsulant (23). Consequently the external leads (112) will not be
in the same plane due to the deformation of the package.
[0006] With reference to FIG. 3, another conventional semiconductor
die package was provided to solve the deformation problem. The
distance (h) between the lead frame and the top outside face of the
encapsulant (33) of the conventional semiconductor die package is
formed to be substantially equal to the distance (i) between the
die (30) and the bottom outside face of the encapsulant (33).
[0007] However, the distance (j) between the lead frame (33) and
the bottom outside face of the encapsulant (33) of the conventional
semiconductor die packaged device is about three times the distance
(h) between the lead frame (31) and the top outside face of the
encapsulant (33). Therefore, the bottom surface of the package
easily bends downward in the packaging process because the curing
speed of the lower encapsulant (33) portion is much slower than
that of the upper encapsulant (33) portion.
[0008] To overcome the shortcomings, the present invention tends to
provide an improved semiconductor die package to mitigate or
obviate the aforementioned problems.
SUMMARY OF THE INVENTION
[0009] The main objective of the invention is to provide an
improved semiconductor die package having a lead frame, a die
attached to the lead frame and an encapsulant enclosing the lead
frame and the die. The distance between the top outside face of the
encapsulant and the frame is substantially equal to the distance
between a bottom outside face of the encapsulant and the die, and
the distance between the top outside face of the encapsulant and
the lead frame is substantially two and half times the distance
between the bottom outside face of encapsulant and the lead frame.
This can effectively reduce the deformation of the encapsulant.
[0010] Other objects, advantages and novel features of the
invention will become more apparent from the following detailed
description when taken in conjunction with the accompanying
drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] FIG. 1 is a side plan view in partial section of a
semiconductor die package in accordance with the present
invention;
[0012] FIG. 2 is a side plan view in partial section of a
conventional semiconductor die package in accordance with the prior
art; and
[0013] FIG. 3 is a side plan view in partial section of another
embodiment of a conventional semiconductor die package in
accordance with the prior art.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENT
[0014] With reference to FIG. 1, a semiconductor die package in
accordance with the present invention comprises a lead frame (11),
a die (10) and an encapsulant (13). A passage (121) is defined in
the middle portion of the lead frame (11), and multiple internal
leads (not shown) are mounted on the lead frame (11) around the
passage (121). Multiple external leads (not shown) are mounted
around the lead frame (11) and extend outward from the encapsulant
(13). The die (10) is mounted on the bottom of the lead frame (11)
by an adhesive layer (14), and multiple I/O nodes (not shown) are
mounted on the die (10). A bonding wire (12) is electrically
connected between each internal lead (not shown) on the lead frame
(11) and each corresponding I/O node (not shown) of the die
(10).
[0015] The encapsulant (13) is used to enclose the lead frame (11),
die (10) and all of the bonding wires (12) to protect the
components enclosed by the encapsulant (13). With reference to FIG.
3, the distance (h) between the lead frame (31) and the top outside
face of the encapsulant (33) of the conventional semiconductor die
package is substantially equivalent to the distance (i) between the
die (30) and the bottom outside face of the encapsulant (33). With
reference to FIG. 1, As determined by experimentation, the distance
(d) between the lead frame (11) and the bottom outside face of the
encapsulant (13) is formed to be about two and half times the
distance (a) between the lead frame (11) and the top outside face
of the encapsulant (13) by adjusting the thickness (c) of the die
(10) by grinding. The thickness of different encapsulant (13)
portions can achieve an optimum balance. This can keep the
encapsulant (13) from bending and deforming during the packaging
process, and all of the external leads (not shown) can be kept in
the same plane. In addition, the encapsulant (14) can be completely
formed by an injection process, and no cracks will form in the
encapsulant (13).
[0016] With reference to FIG. 1, in an example of the foregoing
design constraints used for a Lowprofile Quad Flat Package (LQFP),
if the thickness (T) of the package is 1.4 millimeters (mm), the
thickness (t.sub.1) of the lead frame (11) is 0.127 mm, the
thickness (t.sub.2) of the adhesive layer (not numbered) is 0.03 to
0.1 mm, the distance (a) between the lead frame (11) and top
outside face of the encapsulant (13) must be 0.364 mm.+-.0.0254,
and the distance (b) between the die (10) and the bottom outside
face of the encapsulant (13) must be equal to the distance (a). The
distance (d) between the lead frame (11) and bottom face of the
encapsulant (13) must be to 0.91 mm.+-.0.0254 mm.
[0017] As an example of the foregoing design constraints used for a
Thin Quad Flat Package (TQFP), if the thickness (T) of the
encapsulant (13) is set to 1 mm, the thickness (t.sub.1) of the
lead frame (11) is 0.125 mm and the thickness (t.sub.2) of the
adhesive layer (not numbered) is 0.03 to 0.1 mm, the distance (a)
between the lead frame (11) and top outer face of the encapsulant
(13) must be 0.25 mm.+-.0.0254 mm, and the distance (b) between the
die (10) and the bottom outer face of the encapsulant (13) must be
equal to the distance (a). The distance (d) between the lead frame
(11) and the bottom face of the encapsulant (13) must be 0.625
mm.+-.0.0254 mm.
[0018] Even though numerous characteristics and advantages of the
present invention have been set forth in the foregoing description,
together with details of the structure and function of the
invention, the disclosure is illustrative only, and changes may be
made in detail, especially in matters of shape, size, and
arrangement of parts within the principles of the invention to the
full extent indicated by the broad general meaning of the terns in
which the appended claims are expressed.
* * * * *