U.S. patent application number 09/976927 was filed with the patent office on 2002-06-27 for diffusion barriers comprising a self-assembled monolayer.
Invention is credited to Chanda, Kaushik, Krishnamoorthy, Ahila, Murarka, Shyam P., Ramanath, G..
Application Number | 20020079487 09/976927 |
Document ID | / |
Family ID | 27399315 |
Filed Date | 2002-06-27 |
United States Patent
Application |
20020079487 |
Kind Code |
A1 |
Ramanath, G. ; et
al. |
June 27, 2002 |
Diffusion barriers comprising a self-assembled monolayer
Abstract
The present invention provides a method for forming a diffusion
barrier layer, a diffusion barrier in an integrated circuit and an
integrated circuit. The method for forming a diffusion barrier
involves the following steps: 1) preparing a silicon substrate; 2)
contacting the silicon substrate with a composition comprising
self-assembled monolayer subunits and a solvent; and, 3) removing
the solvent. The diffusion barrier layer includes a self-assembled
monolayer. The integrated circuit includes a silicon substrate, a
diffusion barrier layer and a metal deposited on the diffusion
barrier layer. The diffusion barrier layer in the integrated
circuit is covalently attached to the silicon substrate and
includes a self-assembled monolayer.
Inventors: |
Ramanath, G.; (Troy, NY)
; Krishnamoorthy, Ahila; (US) ; Chanda,
Kaushik; (US) ; Murarka, Shyam P.;
(US) |
Correspondence
Address: |
TOWNSEND AND TOWNSEND AND CREW, LLP
TWO EMBARCADERO CENTER
EIGHTH FLOOR
SAN FRANCISCO
CA
94111-3834
US
|
Family ID: |
27399315 |
Appl. No.: |
09/976927 |
Filed: |
October 11, 2001 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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60240109 |
Oct 12, 2000 |
|
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60244160 |
Oct 27, 2000 |
|
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Current U.S.
Class: |
257/40 ;
257/E21.26; 257/E21.576; 257/E23.161 |
Current CPC
Class: |
H01L 21/02126 20130101;
B82Y 10/00 20130101; H01L 2924/0002 20130101; B82Y 30/00 20130101;
H01L 23/53238 20130101; H01L 21/3121 20130101; H01L 21/76831
20130101; H01L 23/53295 20130101; H01L 23/53228 20130101; H01L
21/02282 20130101; H01L 21/76834 20130101; H01L 2924/0002 20130101;
H01L 2924/00 20130101 |
Class at
Publication: |
257/40 |
International
Class: |
H01L 035/24 |
Claims
What is claimed is:
1. A method for forming a diffusion barrier layer comprising the
steps of: a) preparing a silicon substrate; b) contacting the
silicon substrate with a composition comprising self-assembled
monolayer subunits and a solvent; and, c) removing the solvent
thereby forming the diffusion barrier.
2. The method according to claim 1, wherein the self-assembled
monolayer subunit is of the following structure: 9wherein Y is an
O-alkyl group, and wherein R.sup.2 is an alkyl group, heteroalkyl
group, aryl group or heteroaryl group.
3. The method according to claim 1, wherein the self-assembled
monolayer subunit is of the following structure: 10wherein Y is a
halogen, and wherein R.sup.2 is an alkyl group, heteroalkyl group,
aryl group or heteroaryl group.
4. The method according to claim 1, wherein the silicon substrate
preparation comprises the formation of a silicon oxide surface.
5. The method according to claim 1, wherein the method further
comprises the step of heating the silicon substrate and the
composition during contact.
6. The method according to claim 2, wherein R.sup.2 is an alkyl
group of the following structure: 11wherein R.sup.3, R.sup.4 and
R.sup.5 are independently selected from the group consisting of
hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH.sub.2,
NHR.sup.6, NR.sup.6R.sup.7, OH, OR.sup.6, SH, SR.sup.6, CHO, COOH
and CN, and wherein R.sup.6 and R.sup.7 are alkyl groups, and
wherein n is an integer ranging from 1 to 5.
7. The method according to claim 2, wherein R.sup.2 is an alkyl
group of the following structure: 12wherein R.sup.3 and R.sup.4 are
independently selected from the group consisting of hydrogen, alkyl
groups, heteroalkyl groups, halo groups, NH.sub.2, NHR.sup.6,
NR.sup.6R.sup.7, OH, OR.sup.6, SH, SR.sup.6, CHO, COOH and CN, and
wherein R.sup.6 and R.sup.7 are alkyl groups, and wherein n is an
integer ranging from 1 to 5.
8. The method according to claim 6, wherein Y is OCH.sub.3.
9. The method according to claim 7, wherein Y is OCH.sub.3.
10. The method according to claim 8, wherein R.sup.3, R.sup.4 and
R.sup.5 are hydrogen and n is 2.
11. The method according to claim 9, wherein R.sup.2 is an alkyl
group of the following structure: 13and wherein R.sup.3 and R.sup.4
are hydrogen and n is 2.
12. A diffusion barrier layer in an integrated circuit, wherein the
diffusion barrier comprises a self-assembled monolayer.
13. The diffusion barrier according to claim 12, wherein the
self-assembled monolayer comprises subunits, and wherein the
subunits are of the following structure: 14wherein R.sup.2 is an
alkyl group, heteroalkyl group, aryl group or heteroaryl group.
14. The diffusion barrier according to claim 13, wherein R.sup.2 is
an alkyl group of the following structure: 15wherein R.sup.3,
R.sup.4 and R.sup.5 are independently selected from the group
consisting of hydrogen, alkyl groups, heteroalkyl groups, halo
groups, NH.sub.2, NHR.sup.6, NR.sup.6R.sup.7, OH, OR.sup.6, SH,
SR.sup.6, CHO, COOH and CN, and wherein R.sup.6 and R.sup.7 are
alkyl groups, and wherein n is an integer ranging from 1 to 5.
15. The diffusion barrier according to claim 13, wherein R.sup.2 is
an alkyl group of the following structure: 16wherein R.sup.3 and
R.sup.4 are independently selected from the group consisting of
hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH.sub.2,
NHR.sup.6, NR.sup.6R.sup.7, OH, OR.sup.6, SH, SR.sup.6, CHO, COOH
and CN, and wherein R.sup.6 and R.sup.7 are alkyl groups, and
wherein n is an integer ranging from 1 to 5.
16. The diffusion barrier according to claim 14, wherein R.sup.3,
R.sup.4 and R.sup.5 are hydrogen and n is 2.
17. The diffusion barrier according to claim 15, wherein R.sup.2 is
an alkyl group of the following structure: 17and wherein R.sup.3
and R.sup.4 are hydrogen and n is 2.
18. An integrated circuit comprising a silicon substrate, a
diffusion barrier layer and a metal deposited on the diffusion
barrier layer, wherein the diffusion barrier is covalently attached
to the silicon substrate, and wherein the diffusion barrier is a
self-assembled monolayer.
19. The integrated circuit according to claim 18, wherein the
self-assembled monolayer comprises subunits of the following
structure: 18wherein R.sup.2 is an alkyl group, heteroalkyl group,
aryl group or heteroaryl group.
20. The integrated circuit according to claim 19, wherein R.sup.2
is an alkyl group of the following structure: 19wherein R.sup.3,
R.sup.4 and R.sup.5 are independently selected from the group
consisting of hydrogen, alkyl groups, heteroalkyl groups, halo
groups, NH.sub.2, NHR.sup.6, NR.sup.6R.sup.7, OH, OR.sup.6, SH,
SR.sup.6, CHO, COOH and CN, and wherein R.sup.6 and R.sup.7 are
alkyl groups, and wherein n is an integer ranging from 1 to 5.
21. The integrated circuit according to claim 19, wherein R.sup.2
is an alkyl group of the following structure: 20wherein R.sup.3 and
R.sup.4 are independently selected from the group consisting of
hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH.sub.2,
NHR.sup.6, NR.sup.6R.sup.7, OH, OR.sup.6, SH, SR.sup.6, CHO, COOH
and CN, and wherein R.sup.6 and R.sup.7 are alkyl groups, and
wherein n is an integer ranging from 1 to 5.
22. The integrated circuit according to claim 20, wherein R.sup.3,
R.sup.4 and R.sup.5 are hydrogen and n is 2.
23. The integrated circuit according to claim 21, wherein R.sup.2
is an alkyl group of the following structure: 21and wherein R.sup.4
are hydrogen and n is 2.
Description
RELATED CASES
[0001] This application is related to and claims priority to
provisional Applications Nos. 60/240,109 entitled Diffusion
Barriers Comprising A Self-Assembled Monolayer naming G. Ramanath,
Ahila Krishnamoorthy, Kaushik Chanda and Shyam P. Murarka as
inventors and filed Oct. 12, 2000 and 60/244,160 entitled Diffusion
Barriers Comprising A Self-Assembled Monolayer naming G. Ramanath,
Ahila Krishnamoorthy, Kaushik Chanda and Shyam P. Murarka as
inventors and filed Oct. 27, 2000. These applications are
incorporated herein for all purposes as if set forth herein in
full.
STATEMENT AS TO RIGHTS TO INVENTIONS MADE UNDER FEDERALLY SPONSORED
RESEARCH OR DEVELOPMENT
[0002] NOT APPLICABLE
REFERENCE TO A "SEQUENCE LISTING," A TABLE, OR A COMPUTER PROGRAM
LISTING APPENDIX SUBMITTED ON A COMPACT DISK
[0003] NOT APPLICABLE
BACKGROUND OF THE INVENTION
[0004] A. Field Of The Invention
[0005] The present invention generally relates to integrated
circuits. In particular, it relates to forming a diffusion barrier
layer comprising a self-assembled monolayer in an integrated
circuit.
[0006] B. Description Of Related Art
[0007] Copper is becoming the metal of choice for forming
conductive patterns in integrated circuits. There are, however,
unresolved issues with its use. For instance, copper diffuses
rapidly in silicon and silicon dioxide. The diffusion, over time,
results in junction linkage, which decreases device efficiency.
[0008] To address the problem of copper diffusion, researchers have
developed "diffusion barriers." A diffusion barrier is part of the
metallization scheme, comprising a layer of material formed between
an overlying copper layer and an underlying silicon or silicon
dioxide layer. The diffusion barrier serves to inhibit the
diffusion of copper into the surrounding layer.
[0009] The use of amorphous alloys as diffusion layers has been
discussed. Amorphous binary silicides, such as molybdenum-,
tantalum and tungsten silicide and amorphous ternary alloys (e.g.,
Ti--Si--N) have been reported as diffusion barriers. The formation
of these layers uses sophisticated processes, such as sputtering
and/or chemical vapor deposition, or their variants. This results
in the inclusion of substantial contaminants and residual stresses.
Perhaps more importantly, these films have poor continuity and
uniformity in non-planar structures.
[0010] Diffusion barriers made of TiN, TiSiN and TiN/TiSiN have
also been reported. Many of the processes to form these layers
involve treatments such as nitridation, oxidation, and
post-deposition annealing.
[0011] While a number of diffusion barriers have been discussed in
the art, improved diffusion barriers are desirable, especially
those that are very thin and continuous.
SUMMARY OF THE INVENTION
[0012] The present invention provides a method for forming a
diffusion barrier layer. The method involves the following steps:
1) preparing a silicon substrate; 2) contacting the prepared
silicon substrate with a composition comprising self-assembled
monolayer subunits and a solvent; and, 3) removing the solvent.
[0013] The present invention also provides a diffusion barrier in
an integrated circuit. The diffusion barrier includes a
self-assembled monolayer.
[0014] The present invention further provides an integrated circuit
with a multilevel metallization scheme. The integrated circuit
includes a silicon substrate, a diffusion barrier layer and a metal
deposited on the diffusion barrier layer. The diffusion barrier
layer is covalently attached to the silicon substrate and includes
a self-assembled monolayer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0015] FIG. 1 shows a cross-sectional view of an MOS test structure
comprising a self-assembled monolayer diffusion barrier layer.
[0016] FIG. 2 shows a bar graph representing bias temperature
testing of five different test structures.
[0017] FIG. 3 shows a cross-sectional view of a two-level
integrated circuit comprising a self-assembled monolayer diffusion
barrier layer.
DESCRIPTION OF THE SPECIFIC EMBODIMENTS
[0018] A. Introduction
[0019] The present invention provides a diffusion barrier in an
integrated circuit, a method for forming the diffusion barrier and
an integrated circuit containing the diffusion barrier. The
diffusion barrier includes a self-assembled monolayer. Formation of
the monolayer is typically done on the surface of a silicon
substrate by contacting the substrate with monolayer subunits. The
silicon substrate is represented by the formula SiO.sub.AX.sub.B,
wherein A and B are .gtoreq.0, and X is N, C, B, F, P or As. In
particular, in addition to subscript A assuming particular values
of 0, 1, and 2, fractional compositions are also envisioned and
included. The value of subscript B is dependent upon the element X.
The combination of silicon substrate and self-assembled monolayer
serves as an integrated circuit element.
[0020] B. Composition Of Barrier Layer
[0021] The diffusion barrier layer includes a self-assembled
monolayer. As the term is applied to the present invention, a
"self-assembled monolayer" is a single layer of molecules that
forms on a substrate surface when monolayer subunits are contacted
with the surface under appropriate reaction conditions. The
subunits are attached to the substrate at a first end; the second
end of the molecule projects upward from the substrate surface. As
surface sites on the surface are reacted with monolayer subunits,
the single molecular layer is formed.
[0022] The subunits of the self-assembled monolayer are preferably
attached to the substrate through a covalent bond. Typically, the
substrate has reactive moieties extending from its surface (e.g.,
O, OH, NH.sub.2, SH). The reactive moieties provide a point of
covalent attachment to the subunit. For instance, SiO.sub.2 is a
typical substrate for monolayer formation. The hydroxylated
SiO.sub.2 surface provides OH groups that can covalently bind to
substrates containing certain types of functional groups.
[0023] The first end of the self-assembled monolayer subunit
typically includes a silicon atom to which three displaceable
groups are attached. The second end typically includes a chemical
group primarily composed of carbon. A preferred subunit is shown
below (1): 1
[0024] Y is typically an O-alkyl group (e.g., OCH.sub.3 or
OC.sub.2H.sub.5) but can also be other displaceable groups such as
Cl. R.sup.2 is an alkyl group, heteroalkyl group, aryl group or
heteroaryl group.
[0025] "Alkyl group" refers to a straight-chain, branched or cyclic
group containing a carbon backbone and hydrogen. Examples of
straight-chain alkyl groups include methyl, ethyl, propyl, butyl,
pentyl and hexyl. Examples of branched alkyl groups include
i-propyl, sec-butyl and t-butyl. Examples of cyclic alkyl groups
include cyclobutyl, cyclopentyl and cyclohexyl.
[0026] Alkyl groups are substituted or unsubstituted. In a
substituted alkyl group, a hydrogen on the carbon backbone is
replaced by a different type of atom (e.g., oxygen, nitrogen,
sulfur, halogen). For instance, 2-hydroxyethyl is an ethyl group
where one of the hydrogens is replaced by an OH group;
2-chloropropyl is a propyl group where one of the hydrogens is
replaced by a Cl group.
[0027] "Heteroalkyl group" refers to a straight-chain, branched or
cyclic group containing a carbon-heteroatom backbone and hydrogen.
Heteroatoms include, without limitation, oxygen, nitrogen and
sulfur. Methyl ethylether (i.e., CH.sub.2OCH.sub.2CH.sub.3) is an
example of a straight-chain heteroalkyl group. As with alkyl
groups, heteroalkyl groups are substituted or unsubstituted.
[0028] "Aryl group" refers to a carbocyclic aromatic group
containing six carbon atoms (e.g., phenyl) or a carbocyclic
aromatic group containing ten carbon atoms (e.g., naphthyl). An
aryl group is substituted or unsubstituted. A substituted aryl
group is one where at least one hydrogen atom of an aryl group has
been replaced with a different type of atom (e.g., oxygen,
nitrogen, sulfur, halogen). Examples of substituted aryl groups
include the following: 2-chlorophenyl; 3-methylphenyl; and, 4
methoxyphenyl.
[0029] "Heteroaryl group" refers to an aromatic group containing
both carbon atoms and heteroatoms. Examples of heteroaryl groups
include pyridyl, furyl, pyrrolyl and imidazolyl. As with aryl
groups, heteroaryl groups are substituted or unsubstituted.
2-Chloropyridyl is an example of a substituted heteroaryl
group.
[0030] In one embodiment, the subunit is as shown in structure 2
(R.sup.2 in structure 1 is a straight-chain alkyl): 2
[0031] wherein R.sup.1 is a straight-chain alkyl group and n is an
integer.gtoreq.1. Preferably n is an integer ranging from 1 to 5.
Preferably, R.sup.1 is methyl and n is 2.
[0032] In another embodiment, the subunit is as shown in structure
3 (R.sup.2 in structure 1 is a substituted straight-chain alkyl):
3
[0033] wherein R.sup.1 is a straight-chain alkyl group, n is an
integer.gtoreq.1 and R.sup.3, R.sup.4 and R.sup.5 are independently
selected from the group consisting of hydrogen, alkyl groups,
heteroalkyl groups, Br, Cl, F, I, NH.sub.2,
NHR.sup.6NR.sup.6R.sup.7, OH, OR.sup.6, SH, SR.sup.6, CHO, COOH and
CN. R.sup.6 and R.sup.7 are alkyl groups or aryl groups.
Preferably, n is an integer ranging from 1 to 5. Preferably,
R.sup.1 is methyl, R.sup.3, R.sup.4 and R.sup.5 are hydrogen and n
is 2.
[0034] In another embodiment, the subunit is shown in structure 4
(R.sup.2 in structure 1 is a substituted straight-chain alkyl):
4
[0035] wherein R.sup.1 is a straight-chain alkyl group, n is an
integer.gtoreq.1 and R.sup.3 and R.sup.4 are independently selected
from the group consisting of hydrogen, alkyl groups, heteroalkyl
groups, Br, Cl, F, I, NH.sub.2, NHR.sup.6, NR.sup.6R.sup.7, OH,
OR.sup.6, SH, SR.sup.6, CHO, COOH and CN. R.sup.6 and R.sup.7 are
alkyl groups or aryl groups. Preferably n is an integer ranging
from 1 to 5. Preferably, R.sup.1 is methyl, R.sup.3, R.sup.4 and
R.sup.5 are hydrogen and n is 2.
[0036] A preferred subunit of structure 4 is compound 5, shown
below: 5
[0037] In another embodiment, the subunit is shown in structure 6
(R.sup.2 in structure 1 is an aryl): 6
[0038] wherein R.sup.1 is a straight-chain alkyl group, and
R.sup.3, R.sup.4 and R.sup.5 are independently selected from the
group consisting of hydrogen, alkyl groups, heteroalkyl groups, Br,
Cl, F, I, NH.sub.2, NHR.sup.6, NR.sup.6R.sup.7, OH, OR.sup.6, SH,
SR.sup.6, CHO, COOH and CN. R.sup.6 and R.sup.7 are alkyl groups or
aryl groups.
[0039] C. Process For Forming Barrier Layer
[0040] To form the self-assembled monolayer on the surface of a
substrate, a substrate is first prepared. The substrate is
typically cleaned, washed and dried. Contact of the prepared
substrate with monolayer subunits in a suitable solvent and under
appropriate reaction conditions attaches the subunits to the
surface. Removal of the solvent provides the desired layer on the
substrate.
[0041] In one embodiment, the substrate is a silicon wafer that has
been oxidized to form an SiO.sub.2 surface layer. The layer is
typically cleaned using an organic solvent (e.g., xylene) or a
series of organic solvents followed by a water wash. The wet wafer
is dried, for example, by blow-drying it with N.sub.2. Immersion of
the dry wafer in an organic solvent (e.g., toluene) containing
self-assembled monolayer subunits followed by heating the solution
attaches subunits to the SiO.sub.2 surface. The reacted substrate
is washed with an organic solvent (e.g., toluene) and dried (e.g.,
blown dry with N.sub.2).
[0042] D. Barrier Layer As Part Of Device
[0043] The present invention provides an integrated circuit
comprising a self-assembled monolayer diffusion barrier. FIG. 1
shows an MOS test structure containing a self-assembled monolayer
barrier layer. The MOS test structure contains the following
elements: a silicon layer (1); a silicon dioxide layer (2) on the
top side of the silicon layer; an aluminum back contact (3) on the
bottom side of the silicon layer; a diffusion barrier (4)
comprising a self-assembled monolayer; and, copper dots (5)
deposited on the diffusion barrier. FIG. 3 shows a cross-sectional
view of a two-level integrated circuit comprising a self-assembled
monolayer diffusion barrier layer. The illustrated integrated
circuit contains the following elements: a copper layer (6); a
self-assembled monolayer diffusion barrier layer (7) that surrounds
the copper layer; and, a silicon substrate (8) that includes the
copper and diffusion barrier layers.
[0044] The self-assembled monolayer in the integrated circuit is
composed of subunits. Where the subunits are covalently attached to
a substrate surface, one representation of such a subunit is shown
below (7, wavy lines represent covalent attachment to the
substrate): 7
[0045] wherein R.sup.2 is an alkyl group, heteroalkyl group, aryl
group or heteroaryl group.
[0046] E. Metals Deposited On Diffusion Barrier
[0047] The diffusion barrier of the present invention serves to
inhibit the diffusion of a deposited metal on the surface of the
self-assembled monolayer through to the substrate underneath the
monolayer. The barrier inhibits the diffusion of a variety of
metals.
[0048] In a preferred embodiment, the barrier inhibits the
diffusion of copper.
F. EXAMPLES
[0049] 1. Preparation Of An MOS Test Structure.
[0050] A (100) oriented, B-doped, 5" diameter p-Si wafer was taken.
It was RCA cleaned and oxidized in an ambient of dry O.sub.2 at
900.degree. C. to grow an oxide of 100 nm thickness. The back oxide
was completely removed using buffered HF and a 0.3-0.4 .mu.m-thick
aluminum layer was sputter deposited to form a back contact. The
resulting wafer was vacuum annealed at 400.degree. C. for 30
minutes.
[0051] The vacuum annealed wafer was respectively cleaned in
xylene, acetone and isopropyl alcohol followed by a thorough
deionized water wash. The washed wafers were blown dry with N.sub.2
and immersed in a 1% (by volume) solution of organosilane (i.e.,
self-assembled monolayer subunit) in toluene. The following
subunits (purchased from Gelest Inc. of Tullytown, Pennsylvania)
were used in the process: 8
[0052] The wafer in the solution was heated from room temperature
to 60.degree. C. over 1 hour. The wafer was washed with toluene,
blown dry with N.sub.2 and baked on a heating plate for about 4
minutes at 12.degree. C.
[0053] Copper dots of 1 mm diameter and 1.2 .mu.m thickness were
sputter deposited on the wafer monolayer, completing the
preparation of the MOS test structure.
[0054] 2. Bias Temperature Testing Of MOS Test Structures
[0055] Test structures prepared according to Example 1 were
subjected to electrical testing. A control structure (no diffusion
barrier) and four different structures comprising self-assembled
monolayer diffusion barriers (diffusion barrier comprising subunits
5, 8, 9 and 10 respectively) were biased at 2 MV/cm and 200.degree.
C. for 30 minutes in nitrogen ambient. Failure of each respective
specimen was recorded. FIG. 2 shows a bar graph representing
several trials of each of the 5 structures and the failure time in
minutes for each respective structure.
* * * * *