U.S. patent application number 09/394860 was filed with the patent office on 2002-02-21 for method of constructing an electronic assembly having an indium thermal couple and an electronic assembly having an indium thermal couple.
Invention is credited to CHURILLA, PAUL W., DISHONGH, TERRANCE J., PULLEN, DAVID H..
Application Number | 20020020912 09/394860 |
Document ID | / |
Family ID | 23560692 |
Filed Date | 2002-02-21 |
United States Patent
Application |
20020020912 |
Kind Code |
A1 |
DISHONGH, TERRANCE J. ; et
al. |
February 21, 2002 |
METHOD OF CONSTRUCTING AN ELECTRONIC ASSEMBLY HAVING AN INDIUM
THERMAL COUPLE AND AN ELECTRONIC ASSEMBLY HAVING AN INDIUM THERMAL
COUPLE
Abstract
According to one aspect of the invention a method of
constructing an electronic assembly is provided. The electronic
assembly is constructed from a semiconductor package including a
package substrate and a semiconductor chip mounted to the package
substrate, a thermally conductive member, and a substance including
indium. The method comprises securing the thermally conductive
member and the semiconductor package in a selected orientation
relative to one another with the thermally conductive member on a
side of the semiconductor chip opposing the package substrate and
with the substance located between the semiconductor chip and at
least a portion of the thermally conductive member. The substance
is thermally coupled to the semiconductor chip on one side and
thermally coupled to the portion of the thermally conductive member
on an opposing side.
Inventors: |
DISHONGH, TERRANCE J.;
(HILLSBORO, OR) ; CHURILLA, PAUL W.; (PORTLAND,
OR) ; PULLEN, DAVID H.; (PORTLAND, OR) |
Correspondence
Address: |
STEPHEN M DE KLERK
BLAKELY SOKOLOFF TAYLOR 7 ZAFMAN LLP
12400 WILSHIRE BOULEVARD
7TH FLOOR
LOS ANGELES
CA
90025
|
Family ID: |
23560692 |
Appl. No.: |
09/394860 |
Filed: |
September 13, 1999 |
Current U.S.
Class: |
257/712 ;
257/706; 257/713; 257/719; 257/720; 257/E21.499; 257/E23.09;
257/E23.109; 438/106; 438/121; 438/122 |
Current CPC
Class: |
H01L 23/3736 20130101;
H01L 21/50 20130101; H01L 23/433 20130101; H01L 2224/16 20130101;
H01L 2924/16152 20130101; H01L 2924/15311 20130101 |
Class at
Publication: |
257/712 ;
257/719; 257/720; 257/706; 257/713; 438/106; 438/121; 438/122 |
International
Class: |
H01L 021/44; H01L
021/48; H01L 021/50; H01L 023/02; H01L 023/34; H01L 023/10 |
Claims
What is claimed:
1. A method of constructing an electronic assembly from: (i) a
semiconductor package including a package substrate and a
semiconductor chip, having an integrated circuit formed thereon,
mounted to the package substrate; (ii) a thermally conductive
member; and (iii) a substance including indium, the method
comprising: securing the thermally conductive member and the
semiconductor package in a selected orientation relative to one
another so that at least a portion of the member is located on a
side of the semiconductor chip opposing the package substrate and
the substance is located between the semiconductor chip and the
portion of the member, the substance providing a thermal couple
between the semiconductor chip and the portion of the member.
2. A method according to claim 1, wherein the substance contacts
the semiconductor chip on one side of the substance.
3. A method according to claim 2, wherein the substance contacts
the portion of the member on an opposing side of the substance.
4. A method according to claim 1, wherein the substance is a
thermally conductive alloy which is electrically insulative so as
to be capable of contacting two parts of the semiconductor package
without causing a short between the two parts.
5. A method according to claim 1, further comprising: heating the
substance while the substance is in close proximity to the
semiconductor die, the substance being heated to a temperature
above its melting point.
6. A method according to claim 5, wherein the substance has a
melting point below 150.degree. C. and is heated to above its
melting point but below a temperature which causes destruction of
the integrated circuit.
7. A method according to claim 1, wherein the member is a lid
having a recess and the substance is a first sheet of material that
is located in the recess, the method further comprising: heating
the first sheet in the recess to cause it to melt.
8. A method according to claim 7, wherein the lid is of a thermally
conductive material that reacts with the alloy when the alloy is
heated to cause it to melt, reaction between the alloy and the
material of the lid resulting in voids within the alloy, the method
further comprising: removing at least some of the voids from a
portion of the substance, the portion of the substance being
located between the semiconductor chip and the portion of the lid
when the lid and the semiconductor package are located in the
selected orientation.
9. A method according to claim 8, wherein the alloy when reacting
with the material of the lid causes fewer voids than voids created
by pure indium when reacting with the material of the lid.
10. A method according to claim 8, wherein the thermally conductive
material of the lid is copper.
11. A method according to claim 8, wherein the voids are massaged
out of the portion of the substance.
12. A method according to claim 11, wherein the voids are massaged
out by a jet of fluid that creates a force which moves the voids
out of the portion of the substance.
13. A method according to claim 12, further comprising: locating a
second sheet of material over the substance; and heating the
substance to a temperature above its melting point to cause melting
of the substance but below the melting point of the second sheet of
material so that the second sheet of material remains intact while
the substance is melted, the jet of fluid impinging on the second
sheet and the second sheet preventing splattering of the melted
substance by the jet of fluid.
14. A method according to claim 13, wherein the material of the
second sheet includes indium.
15. A method according to claim 13, further comprising: cooling the
substance after the voids are massaged out, the substance being
cooled to a temperature below its melting point; locating the
substance next to the semiconductor chip; and heating the substance
to above its melting point to cause reflow of the substance over
the semiconductor chip.
16. A method according to claim 15, further comprising: locating a
third sheet, which includes indium, over the semiconductor chip,
the third sheet and the substance being simultaneously heated to
above their melting points, the third sheet acting as a wetting
layer for ensuring proper thermal coupling to the semiconductor
chip.
17. A method of constructing an electronic assembly from: (i) a
semiconductor package including a package substrate and a
semiconductor chip, having an integrated circuit formed thereon,
mounted to the package substrate; (ii) a lid of a thermally
conductive material, the lid having a recess; and (iii) a first
sheet of a first alloy, the method comprising: locating the first
sheet in the recess; heating the first sheet to above its melting
point to cause softening of the first alloy, the first alloy
reacting with the material of the lid to cause voids within the
first alloy; locating a second sheet of material on the first
alloy, the second sheet of material including indium and having a
higher melting point than the first alloy; directing a jet of fluid
onto the second sheet while the second sheet and the first alloy
are at a temperature between the melting point of the first alloy
and the melting point of the second sheet, the second sheet
preventing splattering of the first alloy by the jet of fluid, the
jet of fluid massaging the voids out of at least a portion of the
first alloy; locating the lid and the semiconductor package in a
selected orientation wherein the semiconductor chip is next to the
recess; and heating the second sheet and the first alloy to a
temperature above the melting point of the second sheet to cause
reflow of the second sheet and the first alloy over the
semiconductor chip, the material of the second sheet and the first
alloy providing a thermal couple between the lid and the
semiconductor chip, with the portion of the first alloy located
between the semiconductor chip and the lid, the first alloy being
electrically insulative so as to be capable of contacting two parts
of the semiconductor package without causing a short between the
two parts.
18. The method of claim 17 wherein the alloy includes indium.
19. An electronic assembly comprising: a package substrate; a
semiconductor chip mounted to the package; a thermally conductive
member located on a side of the semiconductor chip opposing the
package substrate; and a substance, including a metal, between the
semiconductor chip and the thermally conductive member, the
substance contacting the semiconductor chip on one side and
contacting the thermally conductive member on an opposing side so
as to thermally couple the semiconductor chip to the thermally
conductive member.
20. An electronic assembly according to claim 19, wherein the
substance is electrically insulative so as to be capable of
contacting two parts of the semiconductor package without causing a
short between the two parts.
21. An electronic assembly according to claim 20 wherein the metal
is indium.
Description
BACKGROUND OF THE INVENTION
[0001] 1). Field of the Invention
[0002] This invention relates to a method of constructing an
electronic assembly and to an electronic assembly which may be made
according to the method of the invention.
[0003] 2). Discussion of Related Art
[0004] Integrated circuits are formed on semiconductor wafers. The
wafers are then sawed into semiconductor chips. Each semiconductor
chip is then mounted to a package substrate. An integrated circuit
within the semiconductor chip can be powered up and data signals
can be sent to and received from the integrated circuit via the
package substrate.
[0005] When the integrated circuit is powered up, heat is generated
on the semiconductor chip which could cause destruction of the
integrated circuit if the heat is not transferred away. A thermally
conductive plate is often located next to the semiconductor chip. A
thermally conductive grease may be located between the
semiconductor chip and the thermally conductive plate. The
thermally conductive grease contacts the semiconductor chip and the
thermally conductive plate on opposing sides and acts as a thermal
couple between the semiconductor chip and the thermally conductive
plate. Heat can then be transferred from the semiconductor chip
through the grease to the thermally conductive plate, from where
heat can be transferred to a heat sink or other device and be
convected into the ambient.
[0006] The use of a grease as a thermal couple is often unsuitable
for high power applications. A thermally conductive grease does not
transfer a sufficient amount of heat when a large amount of heat is
generated on a semiconductor chip. One reason why a thermally
conductive grease is not a good conductor of heat is because there
are no metals in a thermally conductive grease. Metals, on the
other hand, are usually also electrically conductive. The use of a
metal as a thermal couple is therefore usually avoided because an
electrically conductive metal may cause shorting between components
of the semiconductor chip or the package substrate.
SUMMARY OF THE INVENTION
[0007] According to one aspect of the invention a method of
constructing an electronic assembly is provided. The electronic
assembly is constructed from a semiconductor package including a
package substrate and a semiconductor chip mounted to the package
substrate, a thermally conductive member, and a substance including
indium. The method comprises securing the thermally conductive
member and the semiconductor package in a selected orientation
relative to one another with the thermally conductive member on a
side of the semiconductor chip opposing the package substrate and
with the substance located between the semiconductor chip and at
least a portion of the thermally conductive member. The substance
is thermally coupled to the semiconductor chip on one side and
thermally coupled to the portion of the thermally conductive member
on an opposing side.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] The invention is further described by way of example with
reference to the accompanying drawings wherein:
[0009] FIG. 1 is a sectioned side view of a lid which is used in
constructing an electronic assembly according to an embodiment of
the invention;
[0010] FIG. 2 is a sectioned side view of the lid after a first
sheet of a first alloy is inserted into a recess of the lid;
[0011] FIG. 3 is a sectioned side view after the first sheet is
heated to cause melting of the first alloy;
[0012] FIG. 4 is a sectioned side view of the lid after the first
alloy is solidified;
[0013] FIG. 5 is a sectioned side view of the lid, further showing
a second sheet that is located within the recess;
[0014] FIG. 6 is a sectioned side view illustrating how the
combination of FIG. 5 is heated and how voids in the first alloy
are massaged out;
[0015] FIG. 7 is a sectioned side view of the lid, the first alloy,
and the first sheet after being cooled;
[0016] FIG. 8 is a sectioned side view of components of an
electronic assembly including the lid, the first alloy, the second
sheet, and further including a semiconductor package having a
package substrate and a semiconductor chip, and further including a
third sheet of a second alloy;
[0017] FIG. 9 is a sectioned side view of the components of FIG. 8
after the second sheet is located on the third sheet;
[0018] FIG. 10 is a sectioned side view of the components of FIG. 9
after the first alloy, the second sheet, and the third sheet are
heated to cause melting thereof into a mixture; and
[0019] FIG. 11 is a sectioned side view of the components of FIG.
10 after cool down and solidification of the mixture.
DETAILED DESCRIPTION OF THE INVENTION
[0020] FIG. 1 to FIG. 11 of the accompanying drawings illustrate a
method of constructing an electronic assembly. An indium containing
alloy is located within a recess within a lid. The indium
containing alloy is then heated which causes undesirable voids to
form therein due to reaction between the alloy and the material of
the lid. The voids are massaged out by heating the alloy and
directing a jet of air onto the alloy. A sheet of indium, having a
higher melting temperature than the alloy, is used to prevent
splattering of the alloy when the jet of air impinges thereon. The
cap and the alloy are then assembled together with a semiconductor
package in an electronic assembly. The alloy, primarily because of
the use of indium, has good thermal conductivity. The alloy is an
electric insulator which ensures that components of the
semiconductor package are electrically isolated from one another.
The alloy does not break through into the material of a package
substrate of the semiconductor package. The alloy also has a
relatively low melting temperature which makes it possible to melt
the alloy without causing destruction of an integrated circuit in a
semiconductor chip of the semiconductor package. Regardless thereof
that the alloy causes voids when being heated, the voids are
massaged away from a heat conducting portion of the alloy.
[0021] FIG. 1 of the accompanying drawings illustrates a thermally
conductive lid 10 which is used in constructing an electronic
assembly according to the invention. The lid 10 may be made of a
material such as copper having good thermal conductivity. The lid
10 includes a central portion 12 and four sidewalls 14. A recess 16
is defined above the central portion 12 within the sidewalls
14.
[0022] The lid 10 is cleaned and then, as shown in FIG. 2, a first
sheet 18 of a first alloy is inserted into the recess 16. The first
sheet 18 is sized to fit between the sidewalls 14 and almost fills
the recess 16. The first alloy preferably includes mass ratios of
44.7% bismuth, 22.6% lead, 19.1% indium, 8.3% tin, and 5.3%
cadmium. A sheet of an alloy of this kind can be obtained from
Indium Corporation of America in Utica, N.Y. The choice and
characteristics of such an alloy will be evident from the
description that follows.
[0023] The lid 10 and the first sheet 18 are then heated to above
the melting temperature of about 115.degree. C. of the first alloy
to cause melting of the first alloy 18 as shown in FIG. 3. The
indium in the first alloy 18 reacts with the copper of the lid 10
to cause bubbles or voids 20 within the first alloy 18. Voids
within the first alloy 18 are undesirable for heat conduction
purposes. The number of voids 20 are however much fewer than when
pure indium is used instead of the alloy 18.
[0024] The first alloy 18 is then allowed to cool to cause
solidification thereof as shown in FIG. 4. The voids 20 are then
trapped within the solidified first alloy 18.
[0025] As shown in FIG. 5, a second sheet 22 is then located on top
of the second alloy 18. The second sheet 22 is typically about 2 mm
thick and is preferably made of pure indium. The second sheet 22 is
located up to a rim 24 of the lid 10.
[0026] As shown in FIG. 6, infrared radiation 26 is then used to
heat the lid 10 from below. Heat is transferred from the lid 10 to
the first alloy 18. The combination of the lid 10, the first alloy,
and the second sheet 22 is heated to a temperature which is above
the melting temperature of 115.degree. C. of the first alloy 18.
The substantially pure indium of the second sheet 22 has a melting
point of about 135.degree. C. The combination of the cap 10, the
first alloy 18, and the second sheet 22 is heated to a temperature
which is below the 135.degree. C. melting point of the second sheet
22. The first alloy 18 is thereby melted but the second sheet 22
remains solid. The lower melting point of the first alloy 18, when
compared to the substantially pure indium of the second sheet 22,
is primarily due to the inclusion of the lead within the first
alloy 18. The lead is preferably present between 0.5% and 30% by
mass.
[0027] A nozzle 28 is used to direct a jet of air 30 onto a central
portion of the second sheet 22. The jet of air 30 impinges at
substantially right angles onto the second sheet 22 and spreads
from a central portion of the second sheet 22 outwardly. Because of
deflection of the jet of air 30, a force is created on the second
sheet 22 from where the force transferred to the first alloy 18.
The force created by the air massages the voids 20 outwardly away
from a central portion 32 of the first alloy 18. Most of the voids
20 escape from between an interface between the rim 24 and an edge
of the second sheet 22. Some voids 20 may still remain in outer
portions of the first alloy 18. The central portion 32 of the first
alloy 18 is however substantially or completely free of voids. The
first alloy 18 is then allowed to cool to cause solidification
thereof as shown in FIG. 7. Some voids 20 may be located in outer
regions of the solidified first alloy 18. The second sheet 22 is
located on the solidified second alloy 18.
[0028] FIG. 8 illustrates the cap 10, including the first alloy 18
and the second sheet 22 which is inverted, and a semiconductor
package 34 which is also used for constructing an electronic
assembly according to an embodiment of the invention. The
semiconductor package includes a package substrate 38 and a
semiconductor chip 40.
[0029] The package substrate 38 is at least partially made of an
dielectric material. The dielectric material may for example be a
resin such as bismateinite triazine resin which forms a surface
thereof. An array of solder balls in the form of a ball grid array
42 is located on a lower surface of the package substrate 38.
[0030] The semiconductor chip 40 is typically made of a
semiconductor material such as silicon and has an integrated
circuit (not shown) formed therein. An array of solder bumps 44 are
formed on an upper surface of the semiconductor chip 40 containing
the integrated circuit and the semiconductor chip 40 is then
flipped as shown in FIG. 8 so that the solder bumps 44 are at the
bottom according to a process commonly referred to as "controlled
collapse chip connect" (C4). The semiconductor chip 40 is located
on an upper surface of the package substrate 38 with the solder
bumps 44 located between the package substrate 38 and the
semiconductor chip 40. The semiconductor package 34 is then heated
and allowed to cool, thereby causing attachment of the other bumps
44 to the package substrate 38.
[0031] A third sheet 50 of a second alloy is located over the
semiconductor chip 40. The composition of the second alloy of the
third sheet 50 may be the same as the composition of the first
alloy 18.
[0032] As shown in FIG. 9, a lower surface the second sheet 22 is
then brought into contact with an upper surface of the third sheet
50 so that the combination of the second sheet 22, the first alloy
18, and the lid 10 rests on the third sheet 50.
[0033] The combination shown in FIG. 9 is then heated to a
temperature above 135.degree. C. The first and second alloys 18 and
50 and the second sheet 26 melt at a temperature above 135.degree.
C. The combination shown in FIG. 9 is never heated to a temperature
above 150.degree. C., so as to avoid destruction of an integrated
circuit in the semiconductor chip 40. When the first and second
alloys 18 and 50 and the second sheet 22 melt, the lid 10 drops
onto the package substrate 38 is shown in FIG. 10. The melted
material of the third sheet 50 acts as a wetting layer to ensure
proper thermal coupling onto an upper surface of the semiconductor
chip 40. A melted mixture 52 of the first and second alloys 18 and
50 and the indium of the second sheet 26 fill an entire area
between the semiconductor chip 40 and the central portion 12 of the
lid 10. The melted mixture 52 is therefore in contact with an upper
surface of the semiconductor chip 40 and a lower surface of the
central portion 12 of the lid 10.
[0034] Because of the choice of the materials of the melted mixture
52, the mixture 52 does not break into the dielectric material of
the package substrate 38 as may happen if another metal is used
instead of the mixture 52.
[0035] The combination as shown in FIG. 10 is then allowed to cool
to cause solidification of the mixture 52 as shown in FIG. 11. An
epoxy bead 54 is then located within a filleted interface between
the lid 10 and the package substrate 38. The epoxy bead 52 secures
the lid 10 to the package substrate 38, thereby finalizing
construction of an electronic assembly 60.
[0036] The mixture 52 provides an efficient thermal coupling
between the semiconductor chip 40 and the lid 10, primarily because
of the use of a metal in the form of indium in the mixture 52. The
indium in the mixture 52 is preferably at least 1% by mass to
provide an efficient thermal couple, although a higher percentage
such as at least 10% is a much better thermal conductor. The
mixture, including the indium, is an electric insulator, so that
components of the semiconductor package 34, for example the solder
bumps 44 or electric traces on the package substrate 38, are
electrically isolated from one another even if the mixture 52
contacts these components. It should be noted that a central
portion 32, through which heat is conducted from the semiconductor
chip 40 to the lid 10, is substantially free of voids, as such
ensuring that there is an efficient heat conduction path between
the semiconductor chip 40 and the lid 10.
[0037] While certain exemplary embodiments have been described and
shown in the accompanying drawings, it is to be understood that
such embodiments are merely illustrative and not restrictive of the
current invention, and that this invention is not restricted to the
specific constructions and arrangements shown and described since
modifications may occur to those ordinarily skilled in the art.
* * * * *