loadpatents
name:-0.22102618217468
name:-0.031339168548584
name:-0.080533981323242
Zbiciak; Joseph Raymond Michael Patent Filings

Zbiciak; Joseph Raymond Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Zbiciak; Joseph Raymond Michael.The latest application filed is for "converting a stream of data using a lookaside buffer".

Company Profile
23.31.41
  • Zbiciak; Joseph Raymond Michael - San Jose CA
  • Zbiciak; Joseph Raymond Michael - Alviso CA
  • Zbiciak; Joseph Raymond Michael - Farmers Branch TX
  • Zbiciak; Joseph Raymond Michael - Arlington TX US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Converting a Stream of Data Using a Lookaside Buffer
App 20220283809 - Zbiciak; Joseph Raymond Michael
2022-09-08
Cache Preload Operations Using Streaming Engine
App 20220244957 - Zbiciak; Joseph Raymond Michael ;   et al.
2022-08-04
Conditional execution specification of instructions using conditional extension slots in the same execute packet in a VLIW processor
Grant 11,397,583 - Anderson , et al. July 26, 2
2022-07-26
Converting a stream of data using a lookaside buffer
Grant 11,347,510 - Zbiciak May 31, 2
2022-05-31
Tracking Debug Events From An Autonomous Module Through A Data Pipeline
App 20220121555 - Zbiciak; Joseph Raymond Michael ;   et al.
2022-04-21
Cache preload operations using streaming engine
Grant 11,307,858 - Zbiciak , et al. April 19, 2
2022-04-19
Logging Pages Accessed From I/O Devices
App 20220004503 - Mukherjee; Shrijeet ;   et al.
2022-01-06
Cache Management Operations Using Streaming Engine
App 20210406014 - Zbiciak; Joseph Raymond Michael ;   et al.
2021-12-30
Logging pages accessed from I/O devices
Grant 11,151,055 - Mukherjee , et al. October 19, 2
2021-10-19
Cache management operations using streaming engine
Grant 11,119,776 - Zbiciak , et al. September 14, 2
2021-09-14
Mechanism To Queue Multiple Streams To Run On Streaming Engine
App 20210224065 - Anderson; Timothy David ;   et al.
2021-07-22
Storage Organization For Transposing A Matrix Using A Streaming Engine
App 20210191720 - Tran; Jonathan (Son) Hung ;   et al.
2021-06-24
Tracking debug events from an autonomous module through a data pipeline
Grant 11,042,468 - Zbiciak , et al. June 22, 2
2021-06-22
Tracking Streaming Engine Vector Predicates To Control Processor Execution
App 20210182210 - Bui; Duc Quang ;   et al.
2021-06-17
Software-hardware Memory Management Modes
App 20210109868 - ANDERSON; Timothy D. ;   et al.
2021-04-15
Mechanism to queue multiple streams to run on streaming engine
Grant 10,963,254 - Anderson , et al. March 30, 2
2021-03-30
Transposing a matrix using a streaming engine
Grant 10,949,206 - Tran , et al. March 16, 2
2021-03-16
Storage organization for transposing a matrix using a streaming engine
Grant 10,942,741 - Tran , et al. March 9, 2
2021-03-09
Tracking streaming engine vector predicates to control processor execution
Grant 10,936,315 - Bui , et al. March 2, 2
2021-03-02
Lookahead Priority Collection To Support Priority Elevation
App 20200401532 - Chachad; Abhijeet Ashok ;   et al.
2020-12-24
Logging Pages Accessed From I/o Devices
App 20200356493 - Mukherjee; Shrijeet Subhabrata ;   et al.
2020-11-12
Converting a Stream of Data Using a Lookaside Buffer
App 20200326941 - Zbiciak; Joseph Raymond Michael
2020-10-15
Vector SIMD VLIW Data Path Architecture
App 20200319881 - Anderson; Timothy David ;   et al.
2020-10-08
Method for Forming Constant Extensions in the Same Execute Packet in a VLIW Processor
App 20200310807 - Anderson; Timothy David ;   et al.
2020-10-01
Cache Management Operations Using Streaming Engine
App 20200285469 - Zbiciak; Joseph Raymond Michael ;   et al.
2020-09-10
Cache Preload Operations Using Streaming Engine
App 20200285470 - Zbiciak; Joseph Raymond Michael ;   et al.
2020-09-10
Lookahead priority collection to support priority elevation
Grant 10,713,180 - Chachad , et al.
2020-07-14
Converting a stream of data using a lookaside buffer
Grant 10,649,775 - Zbiciak
2020-05-12
Tracking Debug Events from an Autonomous Module Through a Data Pipeline
App 20200142806 - Zbiciak; Joseph Raymond Michael ;   et al.
2020-05-07
Vector SIMD VLIW data path architecture
Grant 10,628,156 - Anderson , et al.
2020-04-21
Cache preload operations using streaming engine
Grant 10,606,596 - Zbiciak , et al.
2020-03-31
Cache management operations using streaming engine
Grant 10,599,433 - Zbiciak , et al.
2020-03-24
Conditional Execution Specification Of Instructions Using Conditional Extension Slots In The Same Execute Packet In A Vliw Proce
App 20190391812 - Anderson; Timothy David ;   et al.
2019-12-26
Conditional execution specification of instructions using conditional extension slots in the same execute packet in a VLIW processor
Grant 10,402,199 - Anderson , et al. Sep
2019-09-03
Mechanism to Queue Multiple Streams to Run on Streaming Engine
App 20190196817 - Anderson; Timothy David ;   et al.
2019-06-27
Transposing a Matrix Using a Streaming Engine
App 20190187986 - Tran; Jonathan (Son) Hung ;   et al.
2019-06-20
Storage Organization for Transposing a Matrix Using a Streaming Engine
App 20190187985 - Tran; Jonathan (Son) Hung ;   et al.
2019-06-20
Tracking Streaming Engine Vector Predicates to Control Processor Execution
App 20190155605 - Bui; Duc Quang ;   et al.
2019-05-23
Converting a Stream of Data Using a Lookaside Buffer
App 20190102178 - Zbiciak; Joseph Raymond Michael
2019-04-04
Cache Management Operations Using Streaming Engine
App 20190095204 - Zbiciak; Joseph Raymond Michael ;   et al.
2019-03-28
Cache Preload Operations Using Streaming Engine
App 20190095205 - Zbiciak; Joseph Raymond Michael ;   et al.
2019-03-28
Lookahead Priority Collection to Support Priority Elevation
App 20190004967 - Chachad; Abhijeet Ashok ;   et al.
2019-01-03
Memory Attribute Sharing Between Differing Cache Levels of Multilevel Cache
App 20180129608 - Damodaran; Raguram ;   et al.
2018-05-10
Memory attribute sharing between differing cache levels of multilevel cache
Grant 9,965,395 - Damodaran , et al. May 8, 2
2018-05-08
Conditional Execution Specification Of Instructions Using Conditional Extension Slots In The Same Execute Packet In A Vliw Processor
App 20170115990 - Anderson; Timothy David ;   et al.
2017-04-27
Memory Attribute Sharing Between Differing Cache Levels of Multilevel Cache
App 20170097894 - Damodaran; Raguram ;   et al.
2017-04-06
Memory management unit that applies rules based on privilege identifier
Grant 9,465,753 - Zbiciak , et al. October 11, 2
2016-10-11
Performance and power improvement on DMA writes to level two combined cache/SRAM that is cached in level one data cache and line is valid and dirty
Grant 9,298,643 - Tran , et al. March 29, 2
2016-03-29
Memory attribute sharing between differing cache levels of multilevel cache
Grant 9,183,084 - Damodaran , et al. November 10, 2
2015-11-10
Memory Management Unit That Applies Rules Based on Privilege Identifier
App 20150317259 - Zbiciak; Joseph Raymond Michael ;   et al.
2015-11-05
Performance And Power Improvement On Dma Writes To Level Two Combined Cache/sram That Is Cached In Level One Data Cache And Line Is Valid And Dirty
App 20150269090 - Tran; Jonathan (Son) Hung ;   et al.
2015-09-24
Performance and power improvement on DMA writes to level two combined cache/SRAM that is caused in level one data cache and line is valid and dirty
Grant 9,075,744 - Tran , et al. July 7, 2
2015-07-07
Vector SIMD VLIW Data Path Architecture
App 20150154024 - Anderson; Timothy David ;   et al.
2015-06-04
Method to Extend the Number of Constant Bits Embedded in an Instruction Set
App 20150019845 - Anderson; Timothy David ;   et al.
2015-01-15
Dynamic Management Of Write-miss Buffer To Reduce Write-miss Traffic
App 20150006820 - Bhoria; Naveen ;   et al.
2015-01-01
Robust hamming code implementation for soft error detection, correction, and reporting in a multi-level cache system using dual banking memory scheme
Grant 8,904,260 - Tran , et al. December 2, 2
2014-12-02
Optimizing tag forwarding in a two level cache system from level one to lever two controllers for cache coherence protocol for direct memory access transfers
Grant 8,656,105 - Damodaran , et al. February 18, 2
2014-02-18
Efficient cache allocation by optimizing size and order of allocate commands based on bytes required by CPU
Grant 8,607,000 - Chachad , et al. December 10, 2
2013-12-10
Priority based exception mechanism for multi-level cache controller
Grant 8,560,896 - Zbiciak , et al. October 15, 2
2013-10-15
Lookahead Priority Collection to Support Priority Elevation
App 20120290755 - Chachad; Abhijeet Ashok ;   et al.
2012-11-15
Memory Attribute Sharing Between Differing Cache Levels of Multilevel Cache
App 20120198166 - Damodaran; Raguram ;   et al.
2012-08-02
Efficient Cache Allocation by Optimizing Size and Order of Allocate Commands Based on Bytes Required by CPU
App 20120198160 - Chachad; Abhijeet Ashok ;   et al.
2012-08-02
Priority Based Exception Mechanism for Multi-Level Cache Controller
App 20120198272 - Zbiciak; Joseph Raymond Michael ;   et al.
2012-08-02
Performance And Power Improvement On Dma Writes To Level Two Combined Cache/sram That Is Caused In Level One Data Cache And Line Is Valid And Dirty
App 20120191914 - Tran; Jonathan (Son) Hung ;   et al.
2012-07-26
Robust Hamming Code Implementation for Soft Error Detection, Correction, and Reporting in a Multi-Level Cache System Using Dual Banking Memory Scheme
App 20120192027 - Tran; Jonathan (Son) Hung ;   et al.
2012-07-26
Optimizing Tag Forwarding In A Two Level Cache System From Level One To Lever Two Controllers For Cache Coherence Protocol For Direct Memory Access Transfers
App 20120191916 - Chachad; Abhijeet Ashok ;   et al.
2012-07-26

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