Patent | Date |
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Semiconductor Arrangement And Method Of Making App 20220302255 - PENG; Shih-Wei ;   et al. | 2022-09-22 |
Fin Field-effect Transistor And Method Of Forming The Same App 20220293599 - Chiu; Te-Hsin ;   et al. | 2022-09-15 |
Variable Width Nano-sheet Field-effect Transistor Cell Structure App 20220292244 - Lai; Wei-An ;   et al. | 2022-09-15 |
Power distribution network Grant 11,444,073 - Sio , et al. September 13, 2 | 2022-09-13 |
Semiconductor Device Layout App 20220284164 - Peng; Shih-Wei ;   et al. | 2022-09-08 |
Variable width nano-sheet field-effect transistor cell structure Grant 11,429,774 - Lai , et al. August 30, 2 | 2022-08-30 |
Buried metal for FinFET device and method Grant 11,424,154 - Chou , et al. August 23, 2 | 2022-08-23 |
Deep Lines And Shallow Lines In Signal Conducting Paths App 20220262719 - LAI; Wei-An ;   et al. | 2022-08-18 |
Backside Conducting Lines In Integrated Circuits App 20220254770 - LAI; Wei-An ;   et al. | 2022-08-11 |
Integrated Circuit And Manufacturing Method Of The Same App 20220254769 - SIO; Kam-Tou ;   et al. | 2022-08-11 |
Method For Manufacturing Semiconductor Device App 20220254688 - PENG; Shih-Wei ;   et al. | 2022-08-11 |
Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same Grant 11,409,937 - Lin , et al. August 9, 2 | 2022-08-09 |
Semiconductor Device, And Associated Method And System App 20220238443 - PENG; SHIH-WEI ;   et al. | 2022-07-28 |
Integrated Circuit, System And Method Of Forming The Same App 20220237359 - PENG; Shih-Wei ;   et al. | 2022-07-28 |
Diagonal Via Pattern And Method App 20220237357 - PENG; Shih-Wei ;   et al. | 2022-07-28 |
Methods Of Resistance And Capacitance Reduction To Circuit Output Nodes App 20220238515 - LAI; Po-Chia ;   et al. | 2022-07-28 |
Semiconductor Devices And Methods Of Manufacturing Thereof App 20220238371 - Chiu; Te-Hsin ;   et al. | 2022-07-28 |
Semiconductor Devices And Methods Of Manufacturing Thereof App 20220238442 - Sio; Kam-Tou ;   et al. | 2022-07-28 |
Semiconductor Devices And Methods Of Manufacturing Thereof App 20220238679 - Chiu; Te-Hsin ;   et al. | 2022-07-28 |
Semiconductor structure and method of forming the same Grant 11,374,005 - Peng , et al. June 28, 2 | 2022-06-28 |
Integrated Circuit With Backside Power Rail And Backside Interconnect App 20220199608 - Peng; Shih-Wei ;   et al. | 2022-06-23 |
Layout designs of integrated circuits having backside routing tracks Grant 11,355,487 - Lai , et al. June 7, 2 | 2022-06-07 |
Integrated Circuit Including Supervia And Method Of Making App 20220157714 - SIO; Kam-Tou ;   et al. | 2022-05-19 |
Method Of Manufacturing A Semiconductor Device App 20220148876 - PENG; SHIH-WEI ;   et al. | 2022-05-12 |
Routing-resource-improving Method Of Generating Layout Diagram, System For Same And Semiconductor Device App 20220147688 - PENG; Shih-Wei ;   et al. | 2022-05-12 |
Integrated Circuit With Mixed Row Heights App 20220149033 - SIO; Kam-Tou ;   et al. | 2022-05-12 |
Semiconductor device and manufacturing method thereof Grant 11,328,957 - Peng , et al. May 10, 2 | 2022-05-10 |
Power Distribution Network App 20220130817 - SIO; Kam-Tou ;   et al. | 2022-04-28 |
Integrated Circuit, System And Method Of Forming Same App 20220130968 - PENG; Shih-Wei ;   et al. | 2022-04-28 |
Backside Signal Interconnection App 20220130759 - Huang; Yu-Xuan ;   et al. | 2022-04-28 |
Semiconductor Structure With Nanosheets App 20220130822 - CHIU; Te-Hsin ;   et al. | 2022-04-28 |
Memory Device And Layout, Manufacturing Method Of The Same App 20220122993 - Chiu; Te-Hsin ;   et al. | 2022-04-21 |
Semiconductor Structure For Reducing Stray Capacitance And Method Of Forming The Same App 20220123023 - PENG; SHIH-WEI ;   et al. | 2022-04-21 |
Semiconductor Structure And Method Of Forming The Same App 20220122971 - PENG; SHIH-WEI ;   et al. | 2022-04-21 |
Methods of resistance and capacitance reduction to circuit output nodes Grant 11,309,311 - Lai , et al. April 19, 2 | 2022-04-19 |
Semiconductor device, and associated method and system Grant 11,309,247 - Peng , et al. April 19, 2 | 2022-04-19 |
Integrated Circuit, System And Method Of Forming Same App 20220115324 - CHIU; Te-Hsin ;   et al. | 2022-04-14 |
Integrated circuit cells and related methods Grant 11,302,631 - Chiu , et al. April 12, 2 | 2022-04-12 |
Method Of Making Semiconductor Device Which Includes Fins App 20220108990 - CHEN; Chih-Liang ;   et al. | 2022-04-07 |
Integrated circuit with backside power rail and backside interconnect Grant 11,296,070 - Peng , et al. April 5, 2 | 2022-04-05 |
Integrated Circuit App 20220102278 - PENG; Shih-Wei ;   et al. | 2022-03-31 |
Integrated circuit with mixed row heights Grant 11,282,829 - Sio , et al. March 22, 2 | 2022-03-22 |
Integrated circuit including supervia and method of making Grant 11,270,936 - Sio , et al. March 8, 2 | 2022-03-08 |
Semiconductor Device And Manufacturing Method Thereof App 20220068791 - CHIU; Te-Hsin ;   et al. | 2022-03-03 |
Method of manufacturing a semiconductor device, and associated semiconductor device and system Grant 11,257,670 - Peng , et al. February 22, 2 | 2022-02-22 |
Semiconductor Devices With Backside Power Distribution Network And Frontside Through Silicon Via App 20220045011 - Sio; Kam-Tou ;   et al. | 2022-02-10 |
Integrated Circuit Cells And Related Methods App 20220037252 - CHIU; TE-HSIN ;   et al. | 2022-02-03 |
Routing-resource-improving method of generating layout diagram and system for same Grant 11,232,248 - Peng , et al. January 25, 2 | 2022-01-25 |
Layout Designs Of Integrated Circuits Having Backside Routing Tracks App 20220020738 - LAI; Wei-An ;   et al. | 2022-01-20 |
Mixed Poly Pitch Design Solution for Power Trim App 20220012399 - Peng; Shih-Wei ;   et al. | 2022-01-13 |
Semiconductor device which includes fins and method of making same Grant 11,222,899 - Chen , et al. January 11, 2 | 2022-01-11 |
Pin access hybrid cell height design Grant 11,222,157 - Sio , et al. January 11, 2 | 2022-01-11 |
Semiconductor structure having buried power rail disposed between two fins and method of making the same Grant 11,217,528 - Peng , et al. January 4, 2 | 2022-01-04 |
Metal Patterning For Internal Cell Routing App 20210398903 - Peng; Shih-Wei ;   et al. | 2021-12-23 |
Integrated Circuit With Backside Power Rail And Backside Interconnect App 20210391318 - Peng; Shih-Wei ;   et al. | 2021-12-16 |
Integrated Circuit Structure And Method Of Forming The Same App 20210391328 - SIO; Kam-Tou ;   et al. | 2021-12-16 |
Semiconductor Device Integrating Backside Power Grid And Related Integrated Circuit And Fabrication Method App 20210384351 - CHEN; CHIH-LIANG ;   et al. | 2021-12-09 |
Advanced Node Interconnect Routing Methodology App 20210384127 - Peng; Shih-Wei ;   et al. | 2021-12-09 |
Integrated Circuit And Method Of Manufacturing Same App 20210383054 - PENG; Shih-Wei ;   et al. | 2021-12-09 |
Ic Device Manufacturing Method App 20210374315 - PENG; Shih-Wei ;   et al. | 2021-12-02 |
Semiconductor Devices with Backside Routing and Method of Forming Same App 20210375761 - Chang; Shang-Wen ;   et al. | 2021-12-02 |
Structure And Method Of Power Supply Routing In Semiconductor Device App 20210375851 - PENG; SHIH-WEI ;   et al. | 2021-12-02 |
Via Rail Solution For High Power Electromigration App 20210366844 - Sio; Kam-Tou ;   et al. | 2021-11-25 |
Hybrid Sheet Layout, Method, System, And Structure App 20210357565 - FANG; Shang-Wei ;   et al. | 2021-11-18 |
Line space, routing and patterning methodology Grant 11,171,089 - Peng , et al. November 9, 2 | 2021-11-09 |
Integrated Circuit And Method For Forming The Same App 20210343645 - PENG; Shih-Wei ;   et al. | 2021-11-04 |
Integrated Circuit, System And Method Of Forming The Same App 20210343744 - CHIU; Te-Hsin ;   et al. | 2021-11-04 |
Semiconductor Device And Method For Manufacturing The Same App 20210343698 - PENG; Shih-Wei ;   et al. | 2021-11-04 |
Power Distribution Structure And Method App 20210343650 - PENG; Shih-Wei ;   et al. | 2021-11-04 |
Integrated Circuit Including Misaligned Isolation Portions App 20210334446 - PENG; Shih-Wei ;   et al. | 2021-10-28 |
Integrated circuit and method of manufacturing the same Grant 11,159,164 - Peng , et al. October 26, 2 | 2021-10-26 |
Semiconductor devices with backside power distribution network and frontside through silicon via Grant 11,158,580 - Sio , et al. October 26, 2 | 2021-10-26 |
Integrated circuit with mixed row heights Grant 11,152,348 - Sio , et al. October 19, 2 | 2021-10-19 |
Method for manufacturing semiconductor device Grant 11,145,678 - Liu , et al. October 12, 2 | 2021-10-12 |
Semiconductor Devices App 20210313263 - LAI; WEI-AN ;   et al. | 2021-10-07 |
Advanced Node Interconnect Routing Methodology App 20210313268 - Peng; Shih-Wei ;   et al. | 2021-10-07 |
Semiconductor Structure and Method of Making the Same App 20210313270 - Peng; Shih-Wei ;   et al. | 2021-10-07 |
Advanced node interconnect routing methodology Grant 11,139,245 - Peng , et al. October 5, 2 | 2021-10-05 |
Metal patterning for internal cell routing Grant 11,133,255 - Peng , et al. September 28, 2 | 2021-09-28 |
Hybrid power rail structure Grant 11,133,254 - Lai , et al. September 28, 2 | 2021-09-28 |
Power Structure With Power Pick-up Cell Connecting To Buried Power Rail App 20210294962 - PENG; Shih-Wei ;   et al. | 2021-09-23 |
IC layout, method, device, and system Grant 11,126,775 - Peng , et al. September 21, 2 | 2021-09-21 |
Pin Access Hybrid Cell Height Design App 20210286927 - SIO; Kam-Tou ;   et al. | 2021-09-16 |
Semiconductor device integrating backside power grid and related integrated circuit and fabrication method Grant 11,121,256 - Chen , et al. September 14, 2 | 2021-09-14 |
Local Interconnect Structure App 20210280607 - CHEN; Chih-Liang ;   et al. | 2021-09-09 |
Cell Structures And Power Routing For Integrated Circuits App 20210272605 - PENG; Shih-Wei ;   et al. | 2021-09-02 |
Semiconductor Device And Manufacturing Method Thereof App 20210265217 - PENG; Shih-Wei ;   et al. | 2021-08-26 |
Integrated circuit and method of manufacturing same Grant 11,100,273 - Peng , et al. August 24, 2 | 2021-08-24 |
Integrated Circuit Structure App 20210248298 - PENG; Shih-Wei ;   et al. | 2021-08-12 |
Method Of Manufacturing A Semiconductor Device, And Associated Semiconductor Device And System App 20210249262 - PENG; SHIH-WEI ;   et al. | 2021-08-12 |
Methods Of Resistance And Capacitance Reduction To Circuit Output Nodes App 20210249407 - LAI; Po-Chia ;   et al. | 2021-08-12 |
Via rail solution for high power electromigration Grant 11,088,092 - Sio , et al. August 10, 2 | 2021-08-10 |
Semiconductor Device Including Combination Rows And Method And System For Generating Layout Diagram Of Same App 20210240900 - PENG; Shih-Wei ;   et al. | 2021-08-05 |
Random Cut Patterning App 20210242130 - Peng; Shih-Wei ;   et al. | 2021-08-05 |
Integrated circuit, system, and method of forming the same Grant 11,080,454 - Peng , et al. August 3, 2 | 2021-08-03 |
Semiconductor Structure, Device, And Method App 20210233990 - PENG; Shih-Wei ;   et al. | 2021-07-29 |
Method And Structure To Reduce Cell Width In Semiconductor Device App 20210225768 - PENG; SHIH-WEI ;   et al. | 2021-07-22 |
Multiple Fin Height Integrated Circuit App 20210217744 - LIN; Wei-Cheng ;   et al. | 2021-07-15 |
Via rail solution for high power electromigration Grant 11,063,005 - Sio , et al. July 13, 2 | 2021-07-13 |
Integrated Circuit Device With High Mobility And System Of Forming The Integrated Circuit App 20210210488 - SIO; KAM-TOU ;   et al. | 2021-07-08 |
Power structure with power pick-up cell connecting to buried power rail Grant 11,055,469 - Peng , et al. July 6, 2 | 2021-07-06 |
Dual Power Structure With Efficient Layout App 20210202384 - Peng; Shin-Wei ;   et al. | 2021-07-01 |
Layout Architecture For A Cell App 20210202466 - Peng; Shi-Wei ;   et al. | 2021-07-01 |
Semiconductor device including region having both continuous regions, and method and system for generating layout diagram of same Grant 11,048,848 - Peng , et al. June 29, 2 | 2021-06-29 |
Buried Metal for FinFET Device and Method App 20210193504 - Chou; Lei-Chun ;   et al. | 2021-06-24 |
Dummy MOL removal for performance enhancement Grant 11,043,426 - Yang , et al. June 22, 2 | 2021-06-22 |
High-Density Semiconductor Device App 20210166947 - Chou; Lei-Chun ;   et al. | 2021-06-03 |
Random cut patterning Grant 11,024,580 - Peng , et al. June 1, 2 | 2021-06-01 |
Dual power structure with connection pins Grant 11,024,579 - Peng , et al. June 1, 2 | 2021-06-01 |
Local interconnect structure Grant 11,018,157 - Chen , et al. May 25, 2 | 2021-05-25 |
Semiconductor Device, And Associated Method And System App 20210134720 - PENG; SHIH-WEI ;   et al. | 2021-05-06 |
Middle-end-of-line Strap For Standard Cell App 20210118793 - SHEN; Meng-Hung ;   et al. | 2021-04-22 |
Integrated Circuit Structure And Method Of Forming The Same App 20210118868 - SIO; Kam-Tou ;   et al. | 2021-04-22 |
Integrated Circuit Layout Diagram System App 20210117606 - PENG; Shih-Wei ;   et al. | 2021-04-22 |
Semiconductor Devices With Backside Power Distribution Network And Frontside Through Silicon Via App 20210118805 - SIO; Kam-Tou ;   et al. | 2021-04-22 |
Semiconductor Device Including Cell Region Having More Similar Cell Densities In Different Height Rows, And Method And System For Generating Layout Diagram Of Same App 20210110094 - LIN; Wei-Cheng ;   et al. | 2021-04-15 |
Semiconductor structure, device, and method Grant 10,977,417 - Peng , et al. April 13, 2 | 2021-04-13 |
System for and method of manufacturing an integrated circuit Grant 10,977,421 - Lin , et al. April 13, 2 | 2021-04-13 |
Integrated circuit device with high mobility and system of forming the integrated circuit Grant 10,971,493 - Sio , et al. April 6, 2 | 2021-04-06 |
Semiconductor Device, And Associated Method And System App 20210098339 - PENG; SHIH-WEI ;   et al. | 2021-04-01 |
Double Rule Integrated Circuit Layouts For A Dual Transmission Gate App 20210098453 - PENG; Shih-Wei ;   et al. | 2021-04-01 |
Multiple fin height integrated circuit Grant 10,964,684 - Lin , et al. March 30, 2 | 2021-03-30 |
Method Of Manufacturing Semiconductor Device App 20210091000 - PENG; SHIH-WEI ;   et al. | 2021-03-25 |
Semiconductor Device Including Source/drain Contact Having Height Below Gate Stack App 20210082903 - YOUNG; Charles Chew-Yuen ;   et al. | 2021-03-18 |
Integrated Circuit And Method Of Manufacturing The Same App 20210083668 - PENG; Shih-Wei ;   et al. | 2021-03-18 |
High-density semiconductor device Grant 10,950,456 - Chou , et al. March 16, 2 | 2021-03-16 |
Integrated Circuit, System, And Method Of Forming The Same App 20210064806 - PENG; Shih-Wei ;   et al. | 2021-03-04 |
Advanced Metal Connection With Metal Cut App 20210066182 - Chen; Chih-Liang ;   et al. | 2021-03-04 |
Metal Rail Conductors For Non-planar Semiconductor Devices App 20210028311 - Chen; Chih-Liang ;   et al. | 2021-01-28 |
Random Cut Patterning App 20210020570 - Peng; Shih-Wei ;   et al. | 2021-01-21 |
Semiconductor Device And Method Of Forming The Semiconductor Device App 20210013086 - PENG; SHIH-WEI ;   et al. | 2021-01-14 |
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods App 20210005634 - Lai; Wei-An ;   et al. | 2021-01-07 |
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods App 20210005633 - Lai; Wei-An ;   et al. | 2021-01-07 |
Self aligned via and method for fabricating the same Grant 10,879,120 - Chen , et al. December 29, 2 | 2020-12-29 |
Integrated circuit, system for and method of forming an integrated circuit Grant 10,879,229 - Sio , et al. December 29, 2 | 2020-12-29 |
Metal with buried power for increased IC device density Grant 10,878,162 - Peng , et al. December 29, 2 | 2020-12-29 |
Method and structure to reduce cell width in integrated circuits Grant 10,878,161 - Peng , et al. December 29, 2 | 2020-12-29 |
Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same Grant 10,878,158 - Lin , et al. December 29, 2 | 2020-12-29 |
Middle-end-of-line strap for standard cell Grant 10,879,173 - Shen , et al. December 29, 2 | 2020-12-29 |
Semiconductor Device, Associated Method And Layout App 20200395298 - Peng; Shih-Wei ;   et al. | 2020-12-17 |
Semiconductor device, associated method and layout Grant 10,867,917 - Peng , et al. December 15, 2 | 2020-12-15 |
System and method for calculating cell edge leakage Grant 10,867,115 - Peng , et al. December 15, 2 | 2020-12-15 |
Double rule integrated circuit layouts for a dual transmission gate Grant 10,868,008 - Peng , et al. December 15, 2 | 2020-12-15 |
Buried metal for FinFET device and method Grant 10,867,833 - Chou , et al. December 15, 2 | 2020-12-15 |
Inverted pitch IC structure, layout method, and system Grant 10,867,102 - Peng , et al. December 15, 2 | 2020-12-15 |
Metal Rail Conductors For Non-planar Semiconductor Devices App 20200388706 - CHEN; Chih-Liang ;   et al. | 2020-12-10 |
Power strap structure for high performance and low current density Grant 10,861,790 - Chen , et al. December 8, 2 | 2020-12-08 |
Pin Access Hydrid Cell Height Design App 20200380193 - SIO; Kam-Tou ;   et al. | 2020-12-03 |
Advanced metal connection with metal cut Grant 10,847,460 - Chen , et al. November 24, 2 | 2020-11-24 |
Integrated Circuit, System For And Method Of Forming An Integrated Circuit App 20200357793 - SIO; Kam-Tou ;   et al. | 2020-11-12 |
Integrated Circuit With Mixed Row Heights App 20200357786 - SIO; Kam-Tou ;   et al. | 2020-11-12 |
Semiconductor device including source/drain contact having height below gate stack Grant 10,833,061 - Young , et al. November 10, 2 | 2020-11-10 |
Semiconductor Device Which Includes Fins And Method Of Making Same App 20200335507 - CHEN; Chih-Liang ;   et al. | 2020-10-22 |
Ic Layout, Method, Device, And System App 20200327273 - PENG; Shih-Wei ;   et al. | 2020-10-15 |
Metal rail conductors for non-planar semiconductor devices Grant 10,804,402 - Chen , et al. October 13, 2 | 2020-10-13 |
Hybrid fin field-effect transistor cell structures and related methods Grant 10,797,078 - Lai , et al. October 6, 2 | 2020-10-06 |
Semiconductor Device Integrating Backside Power Grid And Related Integrated Circuit And Fabrication Method App 20200303551 - CHEN; CHIH-LIANG ;   et al. | 2020-09-24 |
Integrated circuit and method of manufacturing the same Grant 10,784,869 - Peng , et al. Sept | 2020-09-22 |
Dummy MOL removal for performance enhancement Grant 10,784,168 - Yang , et al. Sept | 2020-09-22 |
Pin access hybrid cell height design Grant 10,769,342 - Sio , et al. Sep | 2020-09-08 |
Metal rail conductors for non-planar semiconductor devices Grant 10,763,365 - Chen , et al. Sep | 2020-09-01 |
Integrated circuit, system for and method of forming an integrated circuit Grant 10,734,377 - Sio , et al. | 2020-08-04 |
Metal Patterning For Internal Cell Routing App 20200243447 - Peng; Shih-Wei ;   et al. | 2020-07-30 |
Semiconductor device which includes Fins Grant 10,714,485 - Chen , et al. | 2020-07-14 |
Semiconductor device integrating backside power grid and related integrated circuit and fabrication method Grant 10,700,207 - Chen , et al. | 2020-06-30 |
System For And Method Of Manufacturing An Integrated Circuit App 20200184139 - LIN; Wei-Cheng ;   et al. | 2020-06-11 |
Metal patterning for internal cell routing Grant 10,658,292 - Peng , et al. | 2020-05-19 |
Metal With Buried Power For Increased Ic Device Density App 20200134128 - PENG; Shih-Wei ;   et al. | 2020-04-30 |
Line Space, Routing And Patterning Methodology App 20200135637 - PENG; Shih-Wei ;   et al. | 2020-04-30 |
Pin Access Hydrid Cell Height Design App 20200134119 - SIO; Kam-Tou ;   et al. | 2020-04-30 |
Integrated Circuit Including Supervia And Method Of Making App 20200135640 - SIO; Kam-Tou ;   et al. | 2020-04-30 |
Double Rule Integrated Circuit Layouts For A Dual Transmission Gate App 20200135732 - PENG; Shih-Wei ;   et al. | 2020-04-30 |
Routing-resource-improving Method Of Generating Layout Diagram And System For Same App 20200104447 - PENG; Shih-Wei ;   et al. | 2020-04-02 |
Contact Structure, Method, Layout, And System App 20200105660 - SIO; Kam-Tou ;   et al. | 2020-04-02 |
Hybrid Power Rail Structure App 20200105671 - LAI; Wei-An ;   et al. | 2020-04-02 |
Method And Structure To Reduce Cell Width In Integrated Circuits App 20200104445 - PENG; Shih-Wei ;   et al. | 2020-04-02 |
Method For Manufacturing Semiconductor Device App 20200105795 - LIU; JACK ;   et al. | 2020-04-02 |
Semiconductor Structure, Device, And Method App 20200104460 - PENG; Shih-Wei ;   et al. | 2020-04-02 |
Via Rail Solution For High Power Electromigration App 20200083182 - Sio; Kam-Tou ;   et al. | 2020-03-12 |
Integrated Circuit And Method Of Manufacturing Same App 20200074044 - Peng; Shih-Wei ;   et al. | 2020-03-05 |
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods App 20200058681 - Lai; Wei-An ;   et al. | 2020-02-20 |
System for and method of fabricating an integrated circuit Grant 10,565,348 - Lin , et al. Feb | 2020-02-18 |
High-Density Semiconductor Device App 20200043741 - Chou; Lei-Chun ;   et al. | 2020-02-06 |
Power Structure With Power Pick-up Cell Connecting To Buried Power Rail App 20200042668 - PENG; Shih-Wei ;   et al. | 2020-02-06 |
Dummy Mol Removal For Performance Enhancement App 20200020588 - Yang; Hui-Ting ;   et al. | 2020-01-16 |
System and Method for Calculating Cell Edge Leakage App 20200019673 - Peng; Shih-Wei ;   et al. | 2020-01-16 |
Advanced Metal Connection With Metal Cut App 20200020625 - Chen; Chih-Liang ;   et al. | 2020-01-16 |
Semiconductor Device Including Cell Region Having Mor Similar Cell Densities In Different Height Rows, And Method And System For App 20200019667 - LIN; Wei-Cheng ;   et al. | 2020-01-16 |
Integrated Circuit And Method Of Manufacturing The Same App 20200021292 - PENG; Shih-Wei ;   et al. | 2020-01-16 |
Semiconductor Device Including Cell Region Having Both Aa-continuous And Aa-discontinuous Regions, And Method And System For Gen App 20200019672 - PENG; Shih-Wei ;   et al. | 2020-01-16 |
Multiple Fin Height Integrated Circuit App 20200006318 - LIN; Wei-Cheng ;   et al. | 2020-01-02 |
Integrated Circuit Structure, Layout Diagram Method, And System App 20200004914 - PENG; Shih-Wei ;   et al. | 2020-01-02 |
Double Rule Integrated Circuit Layouts For A Dual Transmission Gate App 20200006338 - PENG; Shih-Wei ;   et al. | 2020-01-02 |
Double rule integrated circuit layouts for a dual transmission gate Grant 10,522,542 - Peng , et al. Dec | 2019-12-31 |
Structure and formation method of semiconductor device structure Grant 10,516,047 - Sio , et al. Dec | 2019-12-24 |
Semiconductor device with common active area and method for manufacturing the same Grant 10,510,776 - Liu , et al. Dec | 2019-12-17 |
Via rail solution for high power electromigration Grant 10,510,688 - Sio , et al. Dec | 2019-12-17 |
Integrated circuit and method of manufacturing same Grant 10,503,863 - Peng , et al. Dec | 2019-12-10 |
System and method for calculating cell edge leakage Grant 10,467,374 - Peng , et al. No | 2019-11-05 |
Advanced metal connection with metal cut Grant 10,468,349 - Chen , et al. No | 2019-11-05 |
System For And Method Of Fabricating An Integrated Circuit App 20190325109 - LIN; Wei-Cheng ;   et al. | 2019-10-24 |
High-density semiconductor device Grant 10,446,406 - Chou , et al. Oc | 2019-10-15 |
Semiconductor Device And Method For Manufacturing The Same App 20190305006 - LIU; JACK ;   et al. | 2019-10-03 |
Dual Power Structure With Connection Pins App 20190244901 - Peng; Shih-Wei ;   et al. | 2019-08-08 |
System for and method of manufacturing a layout design of an integrated circuit Grant 10,366,200 - Lin , et al. July 30, 2 | 2019-07-30 |
Middle-end-of-line Strap For Standard Cell App 20190164883 - SHEN; Meng-Hung ;   et al. | 2019-05-30 |
Buried Metal for FinFET Device and Method App 20190164805 - Chou; Lei-Chun ;   et al. | 2019-05-30 |
Integrated Circuit With Mixed Row Heights App 20190164949 - SIO; Kam-Tou ;   et al. | 2019-05-30 |
Metal Rail Conductors For Non-planar Semiconductor Devices App 20190165177 - CHEN; Chih-Liang ;   et al. | 2019-05-30 |
Integrated Circuit Device With High Mobility And System Of Forming The Integrated Circuit App 20190164962 - SIO; KAM-TOU ;   et al. | 2019-05-30 |
Semiconductor Device Integrating Backside Power Grid And Related Integrated Circuit And Fabrication Method App 20190164882 - CHEN; CHIH-LIANG ;   et al. | 2019-05-30 |
Metal Rail Conductors For Non-planar Semiconductor Devices App 20190165178 - CHEN; Chih-Liang ;   et al. | 2019-05-30 |
Semiconductor device and fabrication method of the same Grant 10,297,588 - Lin , et al. | 2019-05-21 |
Dual power structure with connection pins Grant 10,276,499 - Peng , et al. | 2019-04-30 |
Semiconductor Device Including Source/drain Contact Having Height Below Gate Stack App 20190123036 - YOUNG; Charles Chew-Yuen ;   et al. | 2019-04-25 |
Power Strap Structure For High Performance And Low Current Density App 20190122987 - Chen; Chih-Liang ;   et al. | 2019-04-25 |
Local Interconnect Structure App 20190096909 - Chen; Chih-Liang ;   et al. | 2019-03-28 |
Integrated Circuit And Method Of Manufacturing Same App 20190065658 - PENG; Shih-Wei ;   et al. | 2019-02-28 |
Advanced Metal Connection With Metal Cut App 20190051595 - Chen; Chih-Liang ;   et al. | 2019-02-14 |
Middle end-of-line strap for standard cell Grant 10,204,857 - Shen , et al. Feb | 2019-02-12 |
Dummy Mol Removal For Performance Enhancement App 20190043759 - Yang; Hui-Ting ;   et al. | 2019-02-07 |
Semiconductor Device Which Includes Fins App 20190019797 - CHEN; Chih-Liang ;   et al. | 2019-01-17 |
Semiconductor device including source/drain contact having height below gate stack Grant 10,177,133 - Young , et al. J | 2019-01-08 |
System and Method for Calculating Cell Edge Leakage App 20190005181 - Peng; Shih-Wei ;   et al. | 2019-01-03 |
Power strap structure for high performance and low current density Grant 10,170,422 - Chen , et al. J | 2019-01-01 |
Method of adjusting metal line pitch Grant 10,162,930 - Lin , et al. Dec | 2018-12-25 |
Interconnect metal layout for integrated circuit Grant 10,157,922 - Lin , et al. Dec | 2018-12-18 |
Via Rail Solution For High Power Electromigration App 20180358309 - Sio; Kam-Tou ;   et al. | 2018-12-13 |
Metal Patterning For Internal Cell Routing App 20180308796 - Peng; Shih-Wei ;   et al. | 2018-10-25 |
Advanced metal connection with metal cut Grant 10,109,582 - Chen , et al. October 23, 2 | 2018-10-23 |
Dummy MOL removal for performance enhancement Grant 10,096,522 - Yang , et al. October 9, 2 | 2018-10-09 |
Method of manufacturing fins and semiconductor device which includes fins Grant 10,074,657 - Chen , et al. September 11, 2 | 2018-09-11 |
Semiconductor device with reduced leakage current Grant 10,050,028 - Peng , et al. August 14, 2 | 2018-08-14 |
High-density semiconductor device Grant 10,032,759 - Chen , et al. July 24, 2 | 2018-07-24 |
Power Strap Structure For High Performance And Low Current Density App 20180174967 - Chen; Chih-Liang ;   et al. | 2018-06-21 |
Semiconductor Device And Fabrication Method Of The Same App 20180166431 - LIN; Wei-Cheng ;   et al. | 2018-06-14 |
Interconnect Metal Layout For Integrated Circuit App 20180151567 - LIN; Wei-Cheng ;   et al. | 2018-05-31 |
High-Density Semiconductor Device App 20180151551 - Chen; Chih-Liang ;   et al. | 2018-05-31 |
Self Aligned Via and Method for Fabricating the Same App 20180151432 - Chen; Chih-Liang ;   et al. | 2018-05-31 |
Structure And Formation Method Of Semiconductor Device Structure App 20180151729 - SIO; Kam-Tou ;   et al. | 2018-05-31 |
Integrated Circuit, System For And Method Of Forming An Integrated Circuit App 20180151559 - SIO; Kam-Tou ;   et al. | 2018-05-31 |
Semiconductor Device with Reduced Leakage Current App 20180151550 - Peng; Shih-Wei ;   et al. | 2018-05-31 |
High-Density Semiconductor Device App 20180151381 - Chou; Lei-Chun ;   et al. | 2018-05-31 |
Integrated circuit having slot via and method of forming the same Grant 9,984,964 - Lin , et al. May 29, 2 | 2018-05-29 |
Middle-end-of-line Strap For Standard Cell App 20180096930 - SHEN; Meng-Hung ;   et al. | 2018-04-05 |
System For And Method Of Manufacturing A Layout Design Of An Integrated Circuit App 20180068050 - LIN; Wei-Cheng ;   et al. | 2018-03-08 |
Power strap structure for high performance and low current density Grant 9,911,697 - Chen , et al. March 6, 2 | 2018-03-06 |
Method Of Adjusting Metal Line Pitch App 20180039723 - LIN; WEI-CHENG ;   et al. | 2018-02-08 |
Dual Power Structure With Connection Pins App 20180019207 - Peng; Shih-Wei ;   et al. | 2018-01-18 |
Middle end-of-line strap for standard cell Grant 9,837,353 - Shen , et al. December 5, 2 | 2017-12-05 |
Integrated Circuit Having Slot Via And Method Of Forming The Same App 20170345753 - LIN; Wei-Cheng ;   et al. | 2017-11-30 |
Dummy Mol Removal For Performance Enhancement App 20170323832 - Yang; Hui-Ting ;   et al. | 2017-11-09 |
Power Strap Structure For High Performance And Low Current Density App 20170317027 - Chen; Chih-Liang ;   et al. | 2017-11-02 |
Method Of Manufacturing Fins And Semiconductor Device Which Includes Fins App 20170317089 - CHEN; Chih-Liang ;   et al. | 2017-11-02 |
Advanced Metal Connection With Metal Cut App 20170301618 - Chen; Chih-Liang ;   et al. | 2017-10-19 |
Dual power structure with connection pins Grant 9,793,211 - Peng , et al. October 17, 2 | 2017-10-17 |
Middle-end-of-line Strap For Standard Cell App 20170256484 - SHEN; Meng-Hung ;   et al. | 2017-09-07 |
Integrated circuit having slot via and method of forming the same Grant 9,741,654 - Lin , et al. August 22, 2 | 2017-08-22 |
High fin cut fabrication process Grant 9,679,994 - Chou , et al. June 13, 2 | 2017-06-13 |
Thermal analysis for tiered semiconductor structure Grant 9,659,115 - Chen , et al. May 23, 2 | 2017-05-23 |
Via Rail Solution for High Power Electromigration App 20170117272 - Sio; Kam-Tou ;   et al. | 2017-04-27 |
Dual Power Structure with Connection Pins App 20170110405 - Peng; Shih-Wei ;   et al. | 2017-04-20 |
Integrated Circuit Having Slot Via And Method Of Forming The Same App 20170040260 - LIN; Wei-Cheng ;   et al. | 2017-02-09 |
Integrated circuit having slot via and method of forming the same Grant 9,478,492 - Lin , et al. October 25, 2 | 2016-10-25 |
Structure And Method For Semiconductor Device App 20160268244 - YOUNG; Charles Chew-Yuen ;   et al. | 2016-09-15 |
Clock circuit and method of operating the same Grant 9,442,510 - Tzeng , et al. September 13, 2 | 2016-09-13 |
Integrated Circuit Having Slot Via And Method Of Forming The Same App 20160211213 - LIN; Wei-Cheng ;   et al. | 2016-07-21 |
Integrated circuits and manufacturing methods thereof Grant 9,385,213 - Wu , et al. July 5, 2 | 2016-07-05 |
Clock Circuit And Method Of Operating The Same App 20160147252 - TZENG; Jiann-Tyng ;   et al. | 2016-05-26 |
Clock Gating Circuits And Circuit Arrangements Including Clock Gating Circuits App 20160077544 - Tzeng; Jiann-Tyng ;   et al. | 2016-03-17 |
Semiconductor Arrangement And Formation Thereof App 20150349071 - Chen; Chih-Liang ;   et al. | 2015-12-03 |
Semiconductor arrangement and formation thereof Grant 9,184,250 - Chen , et al. November 10, 2 | 2015-11-10 |
Thermal Analysis For Tiered Semiconductor Structure App 20150179529 - Chen; Chih-Liang ;   et al. | 2015-06-25 |
Integrated circuit layout having mixed track standard cell Grant 8,698,205 - Tzeng , et al. April 15, 2 | 2014-04-15 |
Integrated Circuit Layout Having Mixed Track Standard Cell App 20130313615 - TZENG; Jiann-Tyng ;   et al. | 2013-11-28 |
Integrated Circuits And Manufacturing Methods Thereof App 20130130456 - WU; Chung-Cheng ;   et al. | 2013-05-23 |
Planar compatible FDSOI design architecture Grant 8,443,306 - Dhong , et al. May 14, 2 | 2013-05-14 |
Integrated circuits and manufacturing methods thereof Grant 8,362,573 - Wu , et al. January 29, 2 | 2013-01-29 |
Generating models for integrated circuits with sensitivity-based minimum change to existing models Grant 8,122,406 - Sheu , et al. February 21, 2 | 2012-02-21 |
Integrated Circuits And Manufacturing Methods Thereof App 20110291197 - WU; Chung-Cheng ;   et al. | 2011-12-01 |
Wide-range Quick Tunable Transistor Model App 20110153055 - Sheu; Bing J. ;   et al. | 2011-06-23 |
Generating Models for Integrated Circuits with Sensitivity-Based Minimum Change to Existing Models App 20100106469 - Sheu; Bing J. ;   et al. | 2010-04-29 |
High voltage devices Grant 7,605,413 - Tzeng , et al. October 20, 2 | 2009-10-20 |
High Voltage Devices App 20070290291 - Tzeng; Jiann-Tyng ;   et al. | 2007-12-20 |
Semiconductor devices and methods of manufacture thereof App 20070221999 - Wu; Chen-Bau ;   et al. | 2007-09-27 |
High voltage lateral diffused MOSFET device Grant 7,151,296 - Wu , et al. December 19, 2 | 2006-12-19 |
Micromirror and products using the same Grant 7,095,544 - Yeh , et al. August 22, 2 | 2006-08-22 |
Method and apparatus for preventing metal/silicon spiking in MEMS devices App 20060110842 - Chang; Yuh-Hwa ;   et al. | 2006-05-25 |
High voltage lateral diffused MOSFET device App 20060091503 - Wu; Kuo-Ming ;   et al. | 2006-05-04 |
Method for integrated manufacturing of split gate flash memory with high voltage MOSFETS Grant 6,998,304 - Wu , et al. February 14, 2 | 2006-02-14 |
Method to monitor process charging effect Grant 6,958,249 - Tzeng , et al. October 25, 2 | 2005-10-25 |
Trench-embedded mirror structure for double substrate spatial light modulator Grant 6,947,196 - Chen , et al. September 20, 2 | 2005-09-20 |
Method for integrated manufacturing of split gate flash memory with high voltage MOSFETS App 20050191800 - Wu, Haw-Chuan ;   et al. | 2005-09-01 |
Reflective spatial light modulator mirror device manufacturing process and layout method Grant 6,929,969 - Tzeng , et al. August 16, 2 | 2005-08-16 |
Method for manufacturing reflective spatial light modulator mirror devices Grant 6,841,081 - Chang , et al. January 11, 2 | 2005-01-11 |
Method For Manufacturing Reflective Spatial Light Modulator Mirror Devices App 20040245215 - Chang, Yuh-Hwa ;   et al. | 2004-12-09 |
Reflective spatial light modulator mirror device manufacturing process and layout method App 20040226909 - Tzeng, Jiann-Tyng ;   et al. | 2004-11-18 |
Trench-embeded mirror structure for double substrate spatial light modulator App 20040212868 - Chen, Jiun Nan ;   et al. | 2004-10-28 |
Micromirror and products using the same App 20040190108 - Yeh, Chih-Chieh ;   et al. | 2004-09-30 |
Method for reducing fluorine induced defects on a bonding pad surface Grant 6,660,624 - Tzeng , et al. December 9, 2 | 2003-12-09 |
Method for reducing fluorine induced defects on a bonding pad surface App 20030153196 - Tzeng, Jiann-Tyng ;   et al. | 2003-08-14 |