Tao; Hun-Jan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tao; Hun-Jan.The latest application filed is for "sidewall-free cesl for enlarging ild gap-fill window".

Company Profile

0.130.114

Tao; Hun-Jan - Hsin-Chu TW
Tao; Hun-Jan - Hsin-Chu City TW
Tao; Hun-Jan - Hsinchu TW
Tao; Hun-Jan - Hsinchu City TW
Tao; Hun-Jan - Hsinchu Hsien TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Sidewall free CESL for enlarging ILD gap-fill window Grant 9,218,974 - Chung , et al. December 22, 2	2015-12-22
Sidewall-free CESL for enlarging ILD gap-fill window Grant 8,999,834 - Chung , et al. April 7, 2	2015-04-07
Method for protecting a gate structure during contact formation Grant 8,970,015 - Chang , et al. March 3, 2	2015-03-03
Sidewall-free Cesl For Enlarging Ild Gap-fill Window App 20140170846 - Chung; Han-Pin ; et al.	2014-06-19
Method For Protecting a Gate Structure During Contact Formation App 20140103407 - CHANG; Hong-Dyi ; et al.	2014-04-17
Methods for a gate replacement process Grant 8,658,525 - Yeh , et al. February 25, 2	2014-02-25
Method for protecting a gate structure during contact formation Grant 8,648,446 - Chang , et al. February 11, 2	2014-02-11
Method for Protecting a Gate Structure During Contact Formation App 20130299921 - Chang; Hong-Dyi ; et al.	2013-11-14
Sidewall-Free CESL for Enlarging ILD Gap-Fill Window App 20130270651 - Chung; Han-Pin ; et al.	2013-10-17
Method for backside polymer reduction in dry-etch process Grant 8,529,783 - Chen , et al. September 10, 2	2013-09-10
Method for protecting a gate structure during contact formation Grant 8,497,169 - Chang , et al. July 30, 2	2013-07-30
Methods for a Gate Replacement Process App 20130149821 - Yeh; Matt ; et al.	2013-06-13
Dual damascene interconnect in hybrid dielectric Grant 8,415,799 - Su , et al. April 9, 2	2013-04-09
Semiconductor devices and methods with bilayer dielectrics Grant 8,384,159 - Yen , et al. February 26, 2	2013-02-26
Multilayer hard mask Grant 8,372,755 - Wang , et al. February 12, 2	2013-02-12
Methods for a gate replacement process Grant 8,367,563 - Yeh , et al. February 5, 2	2013-02-05
CMOS structure with multiple spacers Grant 8,299,508 - Hsieh , et al. October 30, 2	2012-10-30
Method to form a semiconductor device having gate dielectric layers of varying thickness Grant 8,283,222 - Hsu , et al. October 9, 2	2012-10-09
Method For Protecting A Gate Structure During Contact Formation App 20120228679 - Chang; Hong-Dyi ; et al.	2012-09-13
Method for protecting a gate structure during contact formation Grant 8,202,776 - Chang , et al. June 19, 2	2012-06-19
Low K dielectric surface damage control Grant 8,148,270 - Tao , et al. April 3, 2	2012-04-03
Gate oxide leakage reduction Grant 8,110,490 - Yeh , et al. February 7, 2	2012-02-07
Method To Form A Semiconductor Device Having Gate Dielectric Layers Of Varying Thickness App 20110306196 - Hsu; Kuang-Yuan ; et al.	2011-12-15
Multiple Deposition, Multiple Treatment Dielectric Layer For A Semiconductor Device App 20110256682 - Yu; Xiong-Fei ; et al.	2011-10-20
Method to form a semiconductor device having gate dielectric layers of varying thicknesses Grant 8,008,143 - Hsu , et al. August 30, 2	2011-08-30
Multilayer Hard Mask App 20110171804 - Wang; Shiang-Bau ; et al.	2011-07-14
Method To Form A Semiconductor Device Having Gate Dielectric Layers Of Varying Thicknesses App 20110159678 - Hsu; Kuang-Yuan ; et al.	2011-06-30
Semiconductor devices with dual-metal gate structures and fabrication methods thereof Grant 7,947,591 - Hsu , et al. May 24, 2	2011-05-24
Base oxide engineering for high-K gate stacks Grant 7,939,396 - Hsu , et al. May 10, 2	2011-05-10
Methods For A Gate Replacement Process App 20110081774 - Yeh; Matt ; et al.	2011-04-07
Reducing Local Mismatch of Devices Using Cryo-Implantation App 20110039390 - Nieh; Chun-Feng ; et al.	2011-02-17
Cmos Structure With Multiple Spacers App 20110031538 - HSIEH; Bor Chiuan ; et al.	2011-02-10
Contact hole structures and contact structures and fabrication methods thereof Grant 7,875,547 - Hsu , et al. January 25, 2	2011-01-25
Sidewall-Free CESL for Enlarging ILD Gap-Fill Window App 20100314690 - Chung; Han-Pin ; et al.	2010-12-16
Triangular space element for semiconductor device Grant 7,834,389 - Huang , et al. November 16, 2	2010-11-16
Multi-metal-oxide high-K gate dielectrics Grant 7,824,990 - Chang , et al. November 2, 2	2010-11-02
Method For Protecting A Gate Structure During Contact Formation App 20100270627 - Chang; Hong-Dyi ; et al.	2010-10-28
Method for backside polymer reduction in dry-etch process App 20100190349 - Chen; Huang-Ming ; et al.	2010-07-29
Low K Dielectric Surface Damage Control App 20100173499 - Tao; Hun-Jan ; et al.	2010-07-08
MOS devices with continuous contact etch stop layer Grant 7,732,878 - Yao , et al. June 8, 2	2010-06-08
Method and apparatus for backside polymer reduction in dry-etch process Grant 7,713,380 - Chen , et al. May 11, 2	2010-05-11
Low K dielectric surface damage control Grant 7,709,392 - Tao , et al. May 4, 2	2010-05-04
Semiconductor Devices And Methods With Bilayer Dielectrics App 20090315125 - YEN; Fong-Yu ; et al.	2009-12-24
Multiple-time flash anneal process Grant 7,629,275 - Chen , et al. December 8, 2	2009-12-08
Method for photoresist stripping and treatment of low-k dielectric material Grant 7,598,176 - Tsai , et al. October 6, 2	2009-10-06
Resolving pattern-loading issues of SiGe stressor Grant 7,579,248 - Huang , et al. August 25, 2	2009-08-25
Semiconductor devices and methods with bilayer dielectrics Grant 7,531,399 - Yen , et al. May 12, 2	2009-05-12
Gate Oxide Leakage Reduction App 20090047799 - Yeh; Matt ; et al.	2009-02-19
Triangular Space Element For Semiconductor Device App 20080308899 - Huang; Yu-Lien ; et al.	2008-12-18
Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures Grant 7,465,634 - Lim , et al. December 16, 2	2008-12-16
Via structures and trench structures and dual damascene structures Grant 7,436,009 - Huang , et al. October 14, 2	2008-10-14
Method for fabricating semiconductor device App 20080242108 - Chang; Weng ; et al.	2008-10-02
Recessed channel field effect transistor (FET) device Grant 7,429,769 - Diaz , et al. September 30, 2	2008-09-30
Method of making FUSI gate and resulting structure Grant 7,410,854 - Yao , et al. August 12, 2	2008-08-12
Semiconductor Devices With Dual-metal Gate Structures And Fabrication Methods Thereof App 20080188044 - Hsu; Peng-Fu ; et al.	2008-08-07
Multiple-time flash anneal process App 20080182430 - Chen; Jennifer ; et al.	2008-07-31
Backside contacts for MOS devices Grant 7,402,866 - Liang , et al. July 22, 2	2008-07-22
Measuring low dielectric constant film properties during processing Grant 7,400,401 - Tsai , et al. July 15, 2	2008-07-15
In-situ plasma treatment of advanced resists in fine pattern definition Grant 7,390,753 - Lin , et al. June 24, 2	2008-06-24
Method of forming tensile stress films for NFET performance enhancement App 20080138983 - Lien; Hao-Ming ; et al.	2008-06-12
Semiconductor devices with dual-metal gate structures and fabrication methods thereof Grant 7,378,713 - Hsu , et al. May 27, 2	2008-05-27
Wet cleaning cavitation system and method to remove particulate wafer contamination Grant 7,373,941 - Chou , et al. May 20, 2	2008-05-20
Semiconductor Devices With Dual-metal Gate Structures And Fabrication Methods Thereof App 20080099851 - Hsu; Peng-Fu ; et al.	2008-05-01
Polysilicon levels for silicided structures including MOSFET gate electrodes and 3D devices App 20080093682 - Yao; Liang-Gi ; et al.	2008-04-24
MOS devices with continuous contact etch stop layer App 20080093675 - Yao; Liang-Gi ; et al.	2008-04-24
Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures App 20080096336 - Lim; Peng-Soon ; et al.	2008-04-24
Method of making FUSI gate and resulting structure App 20080085590 - Yao; Liang-Gi ; et al.	2008-04-10
Method and system for processing multi-layer films Grant 7,354,524 - Yang , et al. April 8, 2	2008-04-08
Method of trimming technology Grant 7,354,847 - Chan , et al. April 8, 2	2008-04-08
Semiconductor Devices And Methods With Bilayer Dielectrics App 20080070395 - Yen; Fong-Yu ; et al.	2008-03-20
Post etch copper cleaning using dry plasma Grant 7,341,943 - Yeh , et al. March 11, 2	2008-03-11
Methods Of Forming Metal-containing Gate Structures App 20080050879 - Hung; Cheng-Lung ; et al.	2008-02-28
Semiconductor device having nitrided high-k gate dielectric and metal gate electrode and methods of forming same App 20080001237 - Chang; Vincent S. ; et al.	2008-01-03
Backside contacts for MOS devices App 20070296002 - Liang; Mong Song ; et al.	2007-12-27
Base oxide engineering for high-K gate stacks App 20070287199 - Hsu; Peng-Fu ; et al.	2007-12-13
Phosphoric acid free process for polysilicon gate definition Grant 7,307,009 - Lin , et al. December 11, 2	2007-12-11
In-situ critical dimension measurement Grant 7,301,645 - Wang , et al. November 27, 2	2007-11-27
Method of making a metal-insulator-metal capacitor in the CMOS process Grant 7,294,544 - Ho , et al. November 13, 2	2007-11-13
Method to control gate CD Grant RE39,913 - Tao , et al. November 6, 2	2007-11-06
Hybrid STI stressor with selective re-oxidation anneal Grant 7,276,417 - Tseng , et al. October 2, 2	2007-10-02
Method Of Forming Silicided Gate Structure App 20070222000 - Chan; Bor-Wen ; et al.	2007-09-27
Multiple gate field effect transistor structure Grant 7,271,448 - Hsu , et al. September 18, 2	2007-09-18
Bi-level resist structure and fabrication method for contact holes on semiconductor substrates Grant 7,265,060 - Tsai , et al. September 4, 2	2007-09-04
Method for forming novel BARC open for precision critical dimension control Grant 7,265,056 - Tsai , et al. September 4, 2	2007-09-04
Resolving pattern-loading issues of SiGe stressor App 20070190730 - Huang; Yu-Lien ; et al.	2007-08-16
Via structures and trench structures and dual damascene structures App 20070184669 - Huang; Yi-Chen ; et al.	2007-08-09
Method of forming silicided gate structure Grant 7,241,674 - Chan , et al. July 10, 2	2007-07-10
Hybrid STI stressor with selective re-oxidation anneal App 20070148881 - Tseng; Kai-Ting ; et al.	2007-06-28
Multi-metal-oxide high-k gate dielectrics App 20070128736 - Chang; Vincent S. ; et al.	2007-06-07
In-situ plasma treatment of advanced resists in fine pattern definition App 20070111110 - Lin; Li-Te ; et al.	2007-05-17
Via hole and trench structures and fabrication methods thereof and dual damascene structures and fabrication methods thereof Grant 7,217,663 - Huang , et al. May 15, 2	2007-05-15
Methods and structures for critical dimension and profile measurement Grant 7,208,331 - Shieh , et al. April 24, 2	2007-04-24
Recessed polysilicon gate structure for a strained silicon MOSFET device Grant 7,172,933 - Huang , et al. February 6, 2	2007-02-06
Low K Dielectric Surface Damage Control App 20070026668 - Tao; Hun-Jan ; et al.	2007-02-01
Semiconductor devices and methods of manufacture thereof App 20070013070 - Liang; Mong Song ; et al.	2007-01-18
Dual damascene interconnect in hybrid dielectric App 20070001306 - Su; Yi-Nien ; et al.	2007-01-04
Process for patterning high-k dielectric material Grant 7,148,114 - Chiu , et al. December 12, 2	2006-12-12
Method of forming trenches in a substrate by etching and trimming both hard mask and a photosensitive layers Grant 7,141,460 - Huang , et al. November 28, 2	2006-11-28
Integrated dual damascene clean apparatus and process App 20060246727 - Hsieh; Ching-Hua ; et al.	2006-11-02
Process for removing organic materials during formation of a metal interconnect Grant 7,122,484 - Perng , et al. October 17, 2	2006-10-17
Measuring low dielectric constant film properties during processing App 20060220653 - Tsai; Jang-Shiang ; et al.	2006-10-05
Method for wet etching of high k thin film at low temperature Grant 7,115,526 - Ho , et al. October 3, 2	2006-10-03
Approach to improve line end shortening including simultaneous trimming of photosensitive layer and hardmask Grant 7,115,450 - Huang , et al. October 3, 2	2006-10-03
Etching process to avoid polysilicon notching Grant 7,109,085 - Wang , et al. September 19, 2	2006-09-19
Large-scale trimming for ultra-narrow gates App 20060205224 - Huang; Ming-Jie ; et al.	2006-09-14
Multiple gate field effect transistor structure App 20060180854 - Hsu; Ju-Wang ; et al.	2006-08-17
Optical scatterometry method of sidewall spacer analysis Grant 7,092,096 - Tao , et al. August 15, 2	2006-08-15
Post etch copper cleaning using dry plasma App 20060178008 - Yeh; Chen-Nan ; et al.	2006-08-10
Via hole and trench structures and fabrication methods thereof and dual damascene structures and fabrication methods thereof App 20060160362 - Huang; Yi-Chen ; et al.	2006-07-20
Photoresist intensive patterning and processing Grant 7,078,351 - Chiu , et al. July 18, 2	2006-07-18
Contact hole structures and contact structures and fabrication methods thereof App 20060154478 - Hsu; Ju-Wang ; et al.	2006-07-13
Method and system for processing multi-layer films App 20060151430 - Yang; Hui Ou ; et al.	2006-07-13
Etching Process To Avoid Polysilicon Notching App 20060154487 - Wang; Shiang-Bau ; et al.	2006-07-13
Process for improving dielectric properties in low-k organosilicate dielectric material Grant 7,074,727 - Hsu , et al. July 11, 2	2006-07-11
Geometrically optimized spacer to improve device performance App 20060148157 - Tao; Hun-Jan ; et al.	2006-07-06
Method to form a metal silicide gate device Grant 7,067,391 - Chan , et al. June 27, 2	2006-06-27
Bi-layer photoresist dry development and reactive ion etch method Grant 7,067,235 - Tsai , et al. June 27, 2	2006-06-27
Method for fabricating a hard mask polysilicon gate Grant 7,060,628 - Huang , et al. June 13, 2	2006-06-13
CMOS device with selectively formed and backfilled semiconductor substrate areas to improve device performance App 20060118878 - Huang; Yi-Chun ; et al.	2006-06-08
Process for patterning high-k dielectric material Grant 7,037,849 - Chiu , et al. May 2, 2	2006-05-02
Dielectric etching method to prevent photoresist damage and bird's beak App 20060086690 - Tsai; Ming-Huan ; et al.	2006-04-27
Method and system for processing multi-layer films Grant 7,033,518 - Yang , et al. April 25, 2	2006-04-25
Low oxygen content photoresist stripping process for low dielectric constant materials Grant 7,029,992 - Shieh , et al. April 18, 2	2006-04-18
Methods and structures for critical dimension and profile measurement App 20060073620 - Shieh; Jyu-Horng ; et al.	2006-04-06
Wet cleaning method to eliminate copper corrosion Grant 7,022,610 - Chou , et al. April 4, 2	2006-04-04
Method of forming a stacked capacitor structure with increased surface area for a DRAM device Grant 7,023,042 - Chan , et al. April 4, 2	2006-04-04
Method for photoresist stripping and treatment of low-k dielectric material App 20060063386 - Tsai; Jang-Shiang ; et al.	2006-03-23
Wet etchant composition and method for etching HfO2 and ZrO2 App 20060054597 - Perng; Baw-Ching ; et al.	2006-03-16
Plasma treatment and etching process for ultra-thin dielectric films Grant 7,008,878 - Hsu , et al. March 7, 2	2006-03-07
Large-scale trimming for ultra-narrow gates Grant 7,008,866 - Huang , et al. March 7, 2	2006-03-07
In-situ critical dimension measrument App 20060046323 - Wang; Shiang-Bau ; et al.	2006-03-02
Low Oxygen Content Photoresist Stripping Process For Low Dielectric Constant Materials App 20060040474 - Shieh; Jyu-Horng ; et al.	2006-02-23
Method for fabricating a recessed channel field effect transistor (FET) device App 20060033158 - Diaz; Carlos H. ; et al.	2006-02-16
Wafer clean process App 20050274393 - Perng, Baw-Ching ; et al.	2005-12-15
Method for fabricating a recessed channel field effect transistor (FET) device Grant 6,974,730 - Diaz , et al. December 13, 2	2005-12-13
Wet etchant composition and method for etching HfO2 and ZrO2 Grant 6,969,688 - Perng , et al. November 29, 2	2005-11-29
Method of forming silicided gate structure App 20050253204 - Chan, Bor-Wen ; et al.	2005-11-17
Process for removing organic materials during formation of a metal interconnect App 20050245082 - Perng, Baw-Ching ; et al.	2005-11-03
Method for fabricating a hard mask polysilicon gate App 20050208773 - Huang, Ming-Jie ; et al.	2005-09-22
Novel approach to improve line end shortening App 20050191832 - Huang, Ming-Jie ; et al.	2005-09-01
Dual damascene intermediate structure and method of fabricating same App 20050189653 - Tao, Hun-Jan ; et al.	2005-09-01
Optical scatterometry method of sidewall spacer analysis App 20050185197 - Tao, Hun-Jan ; et al.	2005-08-25
Seal ring design without stop layer punch through during via etch App 20050184388 - Shih, Hsin-Ching ; et al.	2005-08-25
Method to form a metal silicide gate device App 20050179098 - Chan, Bor-Wen ; et al.	2005-08-18
Process for patterning high-k dielectric material App 20050181590 - Chiu, Hsien-Kuang ; et al.	2005-08-18
Method and apparatus for backside polymer reduction in dry-etch process App 20050164506 - Chen, Huang-Ming ; et al.	2005-07-28
Lateral etch inhibited multiple etch method for etching material etchable with oxygen containing plasma App 20050158666 - Liu, Jen-Cheng ; et al.	2005-07-21
Method for forming novel BARC open for precision critical dimension control App 20050153538 - Tsai, Ming Huan ; et al.	2005-07-14
In-situ discharge to avoid arcing during plasma etch processes Grant 6,914,007 - Ma , et al. July 5, 2	2005-07-05
Large-scale trimming for ultra-narrow gates App 20050133827 - Huang, Ming-Jie ; et al.	2005-06-23
Plasma treatment and etching process for ultra-thin dielectric films App 20050136680 - Hsu, Ju-Wang ; et al.	2005-06-23
Method for fabricating a recessed channel filed effect transistor (FET) device App 20050133830 - Diaz, Carlos H. ; et al.	2005-06-23
Wet cleaning method to eliminate copper corrosion App 20050136678 - Chou, Chun-Li ; et al.	2005-06-23
Novel gate structure and method of forming the gate dielectric with mini-spacer App 20050127459 - Chiu, Yuan-Hung ; et al.	2005-06-16
Phosphoric acid free process for polysilicon gate definition App 20050118755 - Lin, Li-Te S. ; et al.	2005-06-02
Method of in-situ damage removal - post O2 dry process App 20050106888 - Chiu, Yuan-Hung ; et al.	2005-05-19
Method for cleaning an integrated circuit device using an aqueous cleaning composition App 20050092348 - Chiang, Ju-Chien ; et al.	2005-05-05
Low K dielectric surface damage control App 20050095869 - Tao, Hun-Jan ; et al.	2005-05-05
Borderless interconnection process Grant 6,878,639 - Tsai , et al. April 12, 2	2005-04-12
Borderless Interconnection Process App 20050064721 - Tsai, Ming-Huan ; et al.	2005-03-24
Method of fabricating a MOSFET device with metal containing gate structures Grant 6,869,868 - Chiu , et al. March 22, 2	2005-03-22
Gate structure and method of forming the gate dielectric with mini-spacer Grant 6,867,084 - Chiu , et al. March 15, 2	2005-03-15
Aqueous cleaning composition containing copper-specific corrosion inhibitor Grant 6,864,193 - Chou , et al. March 8, 2	2005-03-08
Phosphoric acid free process for polysilicon gate definition Grant 6,849,531 - Lin , et al. February 1, 2	2005-02-01
Process for improving dielectric properties in low-k organosilicate dielectric material App 20050010000 - Hsu, Peng-Fu ; et al.	2005-01-13
Method and system for processing multi-layer films App 20040262260 - Yang, Hui Ou ; et al.	2004-12-30
Novel approach to improve line end shortening App 20040266134 - Huang, Ming-Jie ; et al.	2004-12-30
Process for patterning high-k dielectric material App 20040262262 - Chiu, Hsien-Kuang ; et al.	2004-12-30
Bi-level resist structure and fabrication method for contact holes on semiconductor substrates App 20040248414 - Tsai, Ming-Huan ; et al.	2004-12-09
Method of pull back for forming shallow trench isolation Grant 6,828,248 - Tao , et al. December 7, 2	2004-12-07
Method using wet etching to trim a critical dimension Grant 6,828,205 - Tsai , et al. December 7, 2	2004-12-07
Process of dual or single damascene utilizing separate etching and DCM apparati Grant 6,821,880 - Tao , et al. November 23, 2	2004-11-23
Advanced control for plasma process Grant 6,812,044 - Chiu , et al. November 2, 2	2004-11-02
Method of forming a shallow trench isolation region in strained silicon layer and in an underlying on silicon - germanium layer App 20040209437 - Chiu, Hsien-Kuang ; et al.	2004-10-21
Wet cleaning cavitation system and method to remove particulate wafer contamination App 20040187891 - Chou, Chun-Li ; et al.	2004-09-30
Dynamic Feed Forward Temperature Control To Achieve Cd Etching Uniformity App 20040182822 - Chen, Li-Shiun ; et al.	2004-09-23
Iteratively selective gas flow control and dynamic database to achieve CD uniformity App 20040185584 - Lin, Li-Te S. ; et al.	2004-09-23
Approach to improve line end shortening Grant 6,794,230 - Huang , et al. September 21, 2	2004-09-21
Dynamic feed forward temperature control to achieve CD etching uniformity Grant 6,794,302 - Chen , et al. September 21, 2	2004-09-21
Aqueous Cleaning Composition Containing Copper-specific Corrosion Inhibitor App 20040175964 - Chou, Chun-Li ; et al.	2004-09-09
Bi-layer photoresist method for forming high resolution semiconductor features Grant 6,787,455 - Tsai , et al. September 7, 2	2004-09-07
Bi-level resist structure and fabrication method for contact holes on semiconductor substrates Grant 6,780,782 - Tsai , et al. August 24, 2	2004-08-24
In-situ discharge to avoid arcing during plasma etch processes App 20040161930 - Ma, Ching-Hui ; et al.	2004-08-19
Method of etching a silicon containing layer using multilayer masks Grant 6,777,340 - Chiu , et al. August 17, 2	2004-08-17
Photoresist intensive patterning and processing App 20040157444 - Chiu, Yuan-Hung ; et al.	2004-08-12
Bi-level Resist Structure And Fabrication Method For Contact Holes On Semiconductor Substrates App 20040152328 - Tsai, Ming-Huan ; et al.	2004-08-05
Method of forming a stacked capacitor structure with increased surface area for a DRAM device App 20040142531 - Chan, Bor-Wen ; et al.	2004-07-22
Multiple etch method for fabricating spacer layers Grant 6,764,911 - Hsu , et al. July 20, 2	2004-07-20
Dual hard mask layer patterning method Grant 6,764,903 - Chan , et al. July 20, 2	2004-07-20
Advanced control for plasma process App 20040121603 - Chiu, Hsien-Kuang ; et al.	2004-06-24
Method Of Fabricating A Mosfet Device With Metal Containing Gate Structures App 20040113171 - Chiu, Hsien-Kuang ; et al.	2004-06-17
Novel approach to improve line end shortening App 20040087092 - Huang, Ming-Jie ; et al.	2004-05-06
Tool for cleaning substrates App 20040074521 - Shih, Hsin-Ching ; et al.	2004-04-22
Bi-layer photoresist dry development and reactive ion etch method Grant 6,720,132 - Tsai , et al. April 13, 2	2004-04-13
Wet etchant composition and method for etching HfO2 and ZrO2 App 20040067657 - Perng, Baw-Ching ; et al.	2004-04-08
Method of forming a stacked capacitor structure with increased surface area for a DRAM device Grant 6,706,591 - Chan , et al. March 16, 2	2004-03-16
Metal silicide etch resistant plasma etch method Grant 6,706,640 - Tsai , et al. March 16, 2	2004-03-16
Partial photoresist etching Grant 6,686,129 - Chang , et al. February 3, 2	2004-02-03
Multiple etch method for fabricating split gate field effect transistor (FET) device Grant 6,656,796 - Chan , et al. December 2, 2	2003-12-02
Scanning type etcher design for precision process control App 20030209321 - Tao, Hun-Jan ; et al.	2003-11-13
Multiple etch method for fabricating spacer layers App 20030211697 - Hsu, Jw-Wang ; et al.	2003-11-13
Borderless contact with buffer layer Grant 6,630,398 - Tsai , et al. October 7, 2	2003-10-07
Plasma etch method for forming patterned layer with enhanced critical dimension (CD) control Grant 6,620,631 - Tao , et al. September 16, 2	2003-09-16
Method using wet etching to trim a critical dimension App 20030148619 - Tsai, Ming-Huan ; et al.	2003-08-07
Method for wet etching of high k thin film at low temperature App 20030148625 - Ho, Hsieh Yue ; et al.	2003-08-07
Multiple etch method for fabricating split gate field effect transistor (FET) device App 20030134435 - Chan, Bor-Wen ; et al.	2003-07-17
Bi-layer photoresist dry development and reactive ion etch method App 20030134231 - Tsai, Ming Huan ; et al.	2003-07-17
Bi-layer photoresist dry development and reactive ion etch method App 20030129539 - Tsai, Ming Huan ; et al.	2003-07-10
Bi-layer photoresist method for forming high resolution semiconductor features App 20030119330 - Tsai, Ming-Huan ; et al.	2003-06-26
Hard mask trimming with thin hard mask layer and top protection layer App 20030096465 - Chen, Cheng-Ku ; et al.	2003-05-22
Partial photoresist etching App 20030073041 - Chang, Ming-Ching ; et al.	2003-04-17
Integrated approach for controlling top dielectric loss during spacer etching Grant 6,498,067 - Perng , et al. December 24, 2	2002-12-24
In situ dry etching procedure to form a borderless contact hole Grant 6,497,993 - Chiu , et al. December 24, 2	2002-12-24
Borderless contact with buffer layer App 20020192943 - Tsai, Ming Huan ; et al.	2002-12-19
Method to pattern polysilicon gates with high-k material gate dielectric Grant 6,479,403 - Tsei , et al. November 12, 2	2002-11-12
Methods of adhesion promoter between low-K layer and underlying insulating layer Grant 6,472,335 - Tsai , et al. October 29, 2	2002-10-29
Plasma etch method for forming patterned oxygen containing plasma etchable layer Grant 6,440,863 - Tsai , et al. August 27, 2	2002-08-27
Selectivity oxide-to-oxynitride etch process using a fluorine containing gas, an inert gas and a weak oxidant Grant 6,436,841 - Tsai , et al. August 20, 2	2002-08-20
Partial resist free approach in contact etch to improve W-filling Grant 6,407,002 - Lin , et al. June 18, 2	2002-06-18
Method to improve adhesion between an overlying oxide hard mask and an underlying low dielectric constant material Grant 6,331,480 - Tsai , et al. December 18, 2	2001-12-18
Method of forming dual damascene structure with improved contact/via edge integrity Grant 6,326,296 - Tsai , et al. December 4, 2	2001-12-04
Process for forming an integrated contact or via Grant 6,319,822 - Chen , et al. November 20, 2	2001-11-20
Top corner rounding for shallow trench isolation Grant 6,265,317 - Chiu , et al. July 24, 2	2001-07-24
Post gate etch cleaning process for self-aligned gate mosfets Grant 6,242,350 - Tao , et al. June 5, 2	2001-06-05
Post photodevelopment isotropic radiation treatment method for forming patterned photoresist layer with attenuated linewidth Grant 6,183,937 - Tsai , et al. February 6, 2	2001-02-06
Method of patterning narrow gate electrode Grant 6,174,818 - Tao , et al. January 16, 2	2001-01-16
Method of forming salicide poly gate with thin gate oxide and ultra narrow gate width Grant 6,165,881 - Tao , et al. December 26, 2	2000-12-26
Method for patterning a polysilicon gate in deep submicron technology Grant 6,156,629 - Tao , et al. December 5, 2	2000-12-05
Method of preventing corrosion of a metal structure exposed in a non-fully landed via Grant 6,130,167 - Tao , et al. October 10, 2	2000-10-10
Method for cleaning silicon wafers with deep trenches Grant 6,129,091 - Lee , et al. October 10, 2	2000-10-10
HCL in overetch with hard mask to improve metal line etching profile Grant 6,043,163 - Tsai , et al. March 28, 2	2000-03-28
Chemistry for etching organic low-k materials Grant 6,040,248 - Chen , et al. March 21, 2	2000-03-21
Method for patterning a polysilicon gate with a thin gate oxide in a polysilicon etcher Grant 6,037,266 - Tao , et al. March 14, 2	2000-03-14
Method for etching reliable small contact holes with improved profiles for semiconductor integrated circuits using a carbon doped hard mask Grant 6,025,273 - Chen , et al. February 15, 2	2000-02-15
Hard mask method for forming chlorine containing plasma etched layer Grant 5,981,398 - Tsai , et al. November 9, 1	1999-11-09
Method of forming a shallow trench isolation using oxide slope etching Grant 5,930,644 - Tsai , et al. July 27, 1	1999-07-27
Optical emisson spectroscopy (OES) method for monitoring and controlling plasma etch process when forming patterned layers Grant 5,871,658 - Tao , et al. February 16, 1	1999-02-16
Etch rate monitoring by optical emission spectroscopy Grant 5,694,207 - Hung , et al. December 2, 1	1997-12-02