Sung; Hung-Cheng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sung; Hung-Cheng.The latest application filed is for "method of converting between non-volatile memory technologies and system for implementing the method".

Company Profile

0.61.44

Sung; Hung-Cheng - Kaohsiung TW
SUNG; Hung-Cheng - Kaohsiung City TW
Sung; Hung-Cheng - Hsinchu N/A TW
Sung; Hung-Cheng - Hsin-Chu TW
Sung; Hung-Cheng - Hsinchu City TW
Sung; Hung-Cheng - Baoshan Township TW
Sung; Hung-Cheng - Baoshan Hsinchu TW
Sung, Hung-Cheng - Hsinchu County TW
Sung; Hung-Cheng - Kaohsinng TW
Sung; Hung-Cheng - Paoshan Hsin-Chu TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of converting between non-volatile memory technologies and system for implementing the method Grant 9,589,095 - Sung , et al. March 7, 2	2017-03-07
Method Of Converting Between Non-volatile Memory Technologies And System For Implementing The Method App 20160034629 - SUNG; Hung-Cheng ; et al.	2016-02-04
Method of converting between non-volatile memory technologies and system for implementing the method Grant 9,171,120 - Sung , et al. October 27, 2	2015-10-27
Method Of Converting Between Non-volatile Memory Technologies And System For Implementing The Method App 20150095868 - SUNG; Hung-Cheng ; et al.	2015-04-02
Method of converting between non-volatile memory technologies and system for implementing the method Grant 8,930,866 - Sung , et al. January 6, 2	2015-01-06
Semiconductor device with self-aligned interconnects Grant 8,906,767 - Chih , et al. December 9, 2	2014-12-09
Method Of Converting Between Non-volatile Memory Technologies And System For Implementing The Method App 20140256099 - SUNG; Hung-Cheng ; et al.	2014-09-11
Semiconductor Device With Self-aligned Interconnects App 20140094009 - Chih; Yue-Der ; et al.	2014-04-03
Semiconductor device with self-aligned interconnects Grant 8,610,220 - Chih , et al. December 17, 2	2013-12-17
Semiconductor Device With Self-aligned Interconnects App 20130307080 - Chih; Yue-Der ; et al.	2013-11-21
Memory cell having a shared programming gate Grant 8,384,149 - Wang , et al. February 26, 2	2013-02-26
Flash memory cell with split gate structure and method for forming the same Grant 7,951,670 - Huang , et al. May 31, 2	2011-05-31
Programmable non-volatile memory (PNVM) device Grant 7,880,217 - Sung , et al. February 1, 2	2011-02-01
Split-gate memory cells and fabrication methods thereof Grant 7,667,261 - Hsieh , et al. February 23, 2	2010-02-23
Split-gate memory cells and fabrication methods thereof Grant 7,652,318 - Hsieh , et al. January 26, 2	2010-01-26
Scalable split-gate flash memory cell with high source-coupling ratio Grant 7,608,884 - Hsu , et al. October 27, 2	2009-10-27
High write and erase efficiency embedded flash cell Grant 7,557,402 - Shyu , et al. July 7, 2	2009-07-07
Memory cell having a shared programming gate App 20080258200 - Wang; Shih Wei ; et al.	2008-10-23
Method to increase coupling ratio of source to floating gate in split-gate flash Grant 7,417,278 - Hsieh , et al. August 26, 2	2008-08-26
Split-gate memory cells and fabrication methods thereof App 20080121975 - Hsieh; Chang-Jen ; et al.	2008-05-29
Split-gate memory cells and fabrication methods thereof App 20080105917 - Hsieh; Chang-Jen ; et al.	2008-05-08
Uniform channel programmable erasable flash EEPROM Grant 7,335,941 - Hsu , et al. February 26, 2	2008-02-26
Logic compatible non-volatile memory cell Grant 7,326,994 - Hsu , et al. February 5, 2	2008-02-05
Flash memory cell with split gate structure and method for forming the same App 20070205436 - Huang; Chen-Ming ; et al.	2007-09-06
Novel Architecture To Monitor Isolation Integrity Between Floating Gate And Source Line App 20070181936 - Hsieh; Chang-Jen ; et al.	2007-08-09
Architecture to monitor isolation integrity between floating gate and source line Grant 7,226,828 - Hsieh , et al. June 5, 2	2007-06-05
Logic compatible non-volatile memory cell App 20070120172 - Hsu; Te-Hsun ; et al.	2007-05-31
High write and erase efficiency embedded flash cell App 20070063248 - Shyu; Der-Shin ; et al.	2007-03-22
High write and erase efficiency embedded flash cell Grant 7,176,083 - Shyu , et al. February 13, 2	2007-02-13
Programmable non-volatile memory (PNVM) device App 20070023822 - Sung; Hung-Cheng ; et al.	2007-02-01
Scalable spilt-gate flash memory cell with high source-coupling ratio App 20060214214 - Hsu; Te-Hsun ; et al.	2006-09-28
Methods And Devices For Determining Writing Current For Memory Cells App 20060203537 - Sung; Hung-Cheng ; et al.	2006-09-14
Methods and devices for determining writing current for memory cells Grant 7,102,919 - Sung , et al. September 5, 2	2006-09-05
Method of forming an embedded flash memory device Grant 7,056,791 - Shyu , et al. June 6, 2	2006-06-06
Method of forming separated charge-holding regions in a semiconductor device App 20060046403 - Chu; Wen-Ting ; et al.	2006-03-02
Method to increase coupling ratio of source to floating gate in split-gate flash Grant 7,001,809 - Hsieh , et al. February 21, 2	2006-02-21
Uniform channel programmable erasable flash EEPROM App 20060014345 - Hsu; Te-Hsun ; et al.	2006-01-19
High write and erase efficiency embedded flash cell App 20050282337 - Shyu, Der-Shin ; et al.	2005-12-22
Nano-crystal non-volatile memory device employing oxidation inhibiting and charge storage enhancing layer App 20050258467 - Wang, Shih-Wei ; et al.	2005-11-24
Novel architecture to monitor isolation integrity between floating gate and source line App 20050239247 - Hsieh, Chang-Jen ; et al.	2005-10-27
Method to increase coupling ratio of source to floating gate in split-gate flash App 20050207264 - Hsieh, Chia-Ta ; et al.	2005-09-22
Method to make minimal spacing between floating gates in split gate flash App 20050156224 - Hsieh, Chia-Ta ; et al.	2005-07-21
Method to make minimal spacing between floating gates in split gate flash Grant 6,881,629 - Hsieh , et al. April 19, 2	2005-04-19
Embedded flash memory cell having improved programming and erasing efficiency Grant 6,878,986 - Shyu , et al. April 12, 2	2005-04-12
Method of fabricating semiconductor device with separate periphery and cell region etching steps Grant 6,872,667 - Shieh , et al. March 29, 2	2005-03-29
Method To Make Minimal Spacing Between Floating Gates In Split Gate Flash App 20050054162 - Hsieh, Chia-Ta ; et al.	2005-03-10
Process for flash memory cell Grant 6,849,499 - Sung , et al. February 1, 2	2005-02-01
Method of forming an embedded flash memory device App 20040248367 - Shyu, Der-Shin ; et al.	2004-12-09
Process for high voltage oxide and select gate poly for split-gate flash memory Grant 6,828,183 - Sung , et al. December 7, 2	2004-12-07
Architecture to suppress bit-line leakage Grant 6,819,593 - Shyu , et al. November 16, 2	2004-11-16
Embedded flash memory cell having improved programming and erasing efficiency App 20040188750 - Shyu, Der-Shin ; et al.	2004-09-30
Method to fabricate a square word line poly spacer App 20040121545 - Chen, Bi-Ling ; et al.	2004-06-24
Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation Grant 6,753,569 - Lin , et al. June 22, 2	2004-06-22
Novel architecture to suppress bit-line leakage App 20040114435 - Shyu, Der-Shin ; et al.	2004-06-17
PIP capacitor for split-gate flash process Grant 6,674,118 - Yeh , et al. January 6, 2	2004-01-06
Poly etching solution to improve silicon trench for low STI profile Grant 6,649,489 - Chang , et al. November 18, 2	2003-11-18
Method to fabricate poly tip in split gate flash Grant 6,635,922 - Hsieh , et al. October 21, 2	2003-10-21
Novel process for flash memory cell App 20030134473 - Sung, Hung-Cheng ; et al.	2003-07-17
Split gate flash cell for multiple storage Grant 6,504,206 - Sung , et al. January 7, 2	2003-01-07
Novel split gate flash cell for multiple storage App 20020130356 - Sung, Hung-Cheng ; et al.	2002-09-19
Method to increase coupling ratio of source to floating gate in split-gate flash App 20020109181 - Hsieh, Chia-Ta ; et al.	2002-08-15
Split gate field effect transistor (FET) device with enhanced electrode registration and method for fabrication thereof App 20020064910 - Chen, Han-Ping ; et al.	2002-05-30
Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation App 20020055205 - Lin, Yai-Fen ; et al.	2002-05-09
Method to increase coupling ratio of source to floating gate in split-gate flash Grant 6,380,583 - Hsieh , et al. April 30, 2	2002-04-30
Method to increase coupling ratio of source to floating gate in split-gate flash Grant 6,355,527 - Lin , et al. March 12, 2	2002-03-12
Novel split-gate flash cell App 20020027241 - Sung, Hung-Cheng ; et al.	2002-03-07
Structure with protruding source in split-gate flash App 20020016039 - Hsieh, Chia-Ta ; et al.	2002-02-07
Split-gate flash cell for virtual ground architecture App 20010033513 - Sung, Hung-Cheng ; et al.	2001-10-25
Split-gate flash cell for virtual ground architecture App 20010028577 - Sung, Hung-Cheng ; et al.	2001-10-11
PIP capacitor for split-gate flash process App 20010026973 - Yeh, Chung-Ker ; et al.	2001-10-04
Novel method for forming split-gate flash cell for salicide and self-align contact App 20010026968 - Sung, Hung-Cheng ; et al.	2001-10-04
Method to fabricate a new structure with multi-self-aligned for split-gate flash App 20010022375 - Hsieh, Chia-Ta ; et al.	2001-09-20
Method of forming split-gate flash cell for salicide and self-align contact Grant 6,284,596 - Sung , et al. September 4, 2	2001-09-04
Method of fabricating buried source to shrink chip size in memory array App 20010017387 - Hsieh, Chia-Ta ; et al.	2001-08-30
Method for shrinking array dimensions of split gate flash memory device using multilayer etching to define cell and source line and device manufactured thereby App 20010015455 - Hsieh, Chia-Ta ; et al.	2001-08-23
PIP capacitor for split-gate flash process Grant 6,277,686 - Yeh , et al. August 21, 2	2001-08-21
A new structure to fabricate split-gate with self-aligned source and self-aligned floating gate to control gate App 20010012662 - Hsieh, Chia-Ta ; et al.	2001-08-09
Poly tip and self aligned source for split-gate flash cell Grant 6,259,131 - Sung , et al. July 10, 2	2001-07-10
Implant method to improve characteristics of high voltage isolation and high voltage breakdown Grant 6,251,744 - Su , et al. June 26, 2	2001-06-26
Split gate flash with step poly to improve program speed Grant 6,229,176 - Hsieh , et al. May 8, 2	2001-05-08
Forming self-align source line for memory array Grant 6,214,662 - Sung , et al. April 10, 2	2001-04-10
Method of fabricating buried source to shrink chip size in memory array Grant 6,207,515 - Hsieh , et al. March 27, 2	2001-03-27
Method to fabricate poly tip in split-gate flash Grant 6,165,845 - Hsieh , et al. December 26, 2	2000-12-26
Method to increase coupling ratio of source to floating gate in split-gate flash Grant 6,159,801 - Hsieh , et al. December 12, 2	2000-12-12
Clean process for manufacturing of split-gate flash memory device having floating gate electrode with sharp peak Grant 6,130,132 - Hsieh , et al. October 10, 2	2000-10-10
Method of manufacture of undoped polysilicon as the floating-gate of a split-gate flash cell Grant 6,121,088 - Lin , et al. September 19, 2	2000-09-19
Method to fabricate sharp tip of poly in split gate flash Grant 6,090,668 - Lin , et al. July 18, 2	2000-07-18
Method of fabricating buried source to shrink cell dimension and increase coupling ratio in split-gate flash Grant 6,017,795 - Hsieh , et al. January 25, 2	2000-01-25
Program and erase method for a split gate flash EEPROM Grant 6,005,809 - Sung , et al. December 21, 1	1999-12-21
Method of forming sharp beak of poly to improve erase speed in split-gate flash EEPROM Grant 5,970,371 - Hsieh , et al. October 19, 1	1999-10-19
Planarized plug-diode mask ROM structure Grant 5,962,903 - Sung , et al. October 5, 1	1999-10-05
Method of fabricating step poly to improve program speed in split gate flash Grant 5,879,992 - Hsieh , et al. March 9, 1	1999-03-09
Method of forming sharp beak of poly by nitrogen implant to improve erase speed for split-gate flash Grant 5,858,840 - Hsieh , et al. January 12, 1	1999-01-12
Metallic source line and drain plug with self-aligned contacts for flash memory device Grant 5,814,862 - Sung , et al. September 29, 1	1998-09-29
Self-aligned source/drain mask ROM memory cell using trench etched channel Grant 5,751,040 - Chen , et al. May 12, 1	1998-05-12
Method of manufacturing self-aligned bit-line and device manufactured therby Grant 5,734,607 - Sung , et al. March 31, 1	1998-03-31
Method of manufacturing metallic source line, self-aligned contact for flash memory devices Grant 5,631,179 - Sung , et al. May 20, 1	1997-05-20
Method for making self-aligned source/drain mask ROM memory cell using trench etched channel Grant 5,595,927 - Chen , et al. January 21, 1	1997-01-21
Method of manufacturing self-aligned bit-line during EPROM fabrication Grant 5,589,413 - Sung , et al. December 31, 1	1996-12-31
Process for manufacturing a plug-diode mask ROM Grant 5,441,907 - Sung , et al. August 15, 1	1995-08-15

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