Sung; Chiakang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sung; Chiakang.The latest application filed is for "programmable high-speed i/o interface".

Company Profile

0.197.39

Sung; Chiakang - San Jose CA
Sung; Chiakang - Milpitas CA
Sung; Chiakang - Milipitas CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
On-die input reference voltage with self-calibrating duty cycle correction Grant 9,711,189 - Wang , et al. July 18, 2	2017-07-18
Integrated circuit with bonding circuits for bonding memory controllers Grant 9,558,131 - Schulz , et al. January 31, 2	2017-01-31
Programmable High-Speed I/O Interface App 20170005661 - Wang; Bonnie I. ; et al.	2017-01-05
Programmable High-Speed I/O Interface App 20170005662 - Wang; Bonnie I. ; et al.	2017-01-05
Distribution of return paths for improved impedance control and reduced crosstalk Grant 9,504,156 - Rangan , et al. November 22, 2	2016-11-22
Programmable high-speed I/O interface Grant 9,473,145 - Wang , et al. October 18, 2	2016-10-18
Memory controllers with dynamic port priority assignment capabilities Grant 9,208,109 - Chu , et al. December 8, 2	2015-12-08
High speed IO buffer Grant 9,166,591 - Chan , et al. October 20, 2	2015-10-20
Multiple data rate interface architecture Grant 9,166,589 - Pan , et al. October 20, 2	2015-10-20
Circuit design technique for DQS enable/disable calibration Grant 9,158,873 - Chong , et al. October 13, 2	2015-10-13
Systems and methods for memory controller reference voltage calibration Grant 9,111,603 - Wang , et al. August 18, 2	2015-08-18
Adjustable drive strength input-output buffer circuitry Grant 9,099,999 - Wang , et al. August 4, 2	2015-08-04
Duty cycle distortion correction circuitry Grant 9,048,823 - Bui , et al. June 2, 2	2015-06-02
Systems and methods for providing memory controllers with memory access request merging capabilities Grant 9,032,162 - Chang , et al. May 12, 2	2015-05-12
Data strobe enable circuitry Grant 9,001,595 - Shiao , et al. April 7, 2	2015-04-07
Programmable High-speed I/o Interface App 20140340125 - Wang; Bonnie I. ; et al.	2014-11-20
Dynamic termination-impedance control for bidirectional I/O pins Grant 8,854,078 - Wang , et al. October 7, 2	2014-10-07
Programmable high-speed I/O interface Grant 8,829,948 - Wang , et al. September 9, 2	2014-09-09
Circuit design technique for DQS enable/disable calibration Grant 8,787,097 - Chong , et al. July 22, 2	2014-07-22
Method and apparatus for minimizing skew between signals Grant 8,779,754 - Chong , et al. July 15, 2	2014-07-15
Digital PVT compensation for delay chain Grant 8,680,905 - Nagarajan , et al. March 25, 2	2014-03-25
Write-leveling implementation in programmable logic devices Grant 8,671,303 - Chong , et al. March 11, 2	2014-03-11
Multiple Data Rate Interface Architecture App 20140049287 - Pan; Philip ; et al.	2014-02-20
Data strobe enable circuitry Grant 8,630,131 - Shiao , et al. January 14, 2	2014-01-14
Duty cycle correction circuit for memory interfaces in integrated circuits Grant 8,624,647 - Chong , et al. January 7, 2	2014-01-07
Input-output circuit and method of improving input-output signals Grant 8,610,462 - Wang , et al. December 17, 2	2013-12-17
High performance memory interface circuit architecture Grant 8,593,195 - Huang , et al. November 26, 2	2013-11-26
Multiple data rate interface architecture Grant 8,575,957 - Pan , et al. November 5, 2	2013-11-05
Duty Cycle Distortion Correction Circuitry App 20130285725 - Bui; John Henry ; et al.	2013-10-31
Programmable High-speed I/o Interface App 20130278290 - Wang; Bonnie I. ; et al.	2013-10-24
Variation compensation circuitry for memory interface Grant 8,565,034 - Lu , et al. October 22, 2	2013-10-22
Programmable output buffer Grant 8,531,205 - Wang , et al. September 10, 2	2013-09-10
Programmable high-speed interface Grant 8,487,665 - Wang , et al. July 16, 2	2013-07-16
Duty cycle distortion correction circuitry Grant 8,476,947 - Bui , et al. July 2, 2	2013-07-02
Duty Cycle Distortion Correction Circuitry App 20130120044 - Bui; John Henry ; et al.	2013-05-16
Techniques for buffering single-ended and differential signals Grant 8,400,186 - Wang , et al. March 19, 2	2013-03-19
Configurable input-output (I/O) circuitry with pre-emphasis circuitry Grant 8,390,315 - Wang , et al. March 5, 2	2013-03-05
Techniques for phase adjustment Grant 8,384,460 - Sung , et al. February 26, 2	2013-02-26
Dead zone detection for phase adjustment Grant 8,368,449 - Bui , et al. February 5, 2	2013-02-05
Memory Controllers With Dynamic Port Priority Assignment Capabilities App 20120311277 - Chu; Michael H.M. ; et al.	2012-12-06
High-performance memory interface circuit architecture Grant 8,305,121 - Huang , et al. November 6, 2	2012-11-06
Techniques for generating PVT compensated phase offset to improve accuracy of a locked loop Grant 8,237,475 - Nagarajan , et al. August 7, 2	2012-08-07
Multiple Data Rate Interface Architecture App 20120146700 - Pan; Philip ; et al.	2012-06-14
Write-leveling Implementation In Programmable Logic Devices App 20120106264 - Chong; Yan ; et al.	2012-05-03
Techniques for providing multiple delay paths in a delay circuit Grant 8,159,277 - Nagarajan , et al. April 17, 2	2012-04-17
Techniques for phase adjustment Grant 8,149,038 - Sung , et al. April 3, 2	2012-04-03
Techniques for providing reduced duty cycle distortion Grant 8,130,016 - Nagarajan , et al. March 6, 2	2012-03-06
Write-leveling implementation in programmable logic devices Grant 8,122,275 - Chong , et al. February 21, 2	2012-02-21
Multiple data rate interface architecture Grant 8,098,082 - Pan , et al. January 17, 2	2012-01-17
Programmable High-speed Interface App 20110227606 - Wang; Bonnie I. ; et al.	2011-09-22
Dynamic termination-impedance control for bidirectional I/O pins Grant 8,022,723 - Wang , et al. September 20, 2	2011-09-20
Method And Apparatus For Minimizing Skew Between Signals App 20110221497 - Chong; Yan ; et al.	2011-09-15
Level shifter circuits and methods Grant 7,994,821 - Wang , et al. August 9, 2	2011-08-09
Read-leveling implementations for DDR3 applications on an FPGA Grant 7,990,786 - Chu , et al. August 2, 2	2011-08-02
Duty Cycle Correction Circuit For Memory Interfaces In Integrated Circuits App 20110175657 - Chong; Yan ; et al.	2011-07-21
Techniques for on-chip termination Grant 7,973,553 - Wang , et al. July 5, 2	2011-07-05
High-performance memory interface circuit architecture Grant 7,969,215 - Huang , et al. June 28, 2	2011-06-28
Techniques for Providing Reduced Duty Cycle Distortion App 20110074477 - Nagarajan; Pradeep ; et al.	2011-03-31
Techniques for providing multiple delay paths in a delay circuit Grant 7,893,739 - Nagarajan , et al. February 22, 2	2011-02-22
Method and apparatus for minimizing skew between signals Grant 7,884,619 - Chong , et al. February 8, 2	2011-02-08
Multiple data rate interface architecture Grant 7,859,304 - Pan , et al. December 28, 2	2010-12-28
Techniques for providing adjustable on-chip termination impedance Grant 7,825,682 - Wang , et al. November 2, 2	2010-11-02
Digitally controlled delay-locked loops Grant 7,746,134 - Lu , et al. June 29, 2	2010-06-29
Self-compensating delay chain for multiple-date-rate interfaces Grant 7,725,755 - Chong , et al. May 25, 2	2010-05-25
Input buffer for multiple differential I/O standards Grant 7,710,149 - Chung , et al. May 4, 2	2010-05-04
Write-side calibration for data interface Grant 7,706,996 - Chong , et al. April 27, 2	2010-04-27
Method and apparatus for quantifying and minimizing skew between signals Grant 7,671,579 - Chong , et al. March 2, 2	2010-03-02
Programmable High-speed Interface App 20100045349 - Wang; Bonnie I. ; et al.	2010-02-25
Read-leveling Implementations For Ddr3 Applications On An Fpga App 20090296503 - Chu; Michael H.M. ; et al.	2009-12-03
Read-leveling implementations for DDR3 applications on an FPGA Grant 7,593,273 - Chu , et al. September 22, 2	2009-09-22
Dynamic control of memory interface timing Grant 7,589,556 - Tan , et al. September 15, 2	2009-09-15
Clock edge de-skew Grant 7,590,879 - Kim , et al. September 15, 2	2009-09-15
Programmable high-speed interface Grant 7,586,341 - Wang , et al. September 8, 2	2009-09-08
Differential output with low output skew Grant 7,551,014 - Wang , et al. June 23, 2	2009-06-23
High-performance memory interface circuit architecture Grant 7,535,275 - Huang , et al. May 19, 2	2009-05-19
I/O duty cycle and skew control Grant 7,525,360 - Wang , et al. April 28, 2	2009-04-28
Read-side calibration for data interface Grant 7,509,223 - Chong , et al. March 24, 2	2009-03-24
Innovated technique to reduce memory interface write mode SSN in FPGA Grant 7,492,185 - Huang , et al. February 17, 2	2009-02-17
Multiple data rate interface architecture Grant 7,477,074 - Pan , et al. January 13, 2	2009-01-13
Read-leveling Implementations For Ddr3 Applications On An Fpga App 20080291758 - Chu; Michael H.M. ; et al.	2008-11-27
Input buffer for multiple differential I/O standards Grant 7,425,844 - Chung , et al. September 16, 2	2008-09-16
Techniques for providing flexible on-chip termination control on integrated circuits Grant 7,420,386 - Wang , et al. September 2, 2	2008-09-02
Techniques for providing adjustable on-chip termination impedance Grant 7,417,452 - Wang , et al. August 26, 2	2008-08-26
Write-leveling Implementation In Programmable Logic Devices App 20080201597 - Chong; Yan ; et al.	2008-08-21
Programmable High-speed Interface App 20080186056 - Wang; Bonnie I. ; et al.	2008-08-07
Modular I/O bank architecture Grant 7,378,868 - Tyhach , et al. May 27, 2	2008-05-27
Voltage, temperature, and process independent programmable phase shift for PLL Grant 7,358,783 - Wang , et al. April 15, 2	2008-04-15
Innovated technique to reduce memory interface write mode SSN in FPGA Grant 7,330,051 - Huang , et al. February 12, 2	2008-02-12
DQS postamble filtering Grant 7,324,405 - Charagulla , et al. January 29, 2	2008-01-29
Apparatus and methods for providing redundancy in integrated circuits Grant 7,321,518 - Huang , et al. January 22, 2	2008-01-22
Programmable high speed interface Grant 7,315,188 - Wang , et al. January 1, 2	2008-01-01
Apparatus and methods for providing highly effective and area efficient decoupling capacitance in programmable logic devices Grant 7,309,906 - Tyhach , et al. December 18, 2	2007-12-18
Read-Side Calibration for Data Interface App 20070282555 - Chong; Yan ; et al.	2007-12-06
Method and apparatus for protecting a circuit during a hot socket condition Grant 7,304,501 - Wang , et al. December 4, 2	2007-12-04
Write-Side Calibration for Data Interface App 20070277071 - Chong; Yan ; et al.	2007-11-29
High speed IO buffer using auxiliary power supply Grant 7,295,040 - Nguyen , et al. November 13, 2	2007-11-13
Techniques For Providing Flexible On-Chip Termination Control on Integrated Circuits App 20070236247 - Wang; Xiaobao ; et al.	2007-10-11
ESD protection that supports LVDS and OCT Grant 7,250,660 - Huang , et al. July 31, 2	2007-07-31
Modular I/o Bank Architecture App 20070165478 - Tyhach; Jeffrey ; et al.	2007-07-19
Techniques for providing multiple termination impedance values to pins on an integrated circuit Grant 7,239,171 - Wang , et al. July 3, 2	2007-07-03
Programmable low-voltage differential signaling output driver Grant 7,236,018 - Wang , et al. June 26, 2	2007-06-26
Control circuit for self-compensating delay chain for multiple-data-rate interfaces Grant 7,231,536 - Chong , et al. June 12, 2	2007-06-12
High-performance memory interface circuit architecture Grant 7,227,395 - Huang , et al. June 5, 2	2007-06-05
Method and apparatus for protecting a circuit during a hot socket condition App 20070115028 - Wang; Xiaobao ; et al.	2007-05-24
On-chip termination with calibrated driver strength Grant 7,221,193 - Wang , et al. May 22, 2	2007-05-22
Techniques for controlling on-chip termination resistance using voltage range detection Grant 7,218,155 - Chang , et al. May 15, 2	2007-05-15
Input buffer for multiple differential I/O standards Grant 7,215,143 - Chung , et al. May 8, 2	2007-05-08
DLL with adjustable phase shift using processed control signal Grant 7,212,054 - Chang , et al. May 1, 2	2007-05-01
Apparatus and method for controlling a delay chain Grant 7,205,802 - Wang , et al. April 17, 2	2007-04-17
Loop circuitry with low-pass noise filter Grant 7,205,806 - Chong , et al. April 17, 2	2007-04-17
Programmable on-chip differential termination impedance Grant 7,205,788 - Wang , et al. April 17, 2	2007-04-17
Self-compensating delay chain for multiple-date-rate interfaces Grant 7,200,769 - Chong , et al. April 3, 2	2007-04-03
Programmable logic integrated circuit devices with low voltage differential signaling capabilities Grant 7,196,556 - Nguyen , et al. March 27, 2	2007-03-27
Phase-locked loop circuitry for programmable logic devices Grant 7,190,755 - Sung , et al. March 13, 2	2007-03-13
Multiple data rate interface architecture Grant 7,167,023 - Pan , et al. January 23, 2	2007-01-23
PCI-compatible programmable logic devices Grant 7,148,722 - Cliff , et al. December 12, 2	2006-12-12
Supply voltage detection circuit Grant 7,119,579 - Chong , et al. October 10, 2	2006-10-10
Programmable high speed interface App 20060220703 - Wang; Bonnie I. ; et al.	2006-10-05
Programmable high speed I/O interface Grant 7,116,135 - Wang , et al. October 3, 2	2006-10-03
Programmable phase shift circuitry Grant 7,109,765 - Wang , et al. September 19, 2	2006-09-19
Programmable I/O element circuit for high speed logic devices Grant 7,098,690 - Nguyen , et al. August 29, 2	2006-08-29
DLL with adjustable phase shift using processed control signal Grant 7,091,760 - Chang , et al. August 15, 2	2006-08-15
High speed IO buffer using auxiliary power supply Grant 7,088,140 - Nguyen , et al. August 8, 2	2006-08-08
Loop circuitry with low-pass noise filter App 20060164139 - Chong; Yan ; et al.	2006-07-27
Address control for efficient memory partition Grant 7,057,962 - Tan , et al. June 6, 2	2006-06-06
Differential input buffers with elevated power supplies Grant 7,046,037 - Tyhach , et al. May 16, 2	2006-05-16
Apparatus and method for controlling a delay chain Grant 7,030,675 - Wang , et al. April 18, 2	2006-04-18
DQS postamble filtering Grant 7,031,222 - Charagulla , et al. April 18, 2	2006-04-18
Programmable current booster for faster edge-rate output in high speed applications Grant 7,026,847 - Wang , et al. April 11, 2	2006-04-11
Loop circuitry with low-pass noise filter Grant 7,002,384 - Chong , et al. February 21, 2	2006-02-21
Dual-port SRAM in a programmable logic device Grant 6,992,947 - Pan , et al. January 31, 2	2006-01-31
Method and apparatus for protecting a circuit during a hot socket condition Grant 6,972,593 - Wang , et al. December 6, 2	2005-12-06
Over-voltage protection of integrated circuit I/O pins Grant 6,970,024 - Reese , et al. November 29, 2	2005-11-29
Supply voltage detection circuit App 20050253626 - Chong, Yan ; et al.	2005-11-17
Techniques for implementing address recycling in memory circuits Grant 6,961,280 - Pan , et al. November 1, 2	2005-11-01
Differential input buffers with elevated power supplies Grant 6,956,401 - Tyhach , et al. October 18, 2	2005-10-18
Multiple data rate interface architecture Grant 6,946,872 - Pan , et al. September 20, 2	2005-09-20
Programmable I/O element circuit for high speed logic devices App 20050162187 - Nguyen, Khai ; et al.	2005-07-28
Programmable AC current booster for faster edge-rate output in high speed applications App 20050140430 - Wang, Bonnie I. ; et al.	2005-06-30
Data realignment techniques for serial-to-parallel conversion Grant 6,911,923 - Wang , et al. June 28, 2	2005-06-28
On/off reference voltage switch for multiple I/O standards Grant 6,911,860 - Wang , et al. June 28, 2	2005-06-28
Techniques for preloading data into memory on programmable circuits Grant 6,912,164 - Chong , et al. June 28, 2	2005-06-28
Programmable high speed I/O interface App 20050134332 - Wang, Bonnie I. ; et al.	2005-06-23
Programmable on-chip differential termination impedance Grant 6,888,369 - Wang , et al. May 3, 2	2005-05-03
Supply voltage detection circuit Grant 6,870,400 - Chong , et al. March 22, 2	2005-03-22
Schmitt trigger circuit with adjustable trip point voltages Grant 6,870,413 - Chang , et al. March 22, 2	2005-03-22
Programmable I/O element circuit for high speed logic devices Grant 6,853,215 - Nguyen , et al. February 8, 2	2005-02-08
Programmable phase shift circuitry Grant 6,836,164 - Wang , et al. December 28, 2	2004-12-28
Programmable high speed I/O interface Grant 6,825,698 - Wang , et al. November 30, 2	2004-11-30
Input buffer for multiple differential I/O standards Grant 6,825,692 - Chung , et al. November 30, 2	2004-11-30
Variable depth and width memory device Grant RE38,651 - Sung , et al. November 9, 2	2004-11-09
Multiple data rate interface architecture Grant 6,806,733 - Pan , et al. October 19, 2	2004-10-19
On-chip impedance matching circuit Grant 6,798,237 - Wang , et al. September 28, 2	2004-09-28
Technique for protecting integrated circuit devices against electrostatic discharge damage Grant 6,785,109 - Huang , et al. August 31, 2	2004-08-31
Parallel programming of programmable logic using register chains Grant 6,766,505 - Rangan , et al. July 20, 2	2004-07-20
Configurable decoder for addressing a memory Grant 6,747,903 - Pan , et al. June 8, 2	2004-06-08
Programmable, staged, bus hold and weak pull-up for bi-directional I/O Grant 6,731,137 - Rangan , et al. May 4, 2	2004-05-04
Circuit for providing clock signals with low skew Grant 6,731,142 - Wang , et al. May 4, 2	2004-05-04
Hi-speed parallel configuration of programmable logic Grant 6,714,044 - Rangan , et al. March 30, 2	2004-03-30
Data realignment techniques for serial-to-parallel conversion Grant 6,707,399 - Wang , et al. March 16, 2	2004-03-16
Technique to test an integrated circuit using fewer pins Grant 6,691,267 - Nguyen , et al. February 10, 2	2004-02-10
Programmable I/O element circuit for high speed logic devices Grant 6,686,769 - Nguyen , et al. February 3, 2	2004-02-03
Programming mode selection with JTAG circuits Grant 6,681,378 - Wang , et al. January 20, 2	2004-01-20
Efficient arrangement of interconnection resources on programmable logic devices Grant 6,670,825 - Lane , et al. December 30, 2	2003-12-30
Programmable phase shift circuitry Grant 6,667,641 - Wang , et al. December 23, 2	2003-12-23
Dual-port SRAM in a programmable logic device Grant 6,661,733 - Pan , et al. December 9, 2	2003-12-09
PCI-compatible programmable logic devices Grant 6,646,467 - Cliff , et al. November 11, 2	2003-11-11
Voltage, temperature, and process independent programmable phase shift for PLL Grant 6,642,758 - Wang , et al. November 4, 2	2003-11-04
Supply voltage detection circuit Grant 6,630,844 - Chong , et al. October 7, 2	2003-10-07
Fast locking phase frequency detector Grant 6,617,884 - Wang , et al. September 9, 2	2003-09-09
Systems and methods for on-chip impedance termination Grant 6,603,329 - Wang , et al. August 5, 2	2003-08-05
Circuit for providing clock signals with low skew Grant 6,549,045 - Wang , et al. April 15, 2	2003-04-15
Technique to test an integrated circuit using fewer pins Grant 6,538,469 - Nguyen , et al. March 25, 2	2003-03-25
Programmable high speed I/O interface App 20030042941 - Wang, Bonnie I. ; et al.	2003-03-06
Phase-locked loop circuitry for programmable logic devices Grant 6,483,886 - Sung , et al. November 19, 2	2002-11-19
Fast locking phase frequency detector App 20020158671 - Wang, Xiaobao ; et al.	2002-10-31
Programming mode selection with JTAG circuits App 20020157078 - Wang, Xiaobao ; et al.	2002-10-24
Phase-locked loop circuitry for programmable logic devices Grant 6,469,553 - Sung , et al. October 22, 2	2002-10-22
Fast locking phase frequency detector Grant 6,448,820 - Wang , et al. September 10, 2	2002-09-10
Phase-locked loop or delay-locked loop circuitry for programmable logic devices Grant 6,437,650 - Sung , et al. August 20, 2	2002-08-20
Programmable logic integrated circuit devices with differential signaling capabilities Grant 6,433,579 - Wang , et al. August 13, 2	2002-08-13
Programming mode selection with JTAG circuits Grant 6,421,812 - Wang , et al. July 16, 2	2002-07-16
Techniques for programming programmable logic array devices Grant 6,384,630 - Cliff , et al. May 7, 2	2002-05-07
Fast Locking Phase Frequency Detector App 20020043995 - WANG, XIAOBAO ; et al.	2002-04-18
Cascaded programming with multiple-purpose pins Grant 6,314,550 - Wang , et al. November 6, 2	2001-11-06
Programmable logic array integrated circuit architectures App 20010022519 - Cliff, Richard G. ; et al.	2001-09-20
Techniques and circuitry for accurately sampling high frequency data signals input to an integrated circuit Grant 6,292,116 - Wang , et al. September 18, 2	2001-09-18
High-speed programmable interconnect App 20010020851 - Huang, Joseph ; et al.	2001-09-13
Phase-locked loop or delay-locked loop circuitry for programmable logic devices Grant 6,271,729 - Sung , et al. August 7, 2	2001-08-07
Techniques for programming programmable logic array devices App 20010003844 - Cliff, Richard G. ; et al.	2001-06-14
Programmable logic integrated circuit devices with low voltage differential signaling capabilities Grant 6,236,231 - Nguyen , et al. May 22, 2	2001-05-22
Phase-locked loop or delay-locked loop circuitry for programmable logic devices App 20010000426 - Sung, Chiakang ; et al.	2001-04-26
Phase-locked loop circuitry for programmable logic devices Grant 6,218,876 - Sung , et al. April 17, 2	2001-04-17
Techniques for programming programmable logic array devices Grant 6,191,608 - Cliff , et al. February 20, 2	2001-02-20
Phase-locked loop or delay-locked loop circuitry for programmable logic devices Grant 6,177,844 - Sung , et al. January 23, 2	2001-01-23
Programming and verification address generation for random access memory blocks in programmable logic array integrated circuit devices Grant 6,128,692 - Sung , et al. October 3, 2	2000-10-03
Programmable wide-range frequency synthesizer Grant 6,114,915 - Huang , et al. September 5, 2	2000-09-05
Logic region resources for programmable logic devices Grant 5,999,015 - Cliff , et al. December 7, 1	1999-12-07
Programmable logic array integrated circuit architectures Grant 5,963,049 - Cliff , et al. October 5, 1	1999-10-05
Segmented localized conductors for programmable logic devices Grant 5,963,051 - Cliff , et al. October 5, 1	1999-10-05
Method and apparatus for securing programming data of programmable logic device Grant 5,915,017 - Sung , et al. June 22, 1	1999-06-22
Programmable logic array integrated circuit devices with interleaved logic array blocks Grant 5,909,126 - Cliff , et al. June 1, 1	1999-06-01
Program compatibility recognition for a programmable logic device Grant 5,892,683 - Sung April 6, 1	1999-04-06
Programmable logic array integrated circuits Grant 5,828,229 - Cliff , et al. October 27, 1	1998-10-27
Programming and verification address generation for random access memory blocks in programmable logic array integrated circuit devices Grant 5,802,540 - Sung , et al. September 1, 1	1998-09-01
Method and apparatus for securing programming data of a programmable logic device Grant 5,768,372 - Sung , et al. June 16, 1	1998-06-16
Variable depth and width memory device Grant 5,717,901 - Sung , et al. February 10, 1	1998-02-10
Random access memory block circuitry for programmable logic array integrated circuit devices Grant 5,633,830 - Sung , et al. May 27, 1	1997-05-27
Apparatus for serial reading and writing of random access memory arrays Grant 5,555,214 - Sung , et al. September 10, 1	1996-09-10
Techniques for programming programmable logic array devices Grant 5,543,730 - Cliff , et al. August 6, 1	1996-08-06