Simon; Andrew H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Simon; Andrew H..The latest application filed is for "forming air gap".

Company Profile

3.101.99

Simon; Andrew H. - Fishkill NY
Simon; Andrew H. - Hopewell Junction NY US
Simon; Andrew H - Fishkill NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Interconnect structure having subtractive etch feature and damascene feature Grant 10,256,186 - Bonilla , et al.	2019-04-09
Stacked via structure for metal fuse applications Grant 10,229,875 - Bonilla , et al.	2019-03-12
Forming air gap Grant 10,224,236 - Choi , et al.	2019-03-05
Subtractive etch interconnects Grant 10,177,031 - Bao , et al. J	2019-01-08
Interconnect structure and method of forming Grant 10,177,091 - Simon , et al. J	2019-01-08
Detecting a void between a via and a wiring line Grant 10,103,068 - Bonilla , et al. October 16, 2	2018-10-16
Insulating a via in a semiconductor substrate Grant 10,079,175 - Farooq , et al. September 18, 2	2018-09-18
Interconnect Scaling App 20180076133 - BONILLA; Griselda ; et al.	2018-03-15
Forming Air Gap App 20180076082 - Choi; Samuel S. ; et al.	2018-03-15
Back-end electrically programmable fuse Grant 9,893,011 - Bao , et al. February 13, 2	2018-02-13
Interconnect structure having substractive etch feature and damascene feature Grant 9,852,980 - Bonilla , et al. December 26, 2	2017-12-26
Forming Air Gap App 20170365504 - Choi; Samuel S. ; et al.	2017-12-21
Fabrication of IC structure with metal plug Grant 9,793,216 - Nag , et al. October 17, 2	2017-10-17
Insulating A Via In A Semiconductor Substrate App 20170256447 - FAROOQ; MUKTA G. ; et al.	2017-09-07
Interconnect Structure And Method Of Forming App 20170243827 - Simon; Andrew H. ; et al.	2017-08-24
Integrated Circuit Having Improved Electromigration Performance And Method Of Forming Same App 20170236780 - Nag; Joyeeta ; et al.	2017-08-17
Insulating a via in a semiconductor substrate Grant 9,728,450 - Farooq , et al. August 8, 2	2017-08-08
Interconnect Scaling App 20170221815 - Bonilla; Griselda ; et al.	2017-08-03
Fabrication Of Ic Structure With Metal Plug App 20170213792 - Nag; Joyeeta ; et al.	2017-07-27
Back-end electrically programmable fuse Grant 9,685,404 - Bao , et al. June 20, 2	2017-06-20
Integrated circuit having improved electromigration performance and method of forming same Grant 9,679,810 - Nag , et al. June 13, 2	2017-06-13
Interconnect structure with enhanced reliability Grant 9,673,089 - Bonilla , et al. June 6, 2	2017-06-06
Subsurface wires of integrated chip and methods of forming Grant 9,601,513 - Hook , et al. March 21, 2	2017-03-21
Interconnect structure having subtractive etch feature and damascene feature Grant 9,601,426 - Bonilla , et al. March 21, 2	2017-03-21
Structure with air gap crack stop Grant 9,536,842 - Bao , et al. January 3, 2	2017-01-03
High performance refractory metal / copper interconnects to eliminate electromigration Grant 9,536,830 - Bao , et al. January 3, 2	2017-01-03
Insulating A Via In A Semiconductor Substrate App 20160379876 - FAROOQ; MUKTA G. ; et al.	2016-12-29
Detecting A Void Between A Via And A Wiring Line App 20160370421 - Bonilla; Griselda ; et al.	2016-12-22
Interconnect scaling method including forming dielectric layer over subtractively etched first conductive layer and forming second conductive material on dielectric layer Grant 9,502,350 - Bonilla , et al. November 22, 2	2016-11-22
Electronic Package That Includes A Plurality Of Integrated Circuit Devices Bonded In A Three-dimensional Stack Arrangement App 20160300814 - FAROOQ; MUKTA G. ; et al.	2016-10-13
Electronic package that includes a plurality of integrated circuit devices bonded in a three-dimensional stack arrangement Grant 9,461,017 - Farooq , et al. October 4, 2	2016-10-04
Selective local metal cap layer formation for improved electromigration behavior Grant 9,455,186 - Angyal , et al. September 27, 2	2016-09-27
Graphene-metal E-fuse Grant 9,431,346 - Bao , et al. August 30, 2	2016-08-30
Alternate dual damascene method for forming interconnects Grant 9,431,292 - Bonilla , et al. August 30, 2	2016-08-30
Metal fuse structure for improved programming capability Grant 9,425,144 - Bonilla , et al. August 23, 2	2016-08-23
Constrained nanosecond laser anneal of metal interconnect structures Grant 9,412,658 - Gluschenkov , et al. August 9, 2	2016-08-09
Selective local metal cap layer formation for improved electromigration behavior Grant 9,406,560 - Angyal , et al. August 2, 2	2016-08-02
Stacked Via Structure For Metal Fuse Applications App 20160197039 - Bonilla; Griselda ; et al.	2016-07-07
Selective local metal cap layer formation for improved electromigration behavior Grant 9,385,038 - Angyal , et al. July 5, 2	2016-07-05
Subtractive Etch Interconnects App 20160181200 - Bao; Junjing ; et al.	2016-06-23
Discontinuous Air Gap Crack Stop App 20160181208 - Bao; Junjing ; et al.	2016-06-23
Stacked via structure for metal fuse applications Grant 9,360,525 - Bonilla , et al. June 7, 2	2016-06-07
Modified via bottom for beol via efuse Grant 9,324,655 - Bao , et al. April 26, 2	2016-04-26
Constrained Nanosecond Laser Anneal Of Metal Interconnect Structures App 20160086849 - Gluschenkov; Oleg ; et al.	2016-03-24
Graphene and metal interconnects with reduced contact resistance Grant 9,293,412 - Bao , et al. March 22, 2	2016-03-22
Hybrid graphene-metal interconnect structures Grant 9,257,391 - Bao , et al. February 9, 2	2016-02-09
Back-end Electrically Programmable Fuse App 20160027733 - Bao; Junjing ; et al.	2016-01-28
Graphene and metal interconnects Grant 9,202,743 - Bao , et al. December 1, 2	2015-12-01
E-fuse with hybrid metallization Grant 9,171,801 - Bao , et al. October 27, 2	2015-10-27
E-fuse structures and methods of manufacture Grant 9,142,506 - Bonilla , et al. September 22, 2	2015-09-22
Selective Local Metal Cap Layer Formation For Improved Electromigration Behavior App 20150255398 - Angyal; Matthew S. ; et al.	2015-09-10
Selective Local Metal Cap Layer Formation For Improved Electromigration Behavior App 20150255343 - Angyal; Matthew S. ; et al.	2015-09-10
Selective Local Metal Cap Layer Formation For Improved Electromigration Behavior App 20150255342 - Angyal; Matthew S. ; et al.	2015-09-10
Doping Of Copper Wiring Structures In Back End Of Line Processing App 20150255397 - Dyer; Thomas W. ; et al.	2015-09-10
Redundant Via Structure For Metal Fuse Applications App 20150235946 - Bonilla; Griselda ; et al.	2015-08-20
Copper interconnect with CVD liner and metallic cap Grant 9,111,938 - Baumann , et al. August 18, 2	2015-08-18
Electronic Fuse With Resistive Heater App 20150228578 - Bao; Junjing ; et al.	2015-08-13
Via-fuse with low dielectric constant Grant 9,105,638 - Bao , et al. August 11, 2	2015-08-11
Electronic fuse vias in interconnect structures Grant 9,099,468 - Bao , et al. August 4, 2	2015-08-04
Electronic fuse with resistive heater Grant 9,093,452 - Bao , et al. July 28, 2	2015-07-28
Redundant via structure for metal fuse applications Grant 9,093,164 - Filippi , et al. July 28, 2	2015-07-28
Selective local metal cap layer formation for improved electromigration behavior Grant 9,076,847 - Angyal , et al. July 7, 2	2015-07-07
Doping of copper wiring structures in back end of line processing Grant 9,059,177 - Dyer , et al. June 16, 2	2015-06-16
Electronic fuse having a damaged region Grant 9,059,170 - Bao , et al. June 16, 2	2015-06-16
Copper interconnect with CVD liner and metallic cap Grant 9,059,176 - Baumann , et al. June 16, 2	2015-06-16
E-fuse structures and methods of manufacture Grant 9,059,169 - Bonilla , et al. June 16, 2	2015-06-16
Graphene And Metal Interconnects With Reduced Contact Resistance App 20150137377 - Bao; Junjing ; et al.	2015-05-21
Metal Fuse Structure For Improved Programming Capability App 20150137312 - Bonilla; Griselda ; et al.	2015-05-21
Method to resolve hollow metal defects in interconnects Grant 9,034,664 - Bonilla , et al. May 19, 2	2015-05-19
Via-fuse With Low Dielectric Constant App 20150130018 - Bao; Junjing ; et al.	2015-05-14
Selective Passivation Of Vias App 20150076695 - Cheng; Tien-Jen ; et al.	2015-03-19
Copper Interconnect With Cvd Liner And Metallic Cap App 20150061135 - Baumann; Frieder H. ; et al.	2015-03-05
Interconnect Structure With Enhanced Reliability App 20150056806 - Bonilla; Griselda ; et al.	2015-02-26
Metal fuse structure for improved programming capability Grant 8,962,467 - Bonilla , et al. February 24, 2	2015-02-24
Electronic Fuse Vias In Interconnect Structures App 20150041951 - Bao; Junjing ; et al.	2015-02-12
Modified Via Bottom For Beol Via Efuse App 20150035115 - Bao; Junjing ; et al.	2015-02-05
Modified via bottom for BEOL via efuse Grant 8,921,167 - Bao , et al. December 30, 2	2014-12-30
Electronic fuse vias in interconnect structures Grant 8,916,461 - Bao , et al. December 23, 2	2014-12-23
Interconnect structure with enhanced reliability Grant 8,912,658 - Filippi , et al. December 16, 2	2014-12-16
Graphene-metal E-fuse App 20140346674 - Bao; Junjing ; et al.	2014-11-27
High Performance Refractory Metal / Copper Interconnects To Eliminate Electromigration App 20140332965 - Bao; Junjing ; et al.	2014-11-13
E-fuse With Hybrid Metallization App 20140332924 - Bao; Junjing ; et al.	2014-11-13
Hybrid Graphene-Metal Interconnect Structures App 20140319685 - Bao; Junjing ; et al.	2014-10-30
Method of making a copper interconnect having a barrier liner of multiple metal layers Grant 8,841,212 - Nogami , et al. September 23, 2	2014-09-23
Fuse and integrated conductor Grant 8,836,124 - Bonilla , et al. September 16, 2	2014-09-16
Electronic Fuse With Resistive Heater App 20140252538 - Bao; Junjing ; et al.	2014-09-11
Doping Of Copper Wiring Structures In Back End Of Line Processing App 20140246776 - Dyer; Thomas W. ; et al.	2014-09-04
Electronic Fuse Having A Damaged Region App 20140217612 - Bao; Junjing ; et al.	2014-08-07
Selective Local Metal Cap Layer Formation For Improved Electromigration Behavior App 20140203435 - Angyal; Matthew S. ; et al.	2014-07-24
Modified Via Bottom For Beol Via Efuse App 20140183688 - Bao; Junjing ; et al.	2014-07-03
Doping of copper wiring structures in back end of line processing Grant 8,765,602 - Dyer , et al. July 1, 2	2014-07-01
Graphene And Metal Interconnects App 20140167268 - Bao; Junjing ; et al.	2014-06-19
Stacked Via Structure For Metal Fuse Applications App 20140167772 - Bonilla; Griselda ; et al.	2014-06-19
Stacked via structure for metal fuse applications Grant 8,742,766 - Bonilla , et al. June 3, 2	2014-06-03
Electronic anti-fuse Grant 8,736,020 - Bao , et al. May 27, 2	2014-05-27
Electronic Fuse Vias in Interconnect Structures App 20140077334 - Bao; Jinjing ; et al.	2014-03-20
E-fuse Structures And Methods Of Manufacture App 20140070362 - BONILLA; Griselda ; et al.	2014-03-13
Electronic Anti-fuse App 20140070363 - Bao; Junjing ; et al.	2014-03-13
Prevention Of Thru-substrate Via Pistoning Using Highly Doped Copper Alloy Seed Layer App 20140061915 - Collins; Christopher N. ; et al.	2014-03-06
Doping Of Copper Wiring Structures In Back End Of Line Processing App 20140061914 - Dyer; Thomas W. ; et al.	2014-03-06
Stacked Via Structure For Metal Fuse Applications App 20140028325 - Bonilla; Griselda ; et al.	2014-01-30
Stacked via structure for metal fuse applications Grant 8,633,707 - Filippi , et al. January 21, 2	2014-01-21
Method To Resolve Hollow Metal Defects In Interconnects App 20130307151 - Bonilla; Griselda ; et al.	2013-11-21
Copper Interconnect With Cvd Liner And Metallic Cap App 20130277842 - Baumann; Frieder Hainrich ; et al.	2013-10-24
Structure and method to make replacement metal gate and contact metal Grant 8,552,502 - Li , et al. October 8, 2	2013-10-08
Fuse and Integrated Conductor App 20130234284 - Bonilla; Griselda ; et al.	2013-09-12
Metal Fuse Structure For Improved Programming Capability App 20130214894 - Bonilla; Griselda ; et al.	2013-08-22
Back-end Electrically Programmable Fuse App 20130176073 - Bao; Junjing ; et al.	2013-07-11
Redundant Via Structure For Metal Fuse Applications App 20130127584 - Filippi; Ronald G. ; et al.	2013-05-23
Barrier Sequence For Use In Copper Interconnect Metallization App 20130005137 - Nogami; Takeshi ; et al.	2013-01-03
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 8,343,868 - Edelstein , et al. January 1, 2	2013-01-01
E-fuse Structures And Methods Of Manufacture App 20120326269 - BONILLA; GRISELDA ; et al.	2012-12-27
Capping of copper interconnect lines in integrated circuit devices Grant 8,298,948 - Bonilla , et al. October 30, 2	2012-10-30
Stacked Via Structure For Metal Fuse Applications App 20120249159 - Filippi; Ronald G. ; et al.	2012-10-04
Structure and method to make replacement metal gate and contact metal Grant 8,232,148 - Li , et al. July 31, 2	2012-07-31
Interconnect structure for integrated circuits having enhanced electromigration resistance Grant 8,232,646 - Bonilla , et al. July 31, 2	2012-07-31
Structure And Method To Make Replacement Metal Gate And Contact Metal App 20120187420 - Li; Zhengwen ; et al.	2012-07-26
Interconnect Structure With Enhanced Reliability App 20120104610 - Filippi; Ronald ; et al.	2012-05-03
Reducing effective dielectric constant in semiconductor devices Grant 8,129,286 - Edelstein , et al. March 6, 2	2012-03-06
Interconnect structure for integrated circuits having improved electromigration characteristics Grant 8,056,039 - Chanda , et al. November 8, 2	2011-11-08
Structure And Method To Make Replacement Metal Gate And Contact Metal App 20110215409 - Li; Zhengwen ; et al.	2011-09-08
Interconnect Structure For Integrated Circuits Having Enhanced Electromigration Resistance App 20110175226 - Bonilla; Griselda ; et al.	2011-07-21
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20110111590 - Edelstein; Daniel C. ; et al.	2011-05-12
Capping of Copper Interconnect Lines in Integrated Circuit Devices App 20110108990 - Bonilla; Griselda ; et al.	2011-05-12
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,892,940 - Edelstein , et al. February 22, 2	2011-02-22
Reliability of wide interconnects Grant 7,776,737 - Bonilla , et al. August 17, 2	2010-08-17
Structure and method of forming electrically blown metal fuses for integrated circuits Grant 7,737,528 - Bonilla , et al. June 15, 2	2010-06-15
Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing Grant 7,671,362 - Bolom , et al. March 2, 2	2010-03-02
Reliability Of Wide Interconnects App 20100038790 - Bonilla; Griselda ; et al.	2010-02-18
Interconnect Structure For Integrated Circuits Having Improved Electromigration Characteristics App 20090294973 - Chanda; Kaushik ; et al.	2009-12-03
Structure And Method Of Forming Electrically Blown Metal Fuses For Integrated Circuits App 20090294901 - Bonilla; Griselda ; et al.	2009-12-03
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,592,685 - Edelstein , et al. September 22, 2	2009-09-22
Barrier Sequence For Use In Copper Interconnect Metallization App 20090179328 - Nogami; Takeshi ; et al.	2009-07-16
Test Structure For Determining Optimal Seed And Liner Layer Thicknesses For Dual Damascene Processing App 20090146143 - Bolom; Tibor ; et al.	2009-06-11
Structure Cu Liner For Interconnects Using A Double-bilayer Processing Scheme App 20090098728 - Grunow; Stephan ; et al.	2009-04-16
Copper contact via structure using hybrid barrier layer Grant 7,498,256 - Knarr , et al. March 3, 2	2009-03-03
Back end interconnect with a shaped interface Grant 7,494,915 - Clevenger , et al. February 24, 2	2009-02-24
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080254630 - EDELSTEIN; Daniel C. ; et al.	2008-10-16
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,405,147 - Edelstein , et al. July 29, 2	2008-07-29
Method For Fabricating A Microelectronic Conductor Structure App 20080160754 - Fitzsimmons; John A. ; et al.	2008-07-03
Copper Contact Via Structure Using Hybrid Barrier Layer App 20080042291 - Knarr; Randolph F. ; et al.	2008-02-21
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080038915 - EDELSTEIN; Daniel C. ; et al.	2008-02-14
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080038923 - EDELSTEIN; Daniel C. ; et al.	2008-02-14
Bilayered metal hardmasks for use in dual damascene etch schemes Grant 7,241,681 - Kumar , et al. July 10, 2	2007-07-10
Electroplated copper interconnection structure, process for making and electroplating bath Grant 7,227,265 - Andricacos , et al. June 5, 2	2007-06-05
Back End Interconnect With A Shaped Interface App 20060292852 - Clevenger; Lawrence A. ; et al.	2006-12-28
Back end interconnect with a shaped interface Grant 7,122,462 - Clevenger , et al. October 17, 2	2006-10-17
Copper recess process with application to selective capping and electroless plating Grant 7,064,064 - Chen , et al. June 20, 2	2006-06-20
Bilayered metal hardmasks for use in dual damascene etch schemes App 20060113278 - Kumar; Kaushik ; et al.	2006-06-01
Bilayered metal hardmasks for use in Dual Damascene etch schemes Grant 7,052,621 - Kumar , et al. May 30, 2	2006-05-30
Crystallographic modification of hard mask properties Grant 7,001,835 - Clevenger , et al. February 21, 2	2006-02-21
Copper recess process with application to selective capping and electroless plating Grant 6,975,032 - Chen , et al. December 13, 2	2005-12-13
Interconnect structure improvements Grant 6,960,519 - Dalton , et al. November 1, 2	2005-11-01
Method of forming a metal layer App 20050221000 - Ikeda, Taro ; et al.	2005-10-06
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20050167838 - Edelstein, Daniel C. ; et al.	2005-08-04
Method of forming a metal layer using an intermittent precursor gas flow process Grant 6,924,223 - Yamasaki , et al. August 2, 2	2005-08-02
Copper recess process with application to selective capping and electroless plating App 20050158985 - Chen, Shyng-Tsong ; et al.	2005-07-21
Crystallographic Modification of Hard mask Properties App 20050112862 - Clevenger, Lawrence A. ; et al.	2005-05-26
Back End Interconnect With a Shaped Interface App 20050112864 - Clevenger, Lawrence A. ; et al.	2005-05-26
Method of forming a metal layer using an intermittent precursor gas flow process App 20050069632 - Yamasaki, Hideaki ; et al.	2005-03-31
Method for depositing metal layers using sequential flow deposition App 20050069641 - Matsuda, Tsukasa ; et al.	2005-03-31
Bilayered metal hardmasks for use in dual damascene etch schemes App 20040251234 - Kumar, Kaushik ; et al.	2004-12-16
Electroplated copper interconnection structure, process for making and electroplating bath App 20040178078 - Andricacos, Panayotis C. ; et al.	2004-09-16
Electroplated copper interconnection structure, process for making and electroplating bath App 20040178077 - Andricacos, Panayotis C. ; et al.	2004-09-16
Sacrificial metal liner for copper App 20040152295 - Cooney, Edward C. III ; et al.	2004-08-05
Sacrificial Metal Liner For Copper App 20040150103 - Cooney, Edward C. III ; et al.	2004-08-05
Open-bottomed via liner structure and method for fabricating same Grant 6,768,203 - Simon , et al. July 27, 2	2004-07-27
Copper recess process with application to selective capping and electroless plating App 20040113279 - Chen, Shyng-Tsong ; et al.	2004-06-17
Electromigration-resistant copper microstructure Grant 6,572,982 - Uzoh , et al. June 3, 2	2003-06-03
Graded composition diffusion barriers for chip wiring applications Grant 6,569,783 - Uzoh , et al. May 27, 2	2003-05-27
Copper interconnection structure incorporating a metal seed layer Grant 6,399,496 - Edelstein , et al. June 4, 2	2002-06-04
Graded composition diffusion barriers for chip wiring applications App 20020058163 - Uzoh, Cyprian E. ; et al.	2002-05-16
Graded composition diffusion barriers for chip wiring applications Grant 6,337,151 - Uzoh , et al. January 8, 2	2002-01-08
Copper interconnection structure incorporating a metal seed layer Grant 6,181,012 - Edelstein , et al. January 30, 2	2001-01-30
Electromigration-resistant copper microstructure and process of making Grant 6,123,825 - Uzoh , et al. September 26, 2	2000-09-26
Open-bottomed via liner structure and method for fabricating same Grant 5,933,753 - Simon , et al. August 3, 1	1999-08-03
Safe method for etching silicon dioxide Grant 5,268,069 - Chapple-Sokol , et al. December 7, 1	1993-12-07