Patent | Date |
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Phase Change Memory App 20220310911 - Ok; Injo ;   et al. | 2022-09-29 |
Non-volatile memory structure and method for low programming voltage for cross bar array Grant 11,430,513 - Seo , et al. August 30, 2 | 2022-08-30 |
Setting an upper bound on RRAM resistance Grant 11,430,514 - Kim , et al. August 30, 2 | 2022-08-30 |
Antenna Assisted Reram Formation App 20220238803 - Kim; Youngseok ;   et al. | 2022-07-28 |
Setting An Upper Bound On Rram Resistance App 20220223205 - Kim; Youngseok ;   et al. | 2022-07-14 |
Non Volatile Resistive Memory Logic Device App 20220172776 - Chen; Hsueh-Chung ;   et al. | 2022-06-02 |
Resistive Memory Array App 20220165947 - Kim; Youngseok ;   et al. | 2022-05-26 |
Uniform Voltage Drop in Arrays of Memory Devices App 20220149275 - Ok; Injo ;   et al. | 2022-05-12 |
Heterojunction bipolar transistor with a silicon oxide layer on a silicon germanium base Grant 11,282,947 - Ok , et al. March 22, 2 | 2022-03-22 |
Heterojunction Bipolar Transistor With A Silicon Oxide Layer On A Silicon Germanium Base App 20220069109 - Ok; Injo ;   et al. | 2022-03-03 |
Gate last vertical transport field effect transistor Grant 11,245,025 - Lee , et al. February 8, 2 | 2022-02-08 |
Maskless top source/drain epitaxial growth on vertical transport field effect transistor Grant 11,244,870 - Lee , et al. February 8, 2 | 2022-02-08 |
Embedded BEOL memory device with top electrode pillar Grant 11,239,421 - Kong , et al. February 1, 2 | 2022-02-01 |
Oxide-based Resistive Memory Having A Plasma-exposed Bottom Electrode App 20210391536 - ANDO; TAKASHI ;   et al. | 2021-12-16 |
Gate channel length control in VFET Grant 11,201,092 - Ok , et al. December 14, 2 | 2021-12-14 |
Low forming voltage non-volatile memory (NVM) Grant 11,196,000 - Kim , et al. December 7, 2 | 2021-12-07 |
Vertical fin-type bipolar junction transistor with self-aligned base contact Grant 11,139,380 - Lee , et al. October 5, 2 | 2021-10-05 |
Vertical Field Effect Transistor With Low-resistance Bottom Source-drain Contact App 20210273115 - Lee; Choonghyun ;   et al. | 2021-09-02 |
Embedded BEOL Memory Device with Top Electrode Pillar App 20210234095 - Kong; Dexin ;   et al. | 2021-07-29 |
Techniques for enhancing vertical gate-all-around FET performance Grant 11,069,686 - Ok , et al. July 20, 2 | 2021-07-20 |
Vertical field effect transistor with low-resistance bottom source-drain contact Grant 11,043,598 - Lee , et al. June 22, 2 | 2021-06-22 |
Vertical nano-wire complimentary metal-oxide-semiconductor transistor with cylindrical III-V compound and germanium channel Grant 11,038,064 - Ok , et al. June 15, 2 | 2021-06-15 |
Method and structure of improving contact resistance for passive and long channel devices Grant 11,038,055 - Ok , et al. June 15, 2 | 2021-06-15 |
Spacer for dual epi CMOS devices Grant 11,031,396 - Seo June 8, 2 | 2021-06-08 |
Minimize middle-of-line contact line shorts Grant 11,011,429 - Ok , et al. May 18, 2 | 2021-05-18 |
Low Forming Voltage Non-volatile Memory (nvm) App 20210135107 - Kim; Youngseok ;   et al. | 2021-05-06 |
Vertical vacuum channel transistor Grant 10,991,537 - Ok , et al. April 27, 2 | 2021-04-27 |
Vertical transport fin field effect transistor with asymmetric channel profile Grant 10,985,257 - Lee , et al. April 20, 2 | 2021-04-20 |
Resistive Switching Device Having Controlled Filament Formation App 20210104664 - Reznicek; Alexander ;   et al. | 2021-04-08 |
Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between adjacent gates Grant 10,971,585 - Lee , et al. April 6, 2 | 2021-04-06 |
Removal of trilayer resist without damage to underlying structure Grant 10,957,536 - Sankarapandian , et al. March 23, 2 | 2021-03-23 |
ILD gap fill for memory device stack array Grant 10,950,549 - Seo , et al. March 16, 2 | 2021-03-16 |
Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack Grant 10,937,861 - Ok , et al. March 2, 2 | 2021-03-02 |
Boosted vertical field-effect transistor Grant 10,879,390 - Ok , et al. December 29, 2 | 2020-12-29 |
Minimize Middle-of-line Contact Line Shorts App 20200402860 - Ok; Injo ;   et al. | 2020-12-24 |
Planar gate-insulated vacuum channel transistor Grant 10,840,052 - Ok , et al. November 17, 2 | 2020-11-17 |
Gate Last Vertical Transport Field Effect Transistor App 20200357898 - Lee; Choonghyun ;   et al. | 2020-11-12 |
Complementary metal-oxide-semiconductor (CMOS) nanosheet devices with epitaxial source/drains and replacement metal gate structures Grant 10,833,168 - Seo , et al. November 10, 2 | 2020-11-10 |
Airgap isolation for backend embedded memory stack pillar arrays Grant 10,832,941 - Seo , et al. November 10, 2 | 2020-11-10 |
Vertical Vacuum Channel Transistor App 20200350136 - Ok; Injo ;   et al. | 2020-11-05 |
VTFET having a V-shaped groove at the top junction region Grant 10,818,753 - Lee , et al. October 27, 2 | 2020-10-27 |
Source and drain isolation for CMOS nanosheet with one block mask Grant 10,804,165 - Seo , et al. October 13, 2 | 2020-10-13 |
Fin and shallow trench isolation replacement to prevent gate collapse Grant 10,804,380 - Seo October 13, 2 | 2020-10-13 |
Minimize middle-of-line contact line shorts Grant 10,804,159 - Ok , et al. October 13, 2 | 2020-10-13 |
Gate Channel Length Control In Vfet App 20200312723 - Ok; Injo ;   et al. | 2020-10-01 |
Airgap Isolation For Backend Embedded Memory Stack Pillar Arrays App 20200312704 - Seo; Soon-Cheon ;   et al. | 2020-10-01 |
Spacer for trench epitaxial structures Grant 10,790,284 - Ok , et al. September 29, 2 | 2020-09-29 |
Vtfet Having A V-shaped Groove At The Top Junction Region App 20200303503 - Lee; Choonghyun ;   et al. | 2020-09-24 |
Vertical fin-type bipolar junction transistor with self-aligned base contact Grant 10,777,648 - Lee , et al. Sept | 2020-09-15 |
Removal of work function metal wing to improve device yield in vertical FETs Grant 10,777,679 - Lee , et al. Sept | 2020-09-15 |
Complementary Metal-oxide-semiconductor (cmos) Nanosheet Devices With Epitaxial Source/drains And Replacement Metal Gate Structu App 20200287020 - Seo; Soon-Cheon ;   et al. | 2020-09-10 |
Phase Change Memory Structure With Efficient Heating System App 20200287134 - Ok; Injo ;   et al. | 2020-09-10 |
Film stress control for memory device stack Grant 10,763,431 - Ok , et al. Sep | 2020-09-01 |
Middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack Grant 10,763,326 - Ok , et al. Sep | 2020-09-01 |
Method and structure for forming MRAM device Grant 10,748,962 - Seo , et al. A | 2020-08-18 |
Spacer for trench epitaxial structures Grant 10,741,559 - Ok , et al. A | 2020-08-11 |
Bipolar junction transistor (BJT) with 3D wrap around emitter Grant 10,734,490 - Lee , et al. | 2020-08-04 |
Maskless Top Source/drain Epitaxial Growth On Vertical Transport Field Effect Transistor App 20200235015 - Lee; ChoongHyun ;   et al. | 2020-07-23 |
Removal Of Work Function Metal Wing To Improve Device Yield In Vertical Fets App 20200235238 - Lee; Choonghyun ;   et al. | 2020-07-23 |
FinFET with epitaxial source and drain regions and dielectric isolated channel region Grant 10,707,332 - Cheng , et al. | 2020-07-07 |
MTJ stack etch using IBE to achieve vertical profile Grant 10,693,059 - Seo , et al. | 2020-06-23 |
Vertical Field Effect Transistor With Low-resistance Bottom Source-drain Contact App 20200176611 - Lee; Choonghyun ;   et al. | 2020-06-04 |
Reducing off-state leakage current in Si/SiGe dual channel CMOS Grant 10,672,643 - Ok , et al. | 2020-06-02 |
Self-aligned base contacts for vertical fin-type bipolar junction transistors Grant 10,672,872 - Lee , et al. | 2020-06-02 |
Ild Gap Fill For Memory Device Stack Array App 20200161250 - Seo; Soon-Cheon ;   et al. | 2020-05-21 |
Film Stress Control For Memory Device Stack App 20200161547 - Ok; Injo ;   et al. | 2020-05-21 |
Vertical fin type bipolar junction transistor (BJT) device with a self-aligned base contact Grant 10,658,495 - Ok , et al. | 2020-05-19 |
Vertical Fin-type Bipolar Junction Transistor With Self-aligned Base Contact App 20200152755 - Lee; Choonghyun ;   et al. | 2020-05-14 |
Vertical Nano-wire Complimentary Metal-oxide-semiconductor Transistor With Cylindrical Iii-v Compound And Germanium Channel App 20200152798 - OK; Injo ;   et al. | 2020-05-14 |
Maskless Top Source/drain Epitaxial Growth On Vertical Transport Field Effect Transistor App 20200135585 - Lee; ChoongHyun ;   et al. | 2020-04-30 |
Vertical Fin Type Bipolar Junction Transistor (bjt) Device With A Self-aligned Base Contact App 20200119170 - Ok; Injo ;   et al. | 2020-04-16 |
Semiconductor devices with sidewall spacers of equal thickness Grant 10,622,259 - Cheng , et al. | 2020-04-14 |
Vertical nano-wire complimentary metal-oxide-semiconductor transistor with cylindrical III-V compound and germanium channel Grant 10,608,114 - Ok , et al. | 2020-03-31 |
Vertical vacuum channel transistor with minimized air gap between tip and gate Grant 10,600,606 - Ok , et al. | 2020-03-24 |
Boosted Vertical Field-effect Transistor App 20200091342 - Ok; Injo ;   et al. | 2020-03-19 |
Vertical fin-type bipolar junction transistor with self-aligned base contact Grant 10,593,771 - Lee , et al. | 2020-03-17 |
Semiconductor devices with sidewall spacers of equal thickness Grant 10,580,704 - Cheng , et al. | 2020-03-03 |
Removal Of Trilayer Resist Without Damage To Underlying Structure App 20200066519 - Sankarapandian; Muthumanickam ;   et al. | 2020-02-27 |
Reducing Off-State Leakage Current in Si/SiGe Dual Channel CMOS App 20200066600 - Ok; Injo ;   et al. | 2020-02-27 |
Minimize Middle-of-line Contact Line Shorts App 20200051866 - Ok; Injo ;   et al. | 2020-02-13 |
Nanosheet isolation for bulk CMOS non-planar devices Grant 10,559,654 - Pranatharthiharan , et al. Feb | 2020-02-11 |
Boosted vertical field-effect transistor Grant 10,541,329 - Ok , et al. Ja | 2020-01-21 |
Semiconductor Devices With Sidewall Spacers Of Equal Thickness App 20200020598 - CHENG; Kangguo ;   et al. | 2020-01-16 |
Semiconductor Devices With Sidewall Spacers Of Equal Thickness App 20200013682 - CHENG; Kangguo ;   et al. | 2020-01-09 |
Techniques for Enhancing Vertical Gate-All-Around FET Performance App 20200006343 - Ok; Injo ;   et al. | 2020-01-02 |
Planar Gate-insulated Vacuum Channel Transistor App 20190393012 - OK; Injo ;   et al. | 2019-12-26 |
Vertical Nano-wire Complimentary Metal-oxide-semiconductor Transistor With Cylindrical Iii-v Compound And Germanium Channel App 20190386145 - OK; Injo ;   et al. | 2019-12-19 |
Vertical Vacuum Channel Transistor With Minimized Air Gap Between Tip And Gate App 20190378675 - Ok; Injo ;   et al. | 2019-12-12 |
Vertical Fin-type Bipolar Junction Transistor With Self-aligned Base Contact App 20190371900 - Lee; Choonghyun ;   et al. | 2019-12-05 |
Minimize middle-of-line contact line shorts Grant 10,490,454 - Ok , et al. Nov | 2019-11-26 |
Modified fin cut after epitaxial growth Grant 10,475,886 - Kanakasabapathy , et al. Nov | 2019-11-12 |
Gate Spacer And Inner Spacer Formation For Nanosheet Transistors Having Relatively Small Space Between Adjacent Gates App 20190341450 - Lee; Choonghyun ;   et al. | 2019-11-07 |
Vertical fin bipolar junction transistor with high germanium content silicon germanium base Grant 10,468,498 - Kim , et al. No | 2019-11-05 |
Fin And Shallow Trench Isolation Replacement To Prevent Gate Collapse App 20190334012 - SEO; Soon-Cheon | 2019-10-31 |
Method And Structure For Forming MRAM Device App 20190326354 - Seo; Soon-Cheon ;   et al. | 2019-10-24 |
Techniques for enhancing vertical gate-all-around FET performance Grant 10,453,844 - Ok , et al. Oc | 2019-10-22 |
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices App 20190305132 - Ok; Injo ;   et al. | 2019-10-03 |
Source and Drain Isolation for CMOS Nanosheet with One Block Mask App 20190295899 - Seo; Soon-Cheon ;   et al. | 2019-09-26 |
Spacer For Trench Epitaxial Structures App 20190296015 - OK; Injo ;   et al. | 2019-09-26 |
Vertical Transport Complimentary Metal-oxide-semiconductor With Varying Threshold Voltages App 20190279981 - Ok; Injo ;   et al. | 2019-09-12 |
Spacer For Trench Epitaxial Structures App 20190279983 - OK; Injo ;   et al. | 2019-09-12 |
Boosted Vertical Field-effect Transistor App 20190280120 - Ok; Injo ;   et al. | 2019-09-12 |
Extended Contact Area Using Undercut Silicide Extensions App 20190267464 - Leobandung; Effendi ;   et al. | 2019-08-29 |
Resistive memory device with electrical gate control Grant 10,396,126 - Kim , et al. A | 2019-08-27 |
Method and structure of improving contact resistance for passive and long channel devices Grant 10,396,200 - Ok , et al. A | 2019-08-27 |
Mtj Stack Etch Using Ibe To Achieve Vertical Profile App 20190259939 - SEO; SOON-CHEON ;   et al. | 2019-08-22 |
Differential weight reading of an analog memory element in crosspoint array utilizing current subtraction transistors Grant 10,381,074 - Kim , et al. A | 2019-08-13 |
Nanowire FET including nanowire channel spacers Grant 10,381,462 - Seo A | 2019-08-13 |
Fin and shallow trench isolation replacement to prevent gate collapse Grant 10,374,066 - Seo | 2019-08-06 |
Vertical Transport Fin Field Effect Transistor With Asymmetric Channel Profile App 20190229200 - Lee; Choonghyun ;   et al. | 2019-07-25 |
FET trench dipole formation Grant 10,361,203 - Ok , et al. | 2019-07-23 |
Spacer formation on semiconductor device Grant 10,355,109 - Devarajan , et al. July 16, 2 | 2019-07-16 |
Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack Grant 10,355,080 - Ok , et al. July 16, 2 | 2019-07-16 |
Spacer For Dual Epi Cmos Devices App 20190214389 - Seo; Soon-Cheon | 2019-07-11 |
Source and Drain Isolation for CMOS Nanosheet with One Block Mask App 20190214314 - Seo; Soon-Cheon ;   et al. | 2019-07-11 |
Extended contact area using undercut silicide extensions Grant 10,347,739 - Leobandung , et al. July 9, 2 | 2019-07-09 |
Vertical vacuum channel transistor with minimized air gap between tip and gate Grant 10,347,456 - Ok , et al. July 9, 2 | 2019-07-09 |
Forming spacer for trench epitaxial structures Grant 10,347,632 - Ok , et al. July 9, 2 | 2019-07-09 |
Spacer for trench epitaxial structures Grant 10,347,633 - Ok , et al. July 9, 2 | 2019-07-09 |
Source and drain isolation for CMOS nanosheet with one block mask Grant 10,325,820 - Seo , et al. | 2019-06-18 |
Vertical Fin-type Bipolar Junction Transistor With Self-aligned Base Contact App 20190181236 - Lee; Choonghyun ;   et al. | 2019-06-13 |
Spacer for dual epi CMOS devices Grant 10,319,721 - Seo | 2019-06-11 |
Techniques for Enhancing Vertical Gate-All-Around FET Performance App 20190172830 - Ok; Injo ;   et al. | 2019-06-06 |
Vertical Fin Bipolar Junction Transistor With High Germanium Content Silicon Germanium Base App 20190165128 - KIM; SEYOUNG ;   et al. | 2019-05-30 |
Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack App 20190157388 - Ok; Injo ;   et al. | 2019-05-23 |
Sidewall image transfer process for multiple gate width patterning Grant 10,297,510 - Seo , et al. | 2019-05-21 |
Vertical transport fin field effect transistor with asymmetric channel profile Grant 10,297,668 - Lee , et al. | 2019-05-21 |
Spacer formation preventing gate bending Grant 10,256,239 - Pranatharthiharan , et al. | 2019-04-09 |
Middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack Grant 10,256,296 - Ok , et al. April 9, 2 | 2019-04-09 |
Method And Structure To Form Vertical Fin Bjt With Graded Sige Base Doping App 20190097022 - Kim; Seyoung ;   et al. | 2019-03-28 |
Nanowire FET including nanowire channel spacers Grant 10,236,362 - Seo | 2019-03-19 |
Fin And Shallow Trench Isolation Replacement To Prevent Gate Collapse App 20190019877 - SEO; Soon-Cheon | 2019-01-17 |
FinFET device with abrupt junctions Grant 10,170,499 - Cheng , et al. J | 2019-01-01 |
Spacer for dual epi CMOS devices Grant 10,170,478 - Seo J | 2019-01-01 |
Vertical CMOS devices with common gate stacks Grant 10,141,232 - Lee , et al. Nov | 2018-11-27 |
Minimize Middle-of-line Contact Line Shorts App 20180323109 - OK; Injo ;   et al. | 2018-11-08 |
Finfet With Epitaxial Source And Drain Regions And Dielectric Isolated Channel Region App 20180323288 - CHENG; KANGGUO ;   et al. | 2018-11-08 |
Structure and process to tuck fin tips self-aligned to gates Grant 10,121,852 - Doris , et al. November 6, 2 | 2018-11-06 |
Structure and process to tuck fin tips self-aligned to gates Grant 10,121,853 - Doris , et al. November 6, 2 | 2018-11-06 |
Vertical fin bipolar junction transistor with high germanium content silicon germanium base Grant 10,115,800 - Kim , et al. October 30, 2 | 2018-10-30 |
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices App 20180294356 - Ok; Injo ;   et al. | 2018-10-11 |
Removal Of Trilayer Resist Without Damage To Underlying Structure App 20180286680 - Sankarapandian; Muthumanickam ;   et al. | 2018-10-04 |
FinFET with epitaxial source and drain regions and dielectric isolated channel region Grant 10,084,067 - Cheng , et al. September 25, 2 | 2018-09-25 |
Minimize middle-of-line contact line shorts Grant 10,074,569 - Ok , et al. September 11, 2 | 2018-09-11 |
Spacer For Trench Epitaxial Structures App 20180254274 - OK; Injo ;   et al. | 2018-09-06 |
Spacer For Trench Epitaxial Structures App 20180254275 - OK; Injo ;   et al. | 2018-09-06 |
Removal Of Trilayer Resist Without Damage To Underlying Structure App 20180233360 - Sankarapandian; Muthumanickam ;   et al. | 2018-08-16 |
Removal of trilayer resist without damage to underlying structure Grant 10,049,876 - Sankarapandian , et al. August 14, 2 | 2018-08-14 |
Method and structure of improving contact resistance for passive and long channel devices Grant 10,043,904 - Ok , et al. August 7, 2 | 2018-08-07 |
Spacer for trench epitaxial structures Grant 10,020,306 - Ok , et al. July 10, 2 | 2018-07-10 |
Self heating reduction for analog radio frequency (RF) device Grant 10,014,220 - Ok , et al. July 3, 2 | 2018-07-03 |
Self heating reduction for analog radio frequency (RF) device Grant 10,014,295 - Ok , et al. July 3, 2 | 2018-07-03 |
Salicide formation on replacement metal gate finFET devices Grant 9,985,130 - Leobandung , et al. May 29, 2 | 2018-05-29 |
FinFET device with abrupt junctions Grant 9,978,775 - Cheng , et al. May 22, 2 | 2018-05-22 |
Effective device formation for advanced technology nodes with aggressive fin-pitch scaling Grant 9,953,976 - Ok , et al. April 24, 2 | 2018-04-24 |
Spacer Formation Preventing Gate Bending App 20180108660 - Pranatharthiharan; Balasubramanian ;   et al. | 2018-04-19 |
Nanowire Fet Including Nanowire Channel Spacers App 20180097088 - Seo; Soon-Cheon | 2018-04-05 |
FinFET DEVICE WITH ABRUPT JUNCTIONS App 20180097017 - Cheng; Kangguo ;   et al. | 2018-04-05 |
Semiconductor Devices With Sidewall Spacers Of Equal Thickness App 20180090390 - CHENG; Kangguo ;   et al. | 2018-03-29 |
Nanosheet Isolation For Bulk Cmos Non-planar Devices App 20180090566 - Pranatharthiharan; Balasubramanian ;   et al. | 2018-03-29 |
Spacer Formation On Semiconductor Device App 20180076302 - Devarajan; Thamarai Selvi ;   et al. | 2018-03-15 |
Semiconductor Devices With Sidewall Spacers Of Equal Thickness App 20180069007 - CHENG; Kangguo ;   et al. | 2018-03-08 |
Spacer formation on semiconductor device Grant 9,911,831 - Devarajan , et al. March 6, 2 | 2018-03-06 |
Structure And Process To Tuck Fin Tips Self-aligned To Gates App 20180061941 - Doris; Bruce B. ;   et al. | 2018-03-01 |
Structure And Process To Tuck Fin Tips Self-aligned To Gates App 20180061942 - Doris; Bruce B. ;   et al. | 2018-03-01 |
Semiconductor devices with sidewall spacers of equal thickness Grant 9,905,479 - Cheng , et al. February 27, 2 | 2018-02-27 |
Improving channel strain and controlling lateral epitaxial growth of the source and drain in FinFET devices Grant 9,905,421 - Ok , et al. February 27, 2 | 2018-02-27 |
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices App 20180053851 - Ok; Injo ;   et al. | 2018-02-22 |
Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture Grant 9,893,085 - Ok , et al. February 13, 2 | 2018-02-13 |
Method and structure of improving contact resistance for passive and long channel devices Grant 9,887,289 - Ok , et al. February 6, 2 | 2018-02-06 |
Semiconductor devices with sidewall spacers of equal thickness Grant 9,887,198 - Cheng , et al. February 6, 2 | 2018-02-06 |
Structure and process to tuck fin tips self-aligned to gates Grant 9,876,074 - Doris , et al. January 23, 2 | 2018-01-23 |
Nanosheet isolation for bulk CMOS non-planar devices Grant 9,871,099 - Pranatharthiharan , et al. January 16, 2 | 2018-01-16 |
Nanowire Fet Including Nanowire Channel Spacers App 20180006139 - Seo; Soon-Cheon | 2018-01-04 |
Vertical Cmos Devices With Common Gate Stacks App 20180005904 - Lee; ChoongHyun ;   et al. | 2018-01-04 |
Removal of semiconductor growth defects Grant 9,842,741 - Seo , et al. December 12, 2 | 2017-12-12 |
FinFET device with abrupt junctions Grant 9,837,440 - Cheng , et al. December 5, 2 | 2017-12-05 |
FinFET with dielectric isolated channel Grant 9,825,174 - Cheng , et al. November 21, 2 | 2017-11-21 |
Fet Trench Dipole Formation App 20170330802 - Ok; Injo ;   et al. | 2017-11-16 |
Forming stressed epitaxial layers between gates separated by different pitches Grant 9,818,873 - Alptekin , et al. November 14, 2 | 2017-11-14 |
Minimize Middle-of-line Contact Line Shorts App 20170323833 - Ok; Injo ;   et al. | 2017-11-09 |
FinFET spacer formation on gate sidewalls, between the channel and source/drain regions Grant 9,806,078 - Xie , et al. October 31, 2 | 2017-10-31 |
FET trench dipole formation Grant 9,799,654 - Ok , et al. October 24, 2 | 2017-10-24 |
Extended Contact Area Using Undercut Silicide Extensions App 20170278942 - Leobandung; Effendi ;   et al. | 2017-09-28 |
Integrated Circuit (ic) With Offset Gate Sidewall Contacts And Method Of Manufacture App 20170229479 - Ok; Injo ;   et al. | 2017-08-10 |
Extended contact area using undercut silicide extensions Grant 9,716,160 - Leobandung , et al. July 25, 2 | 2017-07-25 |
Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture Grant 9,704,760 - Ok , et al. July 11, 2 | 2017-07-11 |
Stable contact on one-sided gate tie-down structure Grant 9,685,340 - Ok , et al. June 20, 2 | 2017-06-20 |
Devices and methods of forming epi for aggressive gate pitch Grant 9,685,384 - Xie , et al. June 20, 2 | 2017-06-20 |
Spacer For Dual Epi Cmos Devices App 20170170179 - Seo; Soon-Cheon | 2017-06-15 |
Spacer For Dual Epi Cmos Devices App 20170170181 - Seo; Soon-Cheon | 2017-06-15 |
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices App 20170170315 - Ok; Injo ;   et al. | 2017-06-15 |
Spacer Formation On Semiconductor Device App 20170170301 - Devarajan; Thamarai Selvi ;   et al. | 2017-06-15 |
Self Heating Reduction For Analog Radio Frequency (rf) Device App 20170162445 - Ok; Injo ;   et al. | 2017-06-08 |
Self Heating Reduction For Analog Radio Frequency (rf) Device App 20170162567 - Ok; Injo ;   et al. | 2017-06-08 |
Minimize middle-of-line contact line shorts Grant 9,673,101 - Ok , et al. June 6, 2 | 2017-06-06 |
Finfet With Epitaxial Source And Drain Regions And Dielectric Isolated Channel Region App 20170154982 - CHENG; KANGGUO ;   et al. | 2017-06-01 |
Improving Channel Strain And Controlling Lateral Epitaxial Growth Of The Source And Drain In Finfet Devices App 20170154774 - Ok; Injo ;   et al. | 2017-06-01 |
Effective Device Formation For Advanced Technology Nodes With Aggressive Fin-pitch Scaling App 20170148789 - Ok; Injo ;   et al. | 2017-05-25 |
Semiconductor Structures Including Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack App 20170148662 - Ok; Injo ;   et al. | 2017-05-25 |
Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack App 20170148874 - Ok; Injo ;   et al. | 2017-05-25 |
Replacement metal gate including dielectric gate material Grant 9,653,573 - Jang , et al. May 16, 2 | 2017-05-16 |
Nanosheet Isolation For Bulk Cmos Non-planar Devices App 20170133459 - Pranatharthiharan; Balasubramanian ;   et al. | 2017-05-11 |
Semiconductor Devices With Sidewall Spacers Of Equal Thickness App 20170117193 - CHENG; Kangguo ;   et al. | 2017-04-27 |
Semiconductor device with trench epitaxy and contact Grant 9,627,497 - Seo April 18, 2 | 2017-04-18 |
CMOS NFET and PFET comparable spacer width Grant 9,627,382 - Cheng , et al. April 18, 2 | 2017-04-18 |
Spacer For Trench Epitaxial Structures App 20170103984 - Ok; Injo ;   et al. | 2017-04-13 |
Forming Stressed Epitaxial Layer Using Dummy Gates App 20170104100 - Alptekin; Emre ;   et al. | 2017-04-13 |
FinFET with epitaxial source and drain regions and dielectric isolated channel region Grant 9,620,641 - Cheng , et al. April 11, 2 | 2017-04-11 |
Minimize Middle-of-line Contact Line Shorts App 20170092543 - Ok; Injo ;   et al. | 2017-03-30 |
Removal Of Semiconductor Growth Defects App 20170076954 - Seo; Soon-cheon ;   et al. | 2017-03-16 |
Forming dual contact silicide using metal multi-layer and ion beam mixing Grant 9,595,592 - Ok , et al. March 14, 2 | 2017-03-14 |
Semiconductor devices with sidewall spacers of equal thickness Grant 9,576,961 - Cheng , et al. February 21, 2 | 2017-02-21 |
Salicide formation on replacement metal gate finFet devices Grant 9,577,096 - Leobandung , et al. February 21, 2 | 2017-02-21 |
Salicide Formation On Replacement Metal Gate Finfet Devices App 20170047250 - Leobandung; Effendi ;   et al. | 2017-02-16 |
Effective device formation for advanced technology nodes with aggressive fin-pitch scaling Grant 9,564,370 - Ok , et al. February 7, 2 | 2017-02-07 |
Spacer for dual epi CMOS devices Grant 9,553,093 - Seo January 24, 2 | 2017-01-24 |
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Self heating reduction for analog radio frequency (RF) device Grant 9,520,500 - Ok , et al. December 13, 2 | 2016-12-13 |
Structure And Process To Tuck Fin Tips Self-aligned To Gates App 20160343861 - Doris; Bruce B. ;   et al. | 2016-11-24 |
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Semiconductor devices with sidewall spacers of equal thickness Grant 9,502,418 - Cheng , et al. November 22, 2 | 2016-11-22 |
Removal of semiconductor growth defects Grant 9,496,257 - Seo , et al. November 15, 2 | 2016-11-15 |
Channel strain and controlling lateral epitaxial growth of the source and drain in FinFET devices Grant 9,461,168 - Ok , et al. October 4, 2 | 2016-10-04 |
Semiconductor device with trench epitaxy and contact Grant 9,449,884 - Seo September 20, 2 | 2016-09-20 |
Spacer formation on semiconductor device Grant 9,443,855 - Devarajan , et al. September 13, 2 | 2016-09-13 |
Channel strain and controlling lateral epitaxial growth of the source and drain in FinFET devices Grant 9,431,486 - Ok , et al. August 30, 2 | 2016-08-30 |
Cmos Nfet And Pfet Comparable Spacer Width App 20160240535 - Cheng; Kangguo ;   et al. | 2016-08-18 |
Finfet With Dielectric Isolated Channel App 20160211377 - Cheng; Kangguo ;   et al. | 2016-07-21 |
Co-integration of different fin pitches for logic and analog devices Grant 9,397,006 - Ok , et al. July 19, 2 | 2016-07-19 |
Modified Fin Cut After Epitaxial Growth App 20160172379 - Kanakasabapathy; Sivananda K. ;   et al. | 2016-06-16 |
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Replacement Metal Gate Including Dielectric Gate Material App 20160172467 - Jang; Linus ;   et al. | 2016-06-16 |
Finfet With Epitaxial Source And Drain Regions And Dielectric Isolated Channel Region App 20160172498 - CHENG; KANGGUO ;   et al. | 2016-06-16 |
FinFET with dielectric isolated channel Grant 9,362,362 - Cheng , et al. June 7, 2 | 2016-06-07 |
CMOS NFET and PFET comparable spacer width Grant 9,330,983 - Cheng , et al. May 3, 2 | 2016-05-03 |
FinFET with epitaxial source and drain regions and dielectric isolated channel region Grant 9,312,360 - Cheng , et al. April 12, 2 | 2016-04-12 |
Semiconductor Devices With Sidewall Spacers Of Equal Thickness App 20160099322 - CHENG; Kangguo ;   et al. | 2016-04-07 |
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Methods Of Patterning Features Having Differing Widths App 20160064236 - Jang; Linus ;   et al. | 2016-03-03 |
Self-aligned contact structure for replacement metal gate Grant 9,257,531 - Seo , et al. February 9, 2 | 2016-02-09 |
Extended Contact Area Using Undercut Silicide Extensions App 20160035857 - Leobandung; Effendi ;   et al. | 2016-02-04 |
FinFET DEVICE WITH ABRUPT JUNCTIONS App 20160027806 - Cheng; Kangguo ;   et al. | 2016-01-28 |
Removal Of Semiconductor Growth Defects App 20150380405 - Seo; Soon-cheon ;   et al. | 2015-12-31 |
Methods of patterning features having differing widths Grant 9,214,360 - Jang , et al. December 15, 2 | 2015-12-15 |
Replacement Metal Gate Including Dielectric Gate Material App 20150357434 - Jang; Linus ;   et al. | 2015-12-10 |
Finfet With Epitaxial Source And Drain Regions And Dielectric Isolated Channel Region App 20150318377 - Cheng; Kangguo ;   et al. | 2015-11-05 |
Finfet With Dielectric Isolated Channel App 20150295046 - Cheng; Kangguo ;   et al. | 2015-10-15 |
FinFET DEVICE WITH ABRUPT JUNCTIONS App 20150228780 - Cheng; Kangguo ;   et al. | 2015-08-13 |
Replacement Metal Gate Including Dielectric Gate Material App 20150214331 - Jang; Linus ;   et al. | 2015-07-30 |
Self-aligned contact structure for replacement metal gate Grant 8,928,090 - Seo , et al. January 6, 2 | 2015-01-06 |
Self-aligned Contact Structure For Replacement Metal Gate App 20140377927 - Seo; Soon-Cheon ;   et al. | 2014-12-25 |
Semiconductor device including multiple metal semiconductor alloy region and a gate structure covered by a continuous encapsulating layer Grant 8,901,670 - Kanakasabapathy , et al. December 2, 2 | 2014-12-02 |
Methods Of Patterning Features Having Differing Widths App 20140329388 - Jang; Linus ;   et al. | 2014-11-06 |
MOSFET gate and source/drain contact metallization Grant 8,809,174 - Seo , et al. August 19, 2 | 2014-08-19 |
Semiconductor plural gate lengths Grant 8,802,565 - Hartig , et al. August 12, 2 | 2014-08-12 |
Finfet Hybrid Full Metal Gate With Borderless Contacts App 20140162447 - Edge; Lisa F. ;   et al. | 2014-06-12 |
Self-aligned Contact Structure For Replacement Metal Gate App 20140117421 - Seo; Soon-Cheon ;   et al. | 2014-05-01 |
Superfilled metal contact vias for semiconductor devices Grant 8,698,318 - Kelly , et al. April 15, 2 | 2014-04-15 |
Superfilled metal contact vias for semiconductor devices Grant 8,691,687 - Kelly , et al. April 8, 2 | 2014-04-08 |
Semiconductor plural gate lengths App 20140070414 - Hartig; Michael J. ;   et al. | 2014-03-13 |
Mosfet Gate And Source/drain Contact Metallization App 20140027865 - Seo; Soon-Cheon ;   et al. | 2014-01-30 |
FinFET with improved gate planarity Grant 8,569,125 - Standaert , et al. October 29, 2 | 2013-10-29 |
MOSFET gate and source/drain contact metallization Grant 8,551,874 - Seo , et al. October 8, 2 | 2013-10-08 |
Superfilled Metal Contact Vias For Semiconductor Devices App 20130140681 - Kelly; James J. ;   et al. | 2013-06-06 |
Finfet With Improved Gate Planarity App 20130134513 - Standaert; Theodorus Eduardus ;   et al. | 2013-05-30 |
Semiconductor Device Including Multiple Metal Semiconductor Alloy Region And A Gate Structure Covered By A Continuous Encapsulating Layer App 20120326217 - Kanakasabapathy; Sivananda K. ;   et al. | 2012-12-27 |
Semiconductor Device Including Multiple Metal Semiconductor Alloy Region And A Gate Structure Covered By A Continuous Encapsulating Layer App 20120205727 - Kanakasabapathy; Sivananda K. ;   et al. | 2012-08-16 |
Mosfet Gate And Source/drain Contact Metallization App 20110272765 - Seo; Soon-Cheon ;   et al. | 2011-11-10 |
Superfilled Metal Contact Vias For Semiconductor Devices App 20110163449 - Kelly; James J. ;   et al. | 2011-07-07 |
Void-free damascene copper deposition process and means of monitoring thereof Grant 7,678,258 - Andricacos , et al. March 16, 2 | 2010-03-16 |
Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer Grant 7,241,696 - Clevenger , et al. July 10, 2 | 2007-07-10 |
Electroplated copper interconnection structure, process for making and electroplating bath Grant 7,227,265 - Andricacos , et al. June 5, 2 | 2007-06-05 |
PE-ALD of TaN diffusion barrier region on low-k materials Grant 7,211,507 - Dunn , et al. May 1, 2 | 2007-05-01 |
Method to generate porous organic dielectric Grant 7,101,784 - Clevenger , et al. September 5, 2 | 2006-09-05 |
PE-ALD OF TaN DIFFUSION BARRIER REGION ON LOW-K MATERIALS App 20050269703 - Dunn, Derren N. ;   et al. | 2005-12-08 |
Method to generate porous organic dielectric App 20050200024 - Clevenger, Lawrence A. ;   et al. | 2005-09-15 |
Method to generate porous organic dielectric Grant 6,921,978 - Clevenger , et al. July 26, 2 | 2005-07-26 |
Bilayer HDP CVD/PE CVD cap in advanced BEOL interconnect structures and method thereof Grant 6,914,320 - Chen , et al. July 5, 2 | 2005-07-05 |
Bilayer HDP CVD/PE CVD cap in advance BEOL interconnect structures and method thereof Grant 6,887,783 - Chen , et al. May 3, 2 | 2005-05-03 |
Void-free damascene copper deposition process and means of monitoring thereof App 20050006242 - Andricacos, Panayotis ;   et al. | 2005-01-13 |
Method To Generate Porous Organic Dielectric App 20040224494 - Clevenger, Lawrence A. ;   et al. | 2004-11-11 |
Electroplated copper interconnection structure, process for making and electroplating bath App 20040178077 - Andricacos, Panayotis C. ;   et al. | 2004-09-16 |
Electroplated copper interconnection structure, process for making and electroplating bath App 20040178078 - Andricacos, Panayotis C. ;   et al. | 2004-09-16 |
Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof App 20040173907 - Chen, Tze-Chiang ;   et al. | 2004-09-09 |
Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer App 20040115921 - Clevenger, Larry ;   et al. | 2004-06-17 |
Method of forming planar Cu interconnects without chemical mechanical polishing App 20040094511 - Seo, Soon-Cheon ;   et al. | 2004-05-20 |
Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof App 20030134499 - Chen, Tze-Chiang ;   et al. | 2003-07-17 |
Chip to wiring interface with single metal alloy layer applied to surface of copper interconnect Grant 6,573,606 - Sambucetti , et al. June 3, 2 | 2003-06-03 |
Chromium adhesion layer for copper vias in low-k technology Grant 6,539,625 - Engel , et al. April 1, 2 | 2003-04-01 |
Process to increase reliability CuBEOL structures Grant 6,503,834 - Chen , et al. January 7, 2 | 2003-01-07 |
Chip to wiring interface with single metal alloy layer applied to surface of copper interconnect App 20030001275 - Sambucetti, Carlos Juan ;   et al. | 2003-01-02 |
Chromium adhesion layer for copper vias in low-k technology App 20020088117 - Engel, Brett H. ;   et al. | 2002-07-11 |
Electroless metal liner formation methods App 20020081842 - Sambucetti, Carlos J. ;   et al. | 2002-06-27 |