Quek; Elgin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Quek; Elgin.The latest application filed is for "fin selector with gated rram".

Company Profile

1.127.117

Quek; Elgin - Singapore SG
Quek; Elgin - Sinagpore N/A SG
Quek; Elgin - US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Fin selector with gated RRAM Grant 10,424,732 - Toh , et al. Sept	2019-09-24
LDMOS with improved breakdown voltage and with non-uniformed gate dielectric and gate electrode Grant 10,032,902 - Toh , et al. July 24, 2	2018-07-24
Corner transistor suppression Grant 9,905,642 - Tan , et al. February 27, 2	2018-02-27
Fin Selector With Gated Rram App 20180033963 - TOH; Eng Huat ; et al.	2018-02-01
Compact RRAM structure with contact-less unit cell Grant 9,847,377 - Tan , et al. December 19, 2	2017-12-19
Fin selector with gated RRAM Grant 9,825,223 - Toh , et al. November 21, 2	2017-11-21
Transistor devices having an anti-fuse configuration and methods of forming the same Grant 9,431,497 - Toh , et al. August 30, 2	2016-08-30
Compact Rram Structure With Contact-less Unit Cell App 20160247857 - TAN; Shyue Seng ; et al.	2016-08-25
Corner Transistor Suppression App 20160240611 - TAN; Shyue Seng ; et al.	2016-08-18
FinFET Grant 9,406,801 - Toh , et al. August 2, 2	2016-08-02
Compact RRAM structure with contact-less unit cell Grant 9,401,473 - Tan , et al. July 26, 2	2016-07-26
Corner transistor suppression Grant 9,368,386 - Tan , et al. June 14, 2	2016-06-14
Self-aligned contact for replacement metal gate and silicide last processes Grant 9,362,274 - Toh , et al. June 7, 2	2016-06-07
Memory cell with decoupled channels Grant 9,343,472 - Tan , et al. May 17, 2	2016-05-17
Double Gated Flash Memory App 20160093630 - TAN; Shyue Seng (Jason) ; et al.	2016-03-31
Method to tune narrow width effect with raised S/D structure Grant 9,281,308 - Yin , et al. March 8, 2	2016-03-08
Three dimensional RRAM device, and methods of making same Grant 9,276,041 - Toh , et al. March 1, 2	2016-03-01
Double gated flash memory Grant 9,263,132 - Tan , et al. February 16, 2	2016-02-16
Finfet With Stressors App 20160035873 - TOH; Eng Huat ; et al.	2016-02-04
Floating body cell Grant 9,252,270 - Tan , et al. February 2, 2	2016-02-02
LDMOS with improved breakdown voltage Grant 9,219,147 - Toh , et al. December 22, 2	2015-12-22
Ldmos With Improved Breakdown Voltage App 20150325697 - TOH; Eng Huat ; et al.	2015-11-12
RRAM structure at STI with Si-based selector Grant 9,184,215 - Tan , et al. November 10, 2	2015-11-10
FinFET with stressors Grant 9,171,953 - Toh , et al. October 27, 2	2015-10-27
Split-gate Flash Memory Exhibiting Reduced Interference App 20150255471 - TOH; Eng Huat ; et al.	2015-09-10
Novel Compact Charge Trap Multi-time Programmable Memory App 20150236034 - TOH; Eng Huat ; et al.	2015-08-20
Fin Selector With Gated Rram App 20150221867 - TOH; Eng Huat ; et al.	2015-08-06
Method and apparatus for embedded NVM utilizing an RMG process Grant 9,093,551 - Toh , et al. July 28, 2	2015-07-28
Compact localized RRAM cell structure realized by spacer technology Grant 9,087,988 - Tan , et al. July 21, 2	2015-07-21
Compact Localized Rram Cell Structure Realized By Spacer Technology App 20150188047 - TAN; Shyue Seng ; et al.	2015-07-02
Split-gate flash memory exhibiting reduced interference Grant 9,064,803 - Toh , et al. June 23, 2	2015-06-23
Compact charge trap multi-time programmable memory Grant 9,054,209 - Toh , et al. June 9, 2	2015-06-09
LDMOS with two gate stacks having different work functions for improved breakdown voltage Grant 9,034,711 - Toh , et al. May 19, 2	2015-05-19
P-channel flash with enhanced band-to-band tunneling hot electron injection Grant 9,029,227 - Toh , et al. May 12, 2	2015-05-12
Fin selector with gated RRAM Grant 9,029,231 - Toh , et al. May 12, 2	2015-05-12
Fin-type Memory App 20150123068 - TOH; Eng Huat ; et al.	2015-05-07
Memory Cell With Decoupled Channels App 20150104915 - TAN; Shyue Seng ; et al.	2015-04-16
Stress liner for stress engineering Grant 8,999,863 - Lee , et al. April 7, 2	2015-04-07
Compact localized RRAM cell structure realized by spacer technology Grant 8,993,407 - Tan , et al. March 31, 2	2015-03-31
Finfet App 20150069512 - TOH; Eng Huat ; et al.	2015-03-12
Semiconductor device with reduced contact resistance and method of manufacturing thereof Grant 8,975,708 - Toh , et al. March 10, 2	2015-03-10
Integration of memory, high voltage and logic devices Grant 8,957,470 - Tang , et al. February 17, 2	2015-02-17
Integrated circuits having improved split-gate nonvolatile memory devices and methods for fabrication of same Grant 8,945,997 - Zhang , et al. February 3, 2	2015-02-03
Memory cell with decoupled channels Grant 8,946,806 - Tan , et al. February 3, 2	2015-02-03
Diffusion Barrier And Method Of Formation Thereof App 20150008528 - TAN; Shyue Seng ; et al.	2015-01-08
Integrated Circuits Having Improved Split-gate Nonvolatile Memory Devices And Methods For Fabrication Of Same App 20150001610 - Zhang; Zufa ; et al.	2015-01-01
Transistor Devices Having An Anti-fuse Configuration And Methods Of Forming The Same App 20140346603 - Toh; Eng Huat ; et al.	2014-11-27
Fin-type memory Grant 8,895,402 - Toh , et al. November 25, 2	2014-11-25
Finfet Grant 8,889,494 - Toh , et al. November 18, 2	2014-11-18
Novel Method To Tune Narrow Width Effect With Raised S/d Structure App 20140332902 - Yin; Chunshan ; et al.	2014-11-13
Fin Selector With Gated Rram App 20140264228 - TOH; Eng Huat ; et al.	2014-09-18
Non-volatile memory using pyramidal nanocrystals as electron storage elements Grant 8,824,208 - Quek , et al. September 2, 2	2014-09-02
Ldmos With Improved Breakdown Voltage App 20140239391 - TOH; Eng Huat ; et al.	2014-08-28
Method to tune narrow width effect with raised S/D structure Grant 8,785,287 - Yin , et al. July 22, 2	2014-07-22
Multi-time programmable non-volatile memory Grant 8,772,108 - Toh , et al. July 8, 2	2014-07-08
Floating Body Cell App 20140167161 - Tan; Shyue Seng ; et al.	2014-06-19
Novel Rram Structure At Sti With Si-based Selector App 20140158970 - TAN; Shyue Seng ; et al.	2014-06-12
Non-volatile memory utilizing impact ionization and tunnelling and method of manufacturing thereof Grant 8,750,037 - Toh , et al. June 10, 2	2014-06-10
LDMOS with improved breakdown voltage Grant 8,748,271 - Toh , et al. June 10, 2	2014-06-10
Compact Rram Structure With Contact-less Unit Cell App 20140138603 - TAN; Shyue Seng ; et al.	2014-05-22
Compact Localized Rram Cell Structure Realized By Spacer Technology App 20140138605 - TAN; Shyue Seng ; et al.	2014-05-22
Compact RRAM device and methods of making same Grant 8,698,118 - Toh , et al. April 15, 2	2014-04-15
RRAM structure at STI with Si-based selector Grant 8,685,799 - Tan , et al. April 1, 2	2014-04-01
RRAM device with an embedded selector structure and methods of making same Grant 8,674,332 - Toh , et al. March 18, 2	2014-03-18
Methods to reduce gate contact resistance for AC reff reduction Grant 8,674,457 - Toh , et al. March 18, 2	2014-03-18
Novel Rram Structure At Sti With Si-based Selector App 20140070159 - Tan; Shyue Seng ; et al.	2014-03-13
Fin-type Memory App 20140061576 - TOH; Eng Huat ; et al.	2014-03-06
Novel Compact Charge Trap Multi-time Programmable Memory App 20140048865 - TOH; Eng Huat ; et al.	2014-02-20
Multi-time Programmable Memory App 20140048867 - TOH; Eng Huat ; et al.	2014-02-20
Modifying growth rate of a device layer Grant 8,633,081 - Yin , et al. January 21, 2	2014-01-21
Method And Apparatus For Embedded Nvm Utilizing An Rmg Process App 20140008713 - Toh; Eng Huat ; et al.	2014-01-09
Integration Of Memory, High Voltage And Logic Devices App 20130334584 - TANG; Yan Zhe ; et al.	2013-12-19
Non-volatile Memory Using Pyramidal Nanocrystals As Electron Storage Elements App 20130328118 - Quek; Elgin ; et al.	2013-12-12
Finfet With Stressors App 20130307038 - TOH; Eng Huat ; et al.	2013-11-21
Localized Device App 20130299764 - TAN; Shyue Seng ; et al.	2013-11-14
Method And Apparatus For Utilizing Contact-sidewall Capacitance In A Single Poly Non-volatile Memory Cell App 20130292756 - Tang; Yan Zhe ; et al.	2013-11-07
Corner Transistor Suppression App 20130288452 - TAN; Shyue Seng ; et al.	2013-10-31
Rram Device With An Embedded Selector Structure And Methods Of Making Same App 20130270501 - Toh; Eng Huat ; et al.	2013-10-17
Semiconductor Device With Reduced Contact Resistance And Method Of Manufacturing Thereof App 20130270654 - Toh; Eng Huat ; et al.	2013-10-17
Three Dimensional Rram Device, And Methods Of Making Same App 20130240821 - Toh; Eng Huat ; et al.	2013-09-19
RRAM structure with improved memory margin Grant 8,536,558 - Tan , et al. September 17, 2	2013-09-17
Self-aligned Contact For Replacement Metal Gate And Silicide Last Processes App 20130234253 - TOH; Eng Huat ; et al.	2013-09-12
Memory cell with improved retention Grant 8,530,310 - Teo , et al. September 10, 2	2013-09-10
Compact Rram Device And Methods Of Making Same App 20130221308 - Toh; Eng Huat ; et al.	2013-08-29
Nano-electro-mechanical system (NEMS) structures with actuatable semiconductor fin on bulk substrates Grant 8,502,279 - Toh , et al. August 6, 2	2013-08-06
FinFET with stressors Grant 8,492,235 - Toh , et al. July 23, 2	2013-07-23
Semiconductor device with reduced contact resistance and method of manufacturing thereof Grant 8,470,700 - Toh , et al. June 25, 2	2013-06-25
Non-volatile memory using pyramidal nanocrystals as electron storage elements Grant 8,446,779 - Quek , et al. May 21, 2	2013-05-21
Self-aligned contact for replacement metal gate and silicide last processes Grant 8,440,533 - Toh , et al. May 14, 2	2013-05-14
Diffusion Barrier And Method Of Formation Thereof App 20130087889 - TAN; Shyue Seng ; et al.	2013-04-11
Double Gated Flash Memory App 20130037877 - Tan; Shyue Seng (Jason) ; et al.	2013-02-14
Method of fabricating a silicon tunneling field effect transistor (TFET) with high drive current Grant 8,368,127 - Zhu , et al. February 5, 2	2013-02-05
Split-gate Flash Memory Exhibiting Reduced Interference App 20130026552 - Toh; Eng Huat ; et al.	2013-01-31
Memory Cell With Decoupled Channels App 20130020626 - TAN; Shyue Seng ; et al.	2013-01-24
Diffusion barrier and method of formation thereof Grant 8,324,031 - Tan , et al. December 4, 2	2012-12-04
Nano-electro-mechanical System (nems) Structures On Bulk Substrates App 20120292707 - Toh; Eng Huat ; et al.	2012-11-22
Corner Transistor Suppression App 20120292735 - Tan; Shyue Seng (Jason) ; et al.	2012-11-22
Hybrid transistor Grant 8,288,800 - Zhu , et al. October 16, 2	2012-10-16
Ldmos With Improved Breakdown Voltage App 20120228705 - Toh; Eng Huat ; et al.	2012-09-13
Ldmos With Improved Breakdown Voltage App 20120228695 - Toh; Eng Huat ; et al.	2012-09-13
Self-aligned Contact For Replacement Metal Gate And Silicide Last Processes App 20120223394 - Toh; Eng Huat ; et al.	2012-09-06
P-channel Flash With Enhanced Band-to-band Tunneling Hot Electron Injection App 20120223318 - Toh; Eng Huat ; et al.	2012-09-06
Buried Channel Finfet Sonos With Improved P/e Cycling Endurance App 20120217467 - Tan; Shyue Seng (Jason) ; et al.	2012-08-30
Non-volatile memory manufacturing method using STI trench implantation Grant 8,236,646 - Chan , et al. August 7, 2	2012-08-07
Finfet With Stressors App 20120171832 - TOH; Eng Huat ; et al.	2012-07-05
Finfet App 20120168913 - TOH; Eng Huat ; et al.	2012-07-05
Modifying Growth Rate Of A Device Layer App 20120168895 - YIN; Chunshan ; et al.	2012-07-05
Control gate structure and method of forming a control gate structure App 20120112256 - Tan; Shyue Seng ; et al.	2012-05-10
Modulation of stress in stress film through ion implantation and its application in stress memorization technique Grant 8,119,541 - Teo , et al. February 21, 2	2012-02-21
Novel methods to reduce gate contact resistance for AC reff reduction App 20120038009 - Toh; Eng Huat ; et al.	2012-02-16
Semiconductor device with reduced contact resistance and method of manufacturing thereof App 20120018815 - Toh; Eng Huat ; et al.	2012-01-26
Novel method to tune narrow width effect with raised S/D structure App 20120007185 - Yin; Chunshan ; et al.	2012-01-12
Strain-direct-on-insulator (sdoi) Substrate And Method Of Forming App 20110278645 - Teo; Lee Wee ; et al.	2011-11-17
Selective STI stress relaxation through ion implantation Grant 8,008,744 - Teo , et al. August 30, 2	2011-08-30
Strain-direct-on-insulator (SDOI) substrate and method of forming Grant 7,998,835 - Teo , et al. August 16, 2	2011-08-16
Hybrid Transistor App 20110163356 - ZHU; Ming ; et al.	2011-07-07
Memory Cell With Improved Retention App 20110156121 - Teo; Lee Wee ; et al.	2011-06-30
Enhanced stress for transistors Grant 7,935,589 - Teo , et al. May 3, 2	2011-05-03
Method of fabricating a silicon tunneling field effect transistor (TFET) with high drive current App 20110084319 - Zhu; Ming ; et al.	2011-04-14
Non-volatile memory using pyramidal nanocrystals as electron storage elements App 20110044115 - Quek; Elgin ; et al.	2011-02-24
Selective stress relaxation of contact etch stop layer through layout design Grant 7,888,214 - Teo , et al. February 15, 2	2011-02-15
Non-volatile memory utilizing impact ionization and tunnelling and method of manufacturing thereof App 20100315884 - Toh; Eng Huat ; et al.	2010-12-16
Avoiding plasma charging in integrated circuits Grant 7,846,800 - Tan , et al. December 7, 2	2010-12-07
Selective Sti Stress Relaxation Through Ion Implantation App 20100230777 - TEO; Lee Wee ; et al.	2010-09-16
Selective STI stress relaxation through ion implantation Grant 7,727,856 - Teo , et al. June 1, 2	2010-06-01
Diffusion Barrier And Method Of Formation Thereof App 20090315152 - TAN; Shyue Seng ; et al.	2009-12-24
Stress Liner For Stress Engineering App 20090302391 - LEE; Jae Gon ; et al.	2009-12-10
Pfet Enhancement During Smt App 20090302401 - TEO; Lee Wee ; et al.	2009-12-10
Modulation of Stress in Stress Film through Ion Implantation and Its Application in Stress Memorization Technique App 20090286365 - Teo; Lee Wee ; et al.	2009-11-19
Enhanced Stress For Transistors App 20090267117 - TEO; Lee Wee ; et al.	2009-10-29
Modulation of stress in stress film through ion implantation and its application in stress memorization technique Grant 7,592,270 - Teo , et al. September 22, 2	2009-09-22
Avoiding Plasma Charging In Integrated Circuits App 20090224326 - TAN; Chung Foong ; et al.	2009-09-10
Strain-direct-on-insulator (SDOI) substrate and method of forming App 20090179226 - Teo; Lee Wee ; et al.	2009-07-16
Selective STI Stress Relaxation Through Ion Implantation App 20080150037 - Teo; Lee Wee ; et al.	2008-06-26
Modulation of Stress in Stress Film through Ion Implantation and Its Application in Stress Memorization Technique App 20080064191 - Teo; Lee Wee ; et al.	2008-03-13
Thyristor-based SRAM Grant 7,285,804 - Quek , et al. October 23, 2	2007-10-23
Modulation of stress in stress film through ion implantation and its application in stress memorization technique App 20070141775 - Teo; Lee Wee ; et al.	2007-06-21
Selective stress relaxation of contact etch stop layer through layout design App 20070132032 - Teo; Lee Wee ; et al.	2007-06-14
Material architecture for the fabrication of low temperature transistor Grant 7,169,675 - Tan , et al. January 30, 2	2007-01-30
Thyristor-based SRAM Grant 7,148,522 - Quek , et al. December 12, 2	2006-12-12
Shallow amorphizing implant for gettering of deep secondary end of range defects Grant 7,071,069 - Tan , et al. July 4, 2	2006-07-04
Method of activating polysilicon gate structure dopants after offset spacer deposition Grant 6,969,646 - Quek , et al. November 29, 2	2005-11-29
Method for integrating a SONOS gate oxide transistor into a logic/analog integrated circuit having several gate oxide thicknesses Grant 6,946,349 - Lee , et al. September 20, 2	2005-09-20
Thyristor-based SRAM App 20050167664 - Quek, Elgin ; et al.	2005-08-04
Method of forming a pocket implant region after formation of composite insulator spacers Grant 6,924,180 - Quek August 2, 2	2005-08-02
Shallow amorphizing implant for gettering of deep secondary end of range defects App 20050136623 - Tan, Chung Foong ; et al.	2005-06-23
Method using quasi-planar double gated fin field effect transistor process for the fabrication of a thyristor-based static read/write random-access memory Grant 6,897,111 - Quek , et al. May 24, 2	2005-05-24
Non-volatile memory and manufacturing method using STI trench implantation App 20050101102 - Chan, Tze Ho Simon ; et al.	2005-05-12
Thyristor-based SRAM App 20050098794 - Quek, Elgin ; et al.	2005-05-12
Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing App 20050101083 - Ang, Chew Hoe ; et al.	2005-05-12
Method to pattern small features by using a re-flowable hard mask App 20050089777 - Ang, Chew-Hoe ; et al.	2005-04-28
Thyristor-based Sram And Method For The Fabrication Thereof App 20050026337 - Quek, Elgin ; et al.	2005-02-03
Thyistor-based SRAM and method using quasi-planar finfet process for the fabrication thereof App 20050026343 - Quek, Elgin ; et al.	2005-02-03
Thyristor-based SRAM and method for the fabrication thereof Grant 6,849,481 - Quek , et al. February 1, 2	2005-02-01
Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing Grant 6,841,441 - Ang , et al. January 11, 2	2005-01-11
Formation of small gates beyond lithographic limits App 20040266155 - Ang, Chew Hoe ; et al.	2004-12-30
Method to pattern small features by using a re-flowable hard mask Grant 6,828,082 - Ang , et al. December 7, 2	2004-12-07
Method of integrating L-shaped spacers in a high performance CMOS process via use of an oxide-nitride-doped oxide spacer Grant 6,815,355 - Quek November 9, 2	2004-11-09
Method of activating polysilicon gate structure dopants after offset spacer deposition App 20040164320 - Quek, Elgin ; et al.	2004-08-26
Method of forming a pocket implant region after formation of composite insulator spacers App 20040157397 - Quek, Elgin	2004-08-12
Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing App 20040132271 - Ang, Chew Hoe ; et al.	2004-07-08
Method to form a self-aligned CMOS inverter using vertical device integration Grant 6,747,314 - Sundaresan , et al. June 8, 2	2004-06-08
Method of integrating L - shaped spacers in a high performance CMOS process via use of an oxide - nitride - doped oxide spacer App 20040072435 - Quek, Elgin	2004-04-15
Method for forming variable-K gate dielectric Grant 6,709,934 - Lee , et al. March 23, 2	2004-03-23
Method to fabricate a single gate with dual work-functions Grant 6,664,153 - Ang , et al. December 16, 2	2003-12-16
Method of fabricating variable length vertical transistors Grant 6,632,712 - Ang , et al. October 14, 2	2003-10-14
Forming dual gate oxide thickness on vertical transistors by ion implantation Grant 6,610,575 - Ang , et al. August 26, 2	2003-08-26
Method of forming small transistor gates by using self-aligned reverse spacer as a hard mask Grant 6,610,604 - Ang , et al. August 26, 2	2003-08-26
Method to fabricate a single gate with dual work-functions App 20030153139 - Ang, Chew Hoe ; et al.	2003-08-14
Method to pattern small features by using a re-flowable hard mask App 20030152871 - Ang, Chew-Hoe ; et al.	2003-08-14
Method of fabricating CMOS device with dual gate electrode Grant 6,605,501 - Ang , et al. August 12, 2	2003-08-12
Method Of Forming Small Transistor Gates By Using Self-aligned Reverse Spacer As A Hard Mask App 20030148617 - Ang, Chew-Hoe ; et al.	2003-08-07
Method to form elevated source/drain using poly spacer Grant 6,566,208 - Pan , et al. May 20, 2	2003-05-20
Method to form a self-aligned CMOS inverter using vertical device integration App 20030075758 - Sundaresan, Ravi ; et al.	2003-04-24
Method to form a vertical transistor by first forming a gate/spacer stack, then using selective epitaxy to form source, drain and channel Grant 6,544,824 - Pradeep , et al. April 8, 2	2003-04-08
Method to form elevated source/drain using poly spacer App 20030022450 - Pan, Yang ; et al.	2003-01-30
Method to improve latchup by forming selective sloped staircase STI structure to use in the I/0 or latchup sensitive area App 20030017710 - Yang, Pan ; et al.	2003-01-23
Method for forming variable-K gate dielectric App 20020173106 - Lee, James Yong Meng ; et al.	2002-11-21
Method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner Grant 6,468,877 - Pradeep , et al. October 22, 2	2002-10-22
Method to form a self-aligned CMOS inverter using vertical device integration Grant 6,461,900 - Sundaresan , et al. October 8, 2	2002-10-08
Method to control the channel length of a vertical transistor by first forming channel using selective epi and source/drain using implantation Grant 6,436,770 - Leung , et al. August 20, 2	2002-08-20
Method to form high k dielectric and silicide to reduce poly depletion by using a sacrificial metal between oxide and gate Grant 6,429,109 - Zheng , et al. August 6, 2	2002-08-06
Method For Fabricating A Self Aligned S/d Cmos Device On Insulated Layer By Forming A Trench Along The Sti And Fill With Oxide App 20020102798 - Zheng, Jia Zhen ; et al.	2002-08-01
Method for forming variable-K gate dielectric App 20020100947 - Lee, James Yong Meng ; et al.	2002-08-01
Method to form a vertical transistor by selective epitaxial growth and delta doped silicon layers App 20020102784 - Lee, James Yong Meng ; et al.	2002-08-01
Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs) App 20020098655 - Zheng, Jia Zhen ; et al.	2002-07-25
Method for fabricating a self aligned S/D CMOS device on insulated layer by forming a trench along the STI and fill with oxide Grant 6,417,054 - Zheng , et al. July 9, 2	2002-07-09
Method to form low-overlap-capacitance transistors by forming microtrench at the gate edge Grant 6,417,056 - Quek , et al. July 9, 2	2002-07-09
Method to form a low parasitic capacitance pseudo-SOI CMOS device Grant 6,403,485 - Quek , et al. June 11, 2	2002-06-11
Method to form a recessed source drain on a trench side wall with a replacement gate technique Grant 6,380,088 - Chan , et al. April 30, 2	2002-04-30
Method to form a balloon shaped STI using a micro machining technique to remove heavily doped silicon Grant 6,313,008 - Leung , et al. November 6, 2	2001-11-06
Method to form smaller channel with CMOS device by isotropic etching of the gate materials Grant 6,306,715 - Chan , et al. October 23, 2	2001-10-23
Method to form transistors with multiple threshold voltages (VT) using a combination of different work function gate materials Grant 6,300,177 - Sundaresan , et al. October 9, 2	2001-10-09
Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect Grant 5,894,059 - Peidous , et al. April 13, 1	1999-04-13