Ponoth; Shom

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ponoth; Shom.The latest application filed is for "managing connections of input and output devices in a physical room".

Company Profile

8.200.200

Ponoth; Shom - Irvine CA
Ponoth; Shom - Armonk NY
Ponoth; Shom - Newport Beach CA
Ponoth; Shom - Gaithersburg MD
Ponoth; Shom - Clifton Park NY US
Ponoth; Shom - Los Angeles CA
Ponoth; Shom - Clifron Park NY
Ponoth; Shom - Albany NY
Ponoth; Shom - Gaitherburg MD
Ponoth; Shom - Las angeles CA
Ponoth; Shom - Hopewell Junction NY US
Ponoth; Shom - Clifton Pank NY
Ponoth; Shom - Fishkill NY
Ponoth; Shom - US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Managing connections of input and output devices in a physical room Grant 11,269,789 - Vempaty , et al. March 8, 2	2022-03-08
Managing Connections Of Input And Output Devices In A Physical Room App 20210056046 - VEMPATY; ADITYA ; et al.	2021-02-25
Managing connections of input and output devices in a physical room Grant 10,838,881 - Vempaty , et al. November 17, 2	2020-11-17
Managing Connections Of Input And Output Devices In A Physical Room App 20200341912 - VEMPATY; ADITYA ; et al.	2020-10-29
Managing Multi-role Activities In A Physical Room With Multimedia Communications App 20200211406 - KOKKU; RAVINDRANATH ; et al.	2020-07-02
Three dimensional LVDMOS transistor structures Grant 10,262,992 - Liu , et al.	2019-04-16
Three dimensional monolithic LDMOS transistor Grant 10,236,354 - Liu , et al.	2019-03-19
Interconnect structures incorporating air gap spacers Grant 10,192,781 - Nitta , et al. Ja	2019-01-29
Size-filtered multimetal structures Grant 10,134,631 - Horak , et al. November 20, 2	2018-11-20
FDSOI LDMOS semiconductor device Grant 10,115,821 - Ponoth , et al. October 30, 2	2018-10-30
Three Dimensional Lvdmos Transistor Structures App 20180286858 - LIU; Qing ; et al.	2018-10-04
FDSOI LDMOS Semiconductor Device App 20180122942 - PONOTH; Shom ; et al.	2018-05-03
Replacement gate structures for transistor devices Grant 9,953,978 - Xie , et al. April 24, 2	2018-04-24
Three Dimensional Monolithic Ldmos Transistor App 20180033860 - Liu; Qing ; et al.	2018-02-01
Three dimensional monolithic LDMOS transistor Grant 9,825,141 - Liu , et al. November 21, 2	2017-11-21
Extended drain MOS device for FDSOI devices Grant 9,799,524 - Ito , et al. October 24, 2	2017-10-24
Fin field effect transistor device with reduced overlap capacitance and enhanced mechanical stability Grant 9,793,378 - Loubet , et al. October 17, 2	2017-10-17
Isolation regions for SOI devices Grant 9,768,055 - Liu , et al. September 19, 2	2017-09-19
Dummy gate structure for electrical isolation of a fin DRAM Grant 9,741,722 - Barth, Jr. , et al. August 22, 2	2017-08-22
Gate structures with protected end surfaces to eliminate or reduce unwanted EPI material growth Grant 9,711,503 - Xie , et al. July 18, 2	2017-07-18
Reduced footprint LDMOS structure for finFET technologies Grant 9,698,148 - Ponoth , et al. July 4, 2	2017-07-04
Interconnect structures incorporating air-gap spacers Grant 9,673,087 - Nitta , et al. June 6, 2	2017-06-06
Replacement gate electrode with a self-aligned dielectric spacer Grant 9,660,030 - Ponoth , et al. May 23, 2	2017-05-23
Method to protect against contact related shorts on UTBB Grant 9,633,893 - Loubet , et al. April 25, 2	2017-04-25
Self-aligned dielectric isolation for FinFET devices Grant 9,627,377 - Bergendahl , et al. April 18, 2	2017-04-18
Borderless contact structure Grant 9,620,619 - Basker , et al. April 11, 2	2017-04-11
Method for manufacturing interconnect structures incorporating air gap spacers Grant 9,613,851 - Nitta , et al. April 4, 2	2017-04-04
Undercut insulating regions for silicon-on-insulator device Grant 9,595,578 - Cheng , et al. March 14, 2	2017-03-14
Metal oxide semiconductor devices and fabrication methods Grant 9,583,613 - Ito , et al. February 28, 2	2017-02-28
Dummy gate structure for electrical isolation of a fin DRAM Grant 9,564,445 - Barth, Jr. , et al. February 7, 2	2017-02-07
Formation of isolation surrounding well implantation Grant 9,558,991 - Cheng , et al. January 31, 2	2017-01-31
Extended Drain MOS Device for FDSOI Devices App 20170018618 - ITO; Akira ; et al.	2017-01-19
Reduced Footprint LDMOS Structure for FINFET Technologies App 20170018551 - PONOTH; SHOM ; et al.	2017-01-19
Shallow trench isolation structures Grant 9,548,356 - Doris , et al. January 17, 2	2017-01-17
Undercut Insulating Regions For Silicon-on-insulator Device App 20170005167 - Cheng; Kangguo ; et al.	2017-01-05
Methods of forming FinFET semiconductor devices with self-aligned contact elements using a replacement gate process and the resulting devices Grant 9,515,163 - Xie , et al. December 6, 2	2016-12-06
Three Dimensional Monolithic LDMOS Transistor App 20160351710 - Liu; Qing ; et al.	2016-12-01
Formation of isolation surrounding well implantation Grant 9,508,587 - Cheng , et al. November 29, 2	2016-11-29
Dual shallow trench isolation liner for preventing electrical shorts Grant 9,502,292 - Doris , et al. November 22, 2	2016-11-22
Size-filtered multimetal structures Grant 9,484,254 - Horak , et al. November 1, 2	2016-11-01
FinFET with dielectric isolation by silicon-on-nothing and method of fabrication Grant 9,478,549 - Cheng , et al. October 25, 2	2016-10-25
Undercut insulating regions for silicon-on-insulator device Grant 9,472,616 - Cheng , et al. October 18, 2	2016-10-18
Method for the formation of fin structures for FinFET devices Grant 9,437,504 - Loubet , et al. September 6, 2	2016-09-06
Formation Of Isolation Surrounding Well Implantation App 20160225660 - Cheng; Kangguo ; et al.	2016-08-04
Formation of isolation surrounding well implantation Grant 9,406,548 - Cheng , et al. August 2, 2	2016-08-02
Integrated passive devices for finFET technologies Grant 9,406,665 - Adam , et al. August 2, 2	2016-08-02
FinFET device Grant 9,406,570 - Cheng , et al. August 2, 2	2016-08-02
Metal Oxide Semiconductor Devices and Fabrication Methods App 20160211367 - Ito; Akira ; et al.	2016-07-21
Method To Protect Against Contact Related Shorts On Utbb App 20160211171 - Loubet; Nicolas ; et al.	2016-07-21
Size-filtered Multimetal Structures App 20160204064 - Horak; David V. ; et al.	2016-07-14
Interconnect Structures Incorporating Air-gap Spacers App 20160197002 - NITTA; Satya V. ; et al.	2016-07-07
FinFET semiconductor device having increased gate height control Grant 9,379,135 - Cheng , et al. June 28, 2	2016-06-28
Integrated circuit structure having selectively formed metal cap Grant 9,379,198 - Yang , et al. June 28, 2	2016-06-28
Method For Manufacturing Interconnect Structures Incorporating Air Gap Spacers App 20160181144 - Nitta; Satya V. ; et al.	2016-06-23
Formation Of Isolation Surrounding Well Implantation App 20160163582 - Cheng; Kangguo ; et al.	2016-06-09
Formation Of Isolation Surrounding Well Implantation App 20160148809 - Cheng; Kangguo ; et al.	2016-05-26
Semiconductor structure with deep trench thermal conduction Grant 9,349,838 - Cheng , et al. May 24, 2	2016-05-24
Interconnect structure and method of making same Grant 9,334,572 - Ou , et al. May 10, 2	2016-05-10
Prevention of contact to substrate shorts Grant 9,337,079 - Loubet , et al. May 10, 2	2016-05-10
Hybrid Orientation Fin Field Effect Transistor And Planar Field Effect Transistor App 20160126352 - Cheng; Kangguo ; et al.	2016-05-05
Semiconductor structure with deep trench thermal conduction Grant 9,331,177 - Cheng , et al. May 3, 2	2016-05-03
Microelectronic structure including air gap Grant 9,332,628 - Edelstein , et al. May 3, 2	2016-05-03
Replacement Gate Structures For Transistor Devices App 20160118385 - Xie; Ruilong ; et al.	2016-04-28
Formation of isolation surrounding well implantation Grant 9,312,143 - Cheng , et al. April 12, 2	2016-04-12
Interconnect structures incorporating air-gap spacers Grant 9,305,882 - Nitta , et al. April 5, 2	2016-04-05
Methods Of Forming Gate Structures For Finfet Devices And The Resulting Semiconductor Products App 20160071928 - Xie; Ruilong ; et al.	2016-03-10
Hybrid orientation fin field effect transistor and planar field effect transistor Grant 9,275,911 - Cheng , et al. March 1, 2	2016-03-01
Dual damascene dual alignment interconnect scheme Grant 9,269,621 - Holmes , et al. February 23, 2	2016-02-23
Dummy fin formation by gas cluster ion beam Grant 9,269,629 - Cheng , et al. February 23, 2	2016-02-23
Integrated circuits having gate cap protection and methods of forming the same Grant 9,269,611 - Pham , et al. February 23, 2	2016-02-23
Overlay-tolerant via mask and reactive ion etch (RIE) technique Grant 9,263,388 - Holmes , et al. February 16, 2	2016-02-16
Sub-lithographic semiconductor structures with non-constant pitch Grant 9,263,290 - Bergendahl , et al. February 16, 2	2016-02-16
Interconnect structures incorporating air-gap spacers Grant 9,263,391 - Nitta , et al. February 16, 2	2016-02-16
Manufacturing process for finFET device Grant 9,257,350 - Cheng , et al. February 9, 2	2016-02-09
Methods of forming replacement gate structures for transistors and the resulting devices Grant 9,257,348 - Xie , et al. February 9, 2	2016-02-09
Semiconductor structure with deep trench thermal conduction Grant 9,252,242 - Standaert , et al. February 2, 2	2016-02-02
Dual shallow trench isolation liner for preventing electrical shorts Grant 9,252,052 - Doris , et al. February 2, 2	2016-02-02
Method For Manufacturing Interconnect Structures Incorporating Air Gap Spacers App 20160027686 - NITTA; Satya V. ; et al.	2016-01-28
Dummy Gate Structure For Electrical Isolation Of A Fin Dram App 20160027789 - Barth, JR.; John E. ; et al.	2016-01-28
Uniform finFET gate height Grant 9,245,965 - Haran , et al. January 26, 2	2016-01-26
Dual Shallow Trench Isolation Liner For Preventing Electrical Shorts App 20160013096 - Doris; Bruce B. ; et al.	2016-01-14
Undercut Insulating Regions For Silicon-on-insulator Device App 20160013269 - Cheng; Kangguo ; et al.	2016-01-14
Sub-lithographic Semiconductor Structures With Non-constant Pitch App 20150380262 - Bergendahl; Marc A. ; et al.	2015-12-31
Dual epitaxy region integration Grant 9,224,607 - Cheng , et al. December 29, 2	2015-12-29
Methods of forming gate structures for FinFET devices and the resulting semiconductor products Grant 9,219,153 - Xie , et al. December 22, 2	2015-12-22
FinFET with dielectric isolation by silicon-on-nothing and method of fabrication Grant 9,219,068 - Cheng , et al. December 22, 2	2015-12-22
Undercut insulating regions for silicon-on-insulator device Grant 9,214,378 - Cheng , et al. December 15, 2	2015-12-15
Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) Grant 9,214,397 - Doris , et al. December 15, 2	2015-12-15
Mask free protection of work function material portions in wide replacement gate electrodes Grant 9,202,879 - Koburger, III , et al. December 1, 2	2015-12-01
Process methods for advanced interconnect patterning Grant 9,202,749 - Ponoth , et al. December 1, 2	2015-12-01
Finfet With Dielectric Isolation By Silicon-on-nothing And Method Of Fabrication App 20150340288 - Cheng; Kangguo ; et al.	2015-11-26
Finfet With Undoped Body Bulk App 20150340502 - Ponoth; Shom ; et al.	2015-11-26
Shallow trench isolation structures Grant 9,190,313 - Doris , et al. November 17, 2	2015-11-17
Prevention of fin erosion for semiconductor devices Grant 9,190,487 - Khakifirooz , et al. November 17, 2	2015-11-17
Method For The Formation Of Fin Structures For Finfet Devices App 20150325487 - Loubet; Nicolas ; et al.	2015-11-12
Fin isolation in multi-gate field effect transistors Grant 9,178,019 - Cheng , et al. November 3, 2	2015-11-03
Sub-lithographic semiconductor structures with non-constant pitch Grant 9,177,820 - Bergendahl , et al. November 3, 2	2015-11-03
Dual shallow trench isolation liner for preventing electrical shorts Grant 9,171,757 - Doris , et al. October 27, 2	2015-10-27
Copper interconnect structures and methods of making same Grant 9,159,653 - Yang , et al. October 13, 2	2015-10-13
Microelectronic Structure Including Air Gap App 20150289361 - Edelstein; Daniel C. ; et al.	2015-10-08
Gate Structures With Protected End Surfaces To Eliminate Or Reduce Unwanted Epi Material Growth App 20150270262 - Xie; Ruilong ; et al.	2015-09-24
Interconnect structures and methods for back end of the line integration Grant 9,141,749 - Horak , et al. September 22, 2	2015-09-22
Finfet Semiconductor Device Having Increased Gate Height Control App 20150263046 - Cheng; Kangguo ; et al.	2015-09-17
Shallow Trench Isolation Structures App 20150255538 - Doris; Bruce B. ; et al.	2015-09-10
Finfet Device App 20150235909 - Cheng; Kangguo ; et al.	2015-08-20
Finfet Device App 20150228672 - Cheng; Kangguo ; et al.	2015-08-13
Self aligned contact with improved robustness Grant 9,105,606 - Cheng , et al. August 11, 2	2015-08-11
Microelectronic structure including air gap Grant 9,105,693 - Edelstein , et al. August 11, 2	2015-08-11
Profile control in interconnect structures Grant 9,105,641 - Chen , et al. August 11, 2	2015-08-11
Methods and structures for eliminating or reducing line end epi material growth on gate structures Grant 9,105,617 - Xie , et al. August 11, 2	2015-08-11
Integrated Passive Devices For Finfet Technologies App 20150221631 - Adam; Thomas N. ; et al.	2015-08-06
Overlay-tolerant Via Mask And Reactive Ion Etch (rie) Technique App 20150221591 - Holmes; Steven J. ; et al.	2015-08-06
Process Methods For Advanced Interconnect Patterning App 20150221549 - Ponoth; Shom ; et al.	2015-08-06
Integrated passive devices for FinFET technologies Grant 9,093,564 - Cheng , et al. July 28, 2	2015-07-28
Dummy Gate Structure For Electrical Isolation Of A Fin Dram App 20150206885 - Barth, Jr.; John E. ; et al.	2015-07-23
Integrated Circuits Having Gate Cap Protection And Methods Of Forming The Same App 20150206844 - Pham; Daniel Thanh Khae ; et al.	2015-07-23
Bulk finFET with punchthrough stopper region and method of fabrication Grant 9,082,853 - Cheng , et al. July 14, 2	2015-07-14
Method and structure for finFET with finely controlled device width Grant 9,082,873 - Yamashita , et al. July 14, 2	2015-07-14
Gate Substantial Contact Based One-time Programmable Device App 20150194433 - PONOTH; Shom ; et al.	2015-07-09
Fin Isolation In Multi-gate Field Effect Transistors App 20150171164 - Cheng; Kangguo ; et al.	2015-06-18
Shallow trench isolation structures Grant 9,059,243 - Doris , et al. June 16, 2	2015-06-16
Overlay-tolerant via mask and reactive ion etch (RIE) technique Grant 9,059,254 - Holmes , et al. June 16, 2	2015-06-16
Replacement gate MOSFET with raised source and drain Grant 9,059,270 - Ponoth , et al. June 16, 2	2015-06-16
FinFET semiconductor device having increased gate height control Grant 9,059,242 - Cheng , et al. June 16, 2	2015-06-16
Microelectronic structure including air gap Grant 9,059,251 - Edelstein , et al. June 16, 2	2015-06-16
Substrate Local Interconnect Integration With Finfets App 20150145041 - Divakaruni; Ramachandra ; et al.	2015-05-28
Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) Grant 9,041,116 - Doris , et al. May 26, 2	2015-05-26
Self aligned contact with improved robustness Grant 9,034,703 - Cheng , et al. May 19, 2	2015-05-19
Methods And Structures For Eliminating Or Reducing Line End Epi Material Growth On Gate Structures App 20150129970 - Xie; Ruilong ; et al.	2015-05-14
Reducing Gate Height Variation In Rmg Process App 20150111373 - Cote; William J. ; et al.	2015-04-23
Maskless dual silicide contact formation Grant 8,999,799 - Adusumilli , et al. April 7, 2	2015-04-07
FinFET with dielectric isolation by silicon-on-nothing and method of fabrication Grant 9,000,522 - Cheng , et al. April 7, 2	2015-04-07
Bulk fin-field effect transistors with well defined isolation Grant 8,999,774 - Cheng , et al. April 7, 2	2015-04-07
Bulk fin-field effect transistors with well defined isolation Grant 8,993,382 - Cheng , et al. March 31, 2	2015-03-31
SOI device with embedded liner in box layer to limit STI recess Grant 8,987,070 - Cheng , et al. March 24, 2	2015-03-24
Stress enhanced finFET devices Grant 8,987,837 - Cheng , et al. March 24, 2	2015-03-24
Fin isolation in multi-gate field effect transistors Grant 8,987,790 - Cheng , et al. March 24, 2	2015-03-24
Dual Epitaxy Region Integration App 20150076608 - Cheng; Kangguo ; et al.	2015-03-19
Methods Of Forming Finfet Semiconductor Devices With Self-aligned Contact Elements Using A Replacement Gate Process And The Resulting Devices App 20150069532 - Xie; Ruilong ; et al.	2015-03-12
Finfet With Dielectric Isolation By Silicon-on-nothing And Method Of Fabrication App 20150064855 - Cheng; Kangguo ; et al.	2015-03-05
Self-aligned Dielectric Isolation For Finfet Devices App 20150061040 - Bergendahl; Marc Adam ; et al.	2015-03-05
Semiconductor Structure With Deep Trench Thermal Conduction App 20150064856 - Cheng; Kangguo ; et al.	2015-03-05
Maskless Dual Silicide Contact Formation App 20150064863 - Adusumilli; Praneet ; et al.	2015-03-05
Dummy Fin Formation By Gas Cluster Ion Beam App 20150064874 - Cheng; Kangguo ; et al.	2015-03-05
Semiconductor Structure With Deep Trench Thermal Conduction App 20150054082 - Cheng; Kangguo ; et al.	2015-02-26
Finfet With Self-aligned Punchthrough Stopper App 20150054033 - Cheng; Kangguo ; et al.	2015-02-26
Methods Of Forming Gate Structures For Finfet Devices And The Resulting Smeiconductor Products App 20150054078 - Xie; Ruilong ; et al.	2015-02-26
Methods Of Forming Replacement Gate Structures For Transistors And The Resulting Devices App 20150041905 - Xie; Ruilong ; et al.	2015-02-12
Self Aligned Contact With Improved Robustness App 20150041868 - Cheng; Kangguo ; et al.	2015-02-12
Spacer For Enhancing Via Pattern Overlay Tolerence App 20150035157 - Holmes; Steven J. ; et al.	2015-02-05
Profile Control In Interconnect Structures App 20150035154 - Chen; Shyng-Tsong ; et al.	2015-02-05
Replacement gate MOSFET with raised source and drain Grant 8,946,006 - Ponoth , et al. February 3, 2	2015-02-03
Dummy fin formation by gas cluster ion beam Grant 8,946,792 - Cheng , et al. February 3, 2	2015-02-03
Dual-metal self-aligned wires and vias Grant 8,946,908 - Holmes , et al. February 3, 2	2015-02-03
Self-aligned dielectric isolation for FinFET devices Grant 8,941,156 - Bergendahl , et al. January 27, 2	2015-01-27
Finfets and fin isolation structures Grant 8,941,179 - Bergendahl , et al. January 27, 2	2015-01-27
Contact formation for ultra-scaled devices Grant 8,937,359 - Xie , et al. January 20, 2	2015-01-20
Patterning Fins And Planar Areas In Silicon App 20150014772 - Cheng; Kangguo ; et al.	2015-01-15
FinFET with self-aligned punchthrough stopper Grant 8,932,918 - Cheng , et al. January 13, 2	2015-01-13
Integrated Circuit Structure Having Selectively Formed Metal Cap App 20150008527 - Yang; Chih-Chao ; et al.	2015-01-08
Bulk fin-field effect transistors with well defined isolation Grant 8,928,067 - Cheng , et al. January 6, 2	2015-01-06
Electrical fuse structure and method of fabricating same Grant 8,912,627 - Yang , et al. December 16, 2	2014-12-16
Replacement Gate Electrode With A Self-aligned Dielectric Spacer App 20140363941 - Ponoth; Shom ; et al.	2014-12-11
Creation of vias and trenches with different depths Grant 8,907,458 - Ponoth , et al. December 9, 2	2014-12-09
Single fin cut employing angled processing methods Grant 8,906,807 - Bergendahl , et al. December 9, 2	2014-12-09
Fin Field Effect Transistor Device With Reduced Overlap Capacitance And Enhanced Mechanical Stability App 20140353753 - Loubet; Nicolas ; et al.	2014-12-04
Method For The Formation Of Fin Structures For Finfet Devices App 20140353767 - Liu; Qing ; et al.	2014-12-04
Hybrid copper interconnect structure and method of fabricating same Grant 8,901,744 - Yang , et al. December 2, 2	2014-12-02
Method of forming finFET of variable channel width Grant 8,896,067 - Bergendahl , et al. November 25, 2	2014-11-25
Contact Formation For Ultra-scaled Devices App 20140339629 - Xie; Ruilong ; et al.	2014-11-20
Dual Damascene Dual Alignment Interconnect Scheme App 20140342549 - Holmes; Steven J. ; et al.	2014-11-20
Facilitating gate height uniformity and inter-layer dielectric protection Grant 8,883,623 - Xie , et al. November 11, 2	2014-11-11
Interconnect Structure And Method Of Making Same App 20140326698 - OU; Ya ; et al.	2014-11-06
Integrated circuit structure having selectively formed metal cap Grant 8,877,645 - Yang , et al. November 4, 2	2014-11-04
Uniform Finfet Gate Height App 20140319611 - Haran; Balasubramanian S. ; et al.	2014-10-30
Sealed air gap for semiconductor chip Grant 8,871,624 - Horak , et al. October 28, 2	2014-10-28
Stress enhanced finFET devices Grant 8,859,379 - Cheng , et al. October 14, 2	2014-10-14
Self-aligned contacts Grant 8,853,076 - Fan , et al. October 7, 2	2014-10-07
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20140295647 - CHENG; Kangguo ; et al.	2014-10-02
Integrated Passive Devices For Finfet Technologies App 20140284760 - Cheng; Kangguo ; et al.	2014-09-25
Semiconductor Structure With Deep Trench Thermal Conduction App 20140284717 - Standaert; Theodorus Eduardus ; et al.	2014-09-25
Stress Enhanced Finfet Devices App 20140264598 - CHENG; Kangguo ; et al.	2014-09-18
Copper Interconnect Structures And Methods Of Making Same App 20140264878 - Yang; Chih-Chao ; et al.	2014-09-18
Replacement Gate Electrode With A Self-aligned Dielectric Spacer App 20140264490 - Ponoth; Shom ; et al.	2014-09-18
Stress Enhanced Finfet Devices App 20140264496 - CHENG; Kangguo ; et al.	2014-09-18
Integrated circuits and methods for fabricating integrated circuits having metal gate electrodes Grant 8,835,244 - Xie , et al. September 16, 2	2014-09-16
Method of fabricating a profile control in interconnect structures Grant 8,835,305 - Yang , et al. September 16, 2	2014-09-16
Electrical isolation structures for ultra-thin semiconductor-on-insulator devices Grant 8,836,031 - Haran , et al. September 16, 2	2014-09-16
Prevention Of Fin Erosion For Semiconductor Devices App 20140256106 - Khakifirooz; Ali ; et al.	2014-09-11
Uniform finFET gate height Grant 8,829,617 - Haran , et al. September 9, 2	2014-09-09
MOSFET including asymmetric source and drain regions Grant 8,828,828 - Cheng , et al. September 9, 2	2014-09-09
Dual mandrel sidewall image transfer processes Grant 8,828,876 - Horak , et al. September 9, 2	2014-09-09
Air-dielectric for subtractive etch line and via metallization Grant 8,828,862 - Horak , et al. September 9, 2	2014-09-09
Integrated Circuits And Methods For Fabricating Integrated Circuits Having Metal Gate Electrodes App 20140231885 - Xie; Ruilong ; et al.	2014-08-21
Finfets And Fin Isolation Structures App 20140231918 - Bergendahl; Marc A. ; et al.	2014-08-21
Interconnect structure with a planar interface between a selective conductive cap and a dielectric cap layer Grant 8,809,183 - Bonilla , et al. August 19, 2	2014-08-19
Prevention of fin erosion for semiconductor devices Grant 8,809,920 - Khakifirooz , et al. August 19, 2	2014-08-19
Copper interconnect structures and methods of making same Grant 8,802,558 - Yang , et al. August 12, 2	2014-08-12
Dual damascene dual alignment interconnect scheme Grant 8,803,321 - Holmes , et al. August 12, 2	2014-08-12
Semiconductor chips including passivation layer trench structure Grant 8,803,318 - Kulkarni , et al. August 12, 2	2014-08-12
Interconnect Structure And Method Of Making Same App 20140217592 - OU; Ya ; et al.	2014-08-07
Borderless contact structure employing dual etch stop layers Grant 8,796,783 - Fan , et al. August 5, 2	2014-08-05
Air-dielectric For Subtractive Etch Line And Via Metallization App 20140203453 - Horak; David V. ; et al.	2014-07-24
FinFETs and fin isolation structures Grant 8,785,284 - Bergendahl , et al. July 22, 2	2014-07-22
Dual Mandrel Sidewall Image Transfer Processes App 20140190935 - Horak; David V. ; et al.	2014-07-10
Method Of Forming Finfet Of Variable Channel Width App 20140191323 - Bergendahl; Marc Adam ; et al.	2014-07-10
Finfet Compatible Diode For Esd Protection App 20140191319 - Cheng; Kangguo ; et al.	2014-07-10
Self-aligned Dielectric Isolation For Finfet Devices App 20140191296 - Bergendahl; Marc Adam ; et al.	2014-07-10
Finfet With Dielectric Isolation By Silicon-on-nothing And Method Of Fabrication App 20140191321 - Cheng; Kangguo ; et al.	2014-07-10
Interconnect structure and method of making same Grant 8,772,933 - Ou , et al. July 8, 2	2014-07-08
MOSFET including asymmetric source and drain regions Grant 8,772,874 - Cheng , et al. July 8, 2	2014-07-08
Interconnect structure and method of making same Grant 8,772,180 - Ou , et al. July 8, 2	2014-07-08
Mosfet Including Asymmetric Source And Drain Regions App 20140187007 - Cheng; Kangguo ; et al.	2014-07-03
Method of forming a borderless contact structure employing dual etch stop layers Grant 8,765,585 - Fan , et al. July 1, 2	2014-07-01
Finfet Device App 20140175549 - Cheng; Kangguo ; et al.	2014-06-26
Low-profile local interconnect and method of making the same Grant 8,754,483 - Ponoth , et al. June 17, 2	2014-06-17
Formation of air gap with protection of metal lines Grant 8,754,520 - Nogami , et al. June 17, 2	2014-06-17
Etch Resistant Raised Isolation For Semiconductor Devices App 20140159123 - Cheng; Kangguo ; et al.	2014-06-12
Uniform Finfet Gate Height App 20140151801 - Haran; Balasubramanian S. ; et al.	2014-06-05
Shallow Trench Isolation Structures App 20140154865 - Doris; Bruce B. ; et al.	2014-06-05
Finfet Semiconductor Device Having Increased Gate Height Control App 20140145263 - Cheng; Kangguo ; et al.	2014-05-29
Fin Isolation In Multi-gate Field Effect Transistors App 20140145247 - Cheng; Kangguo ; et al.	2014-05-29
Dummy Fin Formation By Gas Cluster Ion Beam App 20140145248 - Cheng; Kangguo ; et al.	2014-05-29
Air-dielectric for subtractive etch line and via metallization Grant 8,735,279 - Horak , et al. May 27, 2	2014-05-27
Copper Interconnect Structures And Methods Of Making Same App 20140124933 - Yang; Chih-Chao ; et al.	2014-05-08
Prevention Of Fin Erosion For Semiconductor Devices App 20140124840 - Khakifirooz; Ali ; et al.	2014-05-08
Metal alloy cap integration Grant 8,716,127 - Yang , et al. May 6, 2	2014-05-06
Bulk Finfet With Punchthrough Stopper Region And Method Of Fabrication App 20140117462 - Cheng; Kangguo ; et al.	2014-05-01
Facilitating Gate Height Uniformity And Inter-layer Dielectric Protection App 20140110794 - XIE; Ruilong ; et al.	2014-04-24
Sub-lithographic Semiconductor Structures With Non-constant Pitch App 20140110817 - Bergendahl; Marc A. ; et al.	2014-04-24
MOS capacitors with a finFET process Grant 8,703,553 - Cheng , et al. April 22, 2	2014-04-22
Borderless interconnect line structure self-aligned to upper and lower level contact vias Grant 8,704,343 - Ponoth , et al. April 22, 2	2014-04-22
Creation of vias and trenches with different depths Grant 8,703,604 - Ponoth , et al. April 22, 2	2014-04-22
Dual shallow trench isolation liner for preventing electrical shorts Grant 8,703,550 - Doris , et al. April 22, 2	2014-04-22
Hybrid Orientation Fin Field Effect Transistor And Planar Field Effect Transistor App 20140103450 - Cheng; Kangguo ; et al.	2014-04-17
Method To Protect Against Contact Related Shorts On Utbb App 20140099769 - Loubet; Nicolas ; et al.	2014-04-10
Single Fin Cut Employing Angled Processing Methods App 20140099792 - Bergendahl; Marc A. ; et al.	2014-04-10
Dual Shallow Trench Isolation Liner For Preventing Electrical Shorts App 20140099773 - Doris; Bruce B. ; et al.	2014-04-10
Dual Shallow Trench Isolation Liner For Preventing Electrical Shorts App 20140084372 - Doris; Bruce B. ; et al.	2014-03-27
Method And Structure For Finfet With Finely Controlled Device Width App 20140077296 - Yamashita; Tenko ; et al.	2014-03-20
Shallow trench isolation structures Grant 8,673,738 - Doris , et al. March 18, 2	2014-03-18
Self-aligned Contacts App 20140070282 - Fan; Su Chen ; et al.	2014-03-13
Soi Device With Embedded Liner In Box Layer To Limit Sti Recess App 20140070357 - Cheng; Kangguo ; et al.	2014-03-13
Self Aligned Contact With Improved Robustness App 20140070333 - Cheng; Kangguo ; et al.	2014-03-13
Finfet With Self-aligned Punchthrough Stopper App 20140061794 - Cheng; Kangguo ; et al.	2014-03-06
Overlay-tolerant Via Mask And Reactive Ion Etch (rie) Technique App 20140061930 - Holmes; Steven J. ; et al.	2014-03-06
Size-filtered Multimetal Structures App 20140065813 - Horak; David V. ; et al.	2014-03-06
Interconnect Structures And Methods For Back End Of The Line Integration App 20140068541 - HORAK; David V. ; et al.	2014-03-06
Electrical Isolation Structures For Ultra-thin Semiconductor-on-insulator Devices App 20140061800 - Haran; Balasubramanian S. ; et al.	2014-03-06
Electronic Device Including Shallow Trench Isolation (sti) Regions With Bottom Oxide Liner And Upper Nitride Liner And Related Methods App 20140054699 - LIU; QING ; et al.	2014-02-27
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20140048857 - CHENG; Kangguo ; et al.	2014-02-20
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20140045312 - CHENG; Kangguo ; et al.	2014-02-13
Profile Control In Interconnect Structures App 20140035142 - Yang; Chih-Chao ; et al.	2014-02-06
Interconnect structures and methods for back end of the line integration Grant 8,637,400 - Horak , et al. January 28, 2	2014-01-28
Electrical isolation structures for ultra-thin semiconductor-on-insulator devices Grant 8,629,008 - Haran , et al. January 14, 2	2014-01-14
Mask free protection of work function material portions in wide replacement gate electrodes Grant 8,629,511 - Koburger, III , et al. January 14, 2	2014-01-14
Bulk fin-field effect transistors with well defined isolation Grant 8,623,712 - Cheng , et al. January 7, 2	2014-01-07
Undercut Insulating Regions For Silicon-on-insulator Device App 20140001555 - Cheng; Kangguo ; et al.	2014-01-02
Shallow Trench Isolation Structures App 20130344677 - Doris; Bruce B. ; et al.	2013-12-26
Shallow Trench Isolation Structures App 20130341754 - Doris; Bruce B. ; et al.	2013-12-26
Dual Shallow Trench Isolation Liner For Preventing Electrical Shorts App 20130334651 - Doris; Bruce B. ; et al.	2013-12-19
Isolation Structure For Semiconductor Devices App 20130334603 - CHENG; Kangguo ; et al.	2013-12-19
Electrical fuse structure and method of fabricating same Grant 8,609,534 - Yang , et al. December 17, 2	2013-12-17
Dual Damascene Dual Alignment Interconnect Scheme App 20130328208 - Holmes; Steven J. ; et al.	2013-12-12
Bulk fin-field effect transistors with well defined isolation Grant 8,604,539 - Cheng , et al. December 10, 2	2013-12-10
Borderless Contacts For Metal Gates Through Selective Cap Deposition App 20130320414 - Fan; Su-Chen ; et al.	2013-12-05
Dual-metal Self-aligned Wires And Vias App 20130320546 - Holmes; Steven J. ; et al.	2013-12-05
Hybrid Copper Interconnect Structure And Method Of Fabricating Same App 20130320545 - Yang; Chih-Chao ; et al.	2013-12-05
Cut-very-last Dual-epi Flow App 20130319613 - Basker; Veeraraghavan S. ; et al.	2013-12-05
Borderless Contacts For Metal Gates Through Selective Cap Deposition App 20130320411 - Fan; Su-Chen ; et al.	2013-12-05
Spacer For Enhancing Via Pattern Overlay Tolerence App 20130313717 - Holmes; Steven J. ; et al.	2013-11-28
STRUCTURE AND METHOD TO MODULATE THRESHOLD VOLTAGE FOR HIGH-K METAL GATE FIELD EFFECT TRANSISTORS (FETs) App 20130316503 - Doris; Bruce B. ; et al.	2013-11-28
Structure and Method to Modulate Threshold Voltage For High-K Metal Gate Field Effect Transistors (FETs) App 20130313643 - Doris; Bruce B. ; et al.	2013-11-28
FinFET diode with increased junction area Grant 8,592,263 - Standaert , et al. November 26, 2	2013-11-26
Cut-very-last dual-EPI flow Grant 8,592,290 - Basker , et al. November 26, 2	2013-11-26
Mos Capacitors With A Finfet Process App 20130309832 - CHENG; KANGGUO ; et al.	2013-11-21
Mos Capacitors With A Finfet Process App 20130307043 - CHENG; KANGGUO ; et al.	2013-11-21
Mask Free Protection Of Work Function Material Portions In Wide Replacement Gate Electrodes App 20130309857 - Koburger, III; Charles W. ; et al.	2013-11-21
Mask Free Protection Of Work Function Material Portions In Wide Replacement Gate Electrodes App 20130307086 - Koburger, III; Charles W. ; et al.	2013-11-21
MOS capacitors with a finfet process Grant 8,581,320 - Cheng , et al. November 12, 2	2013-11-12
Finfet Diode With Increased Junction Area App 20130285208 - Standaert; Theodorus Eduardus ; et al.	2013-10-31
Dual-metal self-aligned wires and vias Grant 8,569,168 - Holmes , et al. October 29, 2	2013-10-29
Cut-very-last dual-epi flow Grant 8,569,152 - Basker , et al. October 29, 2	2013-10-29
FinFET with improved gate planarity Grant 8,569,125 - Standaert , et al. October 29, 2	2013-10-29
Integrated circuit line with electromigration barriers Grant 8,558,284 - Horak , et al. October 15, 2	2013-10-15
Metal Alloy Cap Integration App 20130252419 - Yang; Chih-Chao ; et al.	2013-09-26
Hybrid copper interconnect structure and method of fabricating same Grant 8,525,339 - Yang , et al. September 3, 2	2013-09-03
Method of fabricating semiconductor capacitor Grant 8,518,773 - Horak , et al. August 27, 2	2013-08-27
Semiconductor Chips Including Passivation Layer Trench Structure App 20130207263 - Kulkarni; Deepak ; et al.	2013-08-15
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20130210206 - CHENG; Kangguo ; et al.	2013-08-15
Dual-metal Self-aligned Wires And Vias App 20130207270 - Holmes; Steven J. ; et al.	2013-08-15
Structure For Nano-scale Metallization And Method For Fabricating Same App 20130193579 - Ponoth; Shom ; et al.	2013-08-01
Metal alloy cap integration Grant 8,492,274 - Yang , et al. July 23, 2	2013-07-23
Structure for nano-scale metallization and method for fabricating same Grant 8,492,270 - Ponoth , et al. July 23, 2	2013-07-23
Pad bonding employing a self-aligned plated liner for adhesion enhancement Grant 8,492,265 - Yang , et al. July 23, 2	2013-07-23
Borderless Contact Structure App 20130181261 - BASKER; VEERARAGHAVAN S. ; et al.	2013-07-18
Finfet Device App 20130175618 - Cheng; Kangguo ; et al.	2013-07-11
Electrical Isolation Structures For Ultra-thin Semiconductor-on-insulator Devices App 20130175622 - Haran; Balasubramanian S. ; et al.	2013-07-11
Borderless Contact Structure Employing Dual Etch Stop Layers App 20130168749 - Fan; Su C. ; et al.	2013-07-04
Electrical Fuse Structure And Method Of Fabricating Same App 20130168806 - Yang; Chih-Chao ; et al.	2013-07-04
Replacement Gate Mosfet With Raised Source And Drain App 20130161697 - Ponoth; Shom ; et al.	2013-06-27
Finfet With Improved Gate Planarity App 20130134513 - Standaert; Theodorus Eduardus ; et al.	2013-05-30
Formation Of Air Gap With Protection Of Metal Lines App 20130134590 - Nogami; Takeshi ; et al.	2013-05-30
Sealed Air Gap For Semiconductor Chip App 20130130489 - Horak; David V. ; et al.	2013-05-23
Metal Alloy Cap Integration App 20130112462 - Yang; Chih-Chao ; et al.	2013-05-09
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20130102119 - CHENG; Kangguo ; et al.	2013-04-25
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20130102130 - CHENG; Kangguo ; et al.	2013-04-25
Integrated Circuit Structure Having Selectively Formed Metal Cap App 20130069161 - Yang; Chih-Chao ; et al.	2013-03-21
Semiconductor Capacitor App 20130065376 - Horak; David Vaclav ; et al.	2013-03-14
Mosfet Including Asymmetric Source And Drain Regions App 20130049115 - CHENG; KANGGUO ; et al.	2013-02-28
Size-filtered Multimetal Structures App 20130043556 - Horak; David V. ; et al.	2013-02-21
Hybrid Copper Interconnect Structure and Method of Fabricating Same App 20130026635 - Yang; Chih-Chao ; et al.	2013-01-31
Microelectronic Structure Including Air Gap App 20130009282 - Edelstein; Daniel C. ; et al.	2013-01-10
Microelectronic Structure Including Air Gap App 20130012017 - Edelstein; Daniel C. ; et al.	2013-01-10
Method and Structure for Low Resistive Source and Drain Regions in a Replacement Metal Gate Process Flow App 20130001706 - Haran; Balasubramanian S. ; et al.	2013-01-03
Low-profile Local Interconnect And Method Of Making The Same App 20120326237 - Ponoth; Shom ; et al.	2012-12-27
Interconnect structures and methods for back end of the line integration App 20120329267 - Horak; David V. ; et al.	2012-12-27
Borderless Interconnect Line Structure Self-aligned To Upper And Lower Level Contact Vias App 20120329275 - Ponoth; Shom ; et al.	2012-12-27
Borderless Contact Structure Employing Dual Etch Stop Layers App 20120273848 - Fan; Su C. ; et al.	2012-11-01
Forming Borderless Contact For Transistors In A Replacement Metal Gate Process App 20120248508 - Ponoth; Shom ; et al.	2012-10-04