Nandakumar; Mahalingam

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nandakumar; Mahalingam.The latest application filed is for "two-rotation gate-edge diode leakage reduction for mos transistors".

Company Profile

10.69.76

Nandakumar; Mahalingam - Richardson TX
Nandakumar; Mahalingam - Plano TX
Nandakumar; Mahalingam - Raleigh NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Variable implant and wafer-level feed-forward for dopant dose optimization Grant 11,455,452 - Nandakumar , et al. September 27, 2	2022-09-27
Carbon, Nitrogen And/or Fluorine Co-implants For Low Resistance Transistors App 20220208973 - Nandakumar; Mahalingam ; et al.	2022-06-30
Two-rotation Gate-edge Diode Leakage Reduction For Mos Transistors App 20220209012 - Hornung; Brian Edward ; et al.	2022-06-30
Semiconductor Device With Diffusion Suppression And Ldd Implants And An Embedded Non-ldd Semiconductor Device App 20220189954 - Nandakumar; Mahalingam ; et al.	2022-06-16
Semiconductor Device With Low Noise Transistor And Low Temperature Coefficient Resistor App 20220139907 - Nandakumar; Mahalingam ; et al.	2022-05-05
Damage Implantation Of Cap Layer App 20220102553 - Nandakumar; Mahalingam ; et al.	2022-03-31
Gate Implant For Reduced Resistance Temperature Coefficient Variability App 20210408221 - NANDAKUMAR; Mahalingam	2021-12-30
Dopant anneal with stabilization step for IC with matched devices Grant 11,205,578 - Kirkpatrick , et al. December 21, 2	2021-12-21
Dielectric spaced diode Grant 11,152,350 - Nandakumar , et al. October 19, 2	2021-10-19
Dielectric spaced diode Grant 11,011,508 - Nandakumar , et al. May 18, 2	2021-05-18
Reducing Cross-wafer Variability For Minimum Width Resistors App 20210125872 - Nandakumar; Mahalingam	2021-04-29
Variable Implant And Wafer-level Feed-forward For Dopant Dose Optimization App 20210089694 - Nandakumar; Mahalingam ; et al.	2021-03-25
High Resistance Poly Resistor App 20200279905 - Nandakumar; Mahalingam	2020-09-03
Dielectric Spaced Diode App 20200194423 - Nandakumar; Mahalingam ; et al.	2020-06-18
Dielectric Spaced Diode App 20200194422 - Nandakumar; Mahalingam ; et al.	2020-06-18
Embedded memory with enhanced channel stop implants Grant 10,593,680 - Nandakumar	2020-03-17
Compensated well ESD diodes with reduced capacitance Grant 10,497,695 - Nandakumar , et al. De	2019-12-03
Fringe capacitance reduction for replacement gate CMOS Grant 10,439,041 - Niimi , et al. O	2019-10-08
Conductive spline for metal gates Grant 10,276,684 - Nandakumar , et al.	2019-04-30
Dopant Anneal With Stabilization Step For Ic With Matched Devices App 20190115226 - KIRKPATRICK; BRIAN K. ; et al.	2019-04-18
Dummy contacts to mitigate plasma charging damage to gate dielectrics Grant 10,249,621 - Visokay , et al.	2019-04-02
Partially recessed channel core transistors in replacement gate flow Grant 10,115,638 - Nandakumar October 30, 2	2018-10-30
Single mask level including a resistor and a through-gate implant Grant 10,026,730 - Nandakumar , et al. July 17, 2	2018-07-17
Dummy Contacts To Mitigate Plasma Charging Damage To Gate Dielectrics App 20180175023 - VISOKAY; MARK ROBERT ; et al.	2018-06-21
Hybrid high-k first and high-k last replacement gate process Grant 9,960,162 - Niimi , et al. May 1, 2	2018-05-01
Embedded Memory With Enhanced Channel Stop Implants App 20180090503 - Nandakumar; Mahalingam	2018-03-29
Transistor with deep Nwell implanted through the gate Grant 9,865,599 - Nandakumar January 9, 2	2018-01-09
Embedded memory with enhanced channel stop implants Grant 9,853,034 - Nandakumar December 26, 2	2017-12-26
Damage Implantation of a Cap Layer App 20170365715 - Nandakumar; Mahalingam ; et al.	2017-12-21
Fringe Capacitance Reduction For Replacement Gate Cmos App 20170358659 - Niimi; Hiroaki ; et al.	2017-12-14
Single Mask Level Including A Resistor And A Through-gate Implant App 20170338223 - NANDAKUMAR; MAHALINGAM ; et al.	2017-11-23
Embedded Memory With Enhanced Channel Stop Implants App 20170287917 - Nandakumar; Mahalingam	2017-10-05
Fringe capacitance reduction for replacement gate CMOS Grant 9,780,192 - Niimi , et al. October 3, 2	2017-10-03
Single mask level including a resistor and a through-gate implant Grant 9,761,581 - Nandakumar , et al. September 12, 2	2017-09-12
Single Mask Level Including A Resistor And A Through-gate Implant App 20170256535 - NANDAKUMAR; Mahalingam ; et al.	2017-09-07
Compensated Well Esd Diodes With Reduced Capacitance App 20170133361 - Nandakumar; Mahalingam ; et al.	2017-05-11
Conductive Spline For Metal Gates App 20170092731 - NANDAKUMAR; Mahalingam ; et al.	2017-03-30
Compensated well ESD diodes with reduced capacitance Grant 9,589,959 - Nandakumar , et al. March 7, 2	2017-03-07
Schottky diodes for replacement metal gate integrated circuits Grant 9,564,427 - Nandakumar February 7, 2	2017-02-07
Conductive spline for metal gates Grant 9,548,384 - Nandakumar , et al. January 17, 2	2017-01-17
Hybrid High-k First And High-k Last Replacement Gate Process App 20160300836 - Niimi; Hiroaki ; et al.	2016-10-13
Partially Recessed Channel Core Transistors In Replacement Gate Flow App 20160284596 - NANDAKUMAR; Mahalingam	2016-09-29
Combining ZTCR resistor with laser anneal for high performance PMOS transistor Grant 9,455,252 - Nandakumar September 27, 2	2016-09-27
Fringe Capacitance Reduction For Replacement Gate Cmos App 20160233312 - Niimi; Hiroaki ; et al.	2016-08-11
Hybrid high-k first and high-k last replacement gate process Grant 9,397,100 - Niimi , et al. July 19, 2	2016-07-19
Schottky Diodes For Replacement Metal Gate Integrated Circuits App 20160133622 - Nandakumar; Mahalingam	2016-05-12
Fringe capacitance reduction for replacement gate CMOS Grant 9,337,297 - Niimi , et al. May 10, 2	2016-05-10
Transistor assisted ESD diode Grant 9,281,304 - Nandakumar , et al. March 8, 2	2016-03-08
Schottky diodes for replacement metal gate integrated circuits Grant 9,275,988 - Nandakumar March 1, 2	2016-03-01
High quality dielectric for hi-k last replacement gate transistors Grant 9,269,636 - Nandakumar , et al. February 23, 2	2016-02-23
Combining Ztcr Resistor With Laser Anneal For High Performance Pmos Transistor App 20160035720 - NANDAKUMAR; Mahalingam	2016-02-04
Shunt Of P Gate To N Gate Boundary Resistance For Metal Gate Technologies App 20150340326 - LYTLE; Steve ; et al.	2015-11-26
Conductive Spline For Metal Gates App 20150340486 - NANDAKUMAR; Mahalingam ; et al.	2015-11-26
Combining ZTCR resistor with laser anneal for high performance PMOS transistor Grant 9,190,277 - Nandakumar November 17, 2	2015-11-17
Flatband shift for improved transistor performance Grant 9,147,764 - Nandakumar September 29, 2	2015-09-29
Schottky Diodes For Replacement Metal Gate Integrated Circuits App 20150187758 - NANDAKUMAR; Mahalingam	2015-07-02
Fringe Capacitance Reduction For Replacement Gate Cmos App 20150187903 - Niimi; Hiroaki ; et al.	2015-07-02
High Quality Dielectric For Hi-k Last Replacement Gate Transistors App 20150187659 - Nandakumar; Mahalingam ; et al.	2015-07-02
Hybrid High-k First And High-k Last Replacement Gate Process App 20150187771 - Niimi; Hiroaki ; et al.	2015-07-02
Transistor With Deep Nwell Implanted Through The Gate App 20150145058 - Nandakumar; Mahalingam	2015-05-28
Indium, carbon and halogen doping for PMOS transistors Grant 9,024,384 - Nandakumar , et al. May 5, 2	2015-05-05
Transistor with deep Nwell implanted through the gate Grant 8,981,490 - Nandakumar March 17, 2	2015-03-17
Flatband shift for improved transistor performance Grant 8,962,406 - Nandakumar February 24, 2	2015-02-24
Compensated well ESD diodes with reduced capacitance Grant 8,941,181 - Nandakumar , et al. January 27, 2	2015-01-27
Partially Recessed Channel Core Transistors In Replacement Gate Flow App 20150008538 - NANDAKUMAR; Mahalingam	2015-01-08
Compensated Well Esd Diodes With Reduced Capacitance App 20150008523 - Nandakumar; Mahalingam ; et al.	2015-01-08
Flatband Shift For Improved Transistor Performance App 20150008518 - NANDAKUMAR; Mahalingam	2015-01-08
Flatband Shift For Improved Transistor Performance App 20150011067 - NANDAKUMAR; Mahalingam	2015-01-08
ZTCR poly resistor in replacement gate flow Grant 8,927,385 - Nandakumar , et al. January 6, 2	2015-01-06
Flatband shift for improved transistor performance Grant 8,878,310 - Nandakumar November 4, 2	2014-11-04
Dual NSD implants for reduced RSD in an NMOS transistor Grant 8,865,557 - Nandakumar October 21, 2	2014-10-21
Damage implantation of a cap layer Grant 8,859,377 - Nandakumar , et al. October 14, 2	2014-10-14
Carbon and nitrogen doping for selected PMOS transistors on an integrated circuit Grant 8,853,042 - Nandakumar , et al. October 7, 2	2014-10-07
Transistor With Deep Nwell Implanted Through The Gate App 20140264623 - NANDAKUMAR; MAHALINGAM	2014-09-18
Dual NSD implants for reduced Rsd in an NMOS transistor Grant 8,835,270 - Nandakumar September 16, 2	2014-09-16
Ztcr Poly Resistor In Replacement Gate Flow App 20140167182 - Nandakumar; Mahalingam ; et al.	2014-06-19
Pocket counterdoping for gate-edge diode leakage reduction Grant 8,753,944 - Nandakumar , et al. June 17, 2	2014-06-17
Carbon And Nitrogen Doping For Selected Pmos Transistors On An Integrated Circuit App 20140120675 - NANDAKUMAR; Mahalingam ; et al.	2014-05-01
Carbon and nitrogen doping for selected PMOS transistor on an integrated circuit Grant 8,659,112 - Nandakumar , et al. February 25, 2	2014-02-25
Pocket Counterdoping For Gate-edge Diode Leakage Reduction App 20140021545 - NANDAKUMAR; MAHALINGAM ; et al.	2014-01-23
Indium, Carbon And Halogen Doping For Pmos Transistors App 20140017869 - NANDAKUMAR; Mahalingam ; et al.	2014-01-16
Indium, carbon and halogen doping for PMOS transistors Grant 8,558,310 - Nandakumar , et al. October 15, 2	2013-10-15
Flatband Shift For Improved Transistor Performance App 20130187227 - Nandakumar; Mahalingam	2013-07-25
Compensated Well ESD Diodes With Reduced Capacitance App 20130146979 - Nandakumar; Mahalingam ; et al.	2013-06-13
Dual Nsd Implants For Reduced Rsd In An Nmos Transistor App 20130149829 - Nandakumar; Mahalingam	2013-06-13
Combining Ztcr Resistor With Laser Anneal For High Performance Pmos Transistor App 20130149849 - NANDAKUMAR; Mahalingam	2013-06-13
Method of forming sidewall spacers to reduce formation of recesses in the substrate and increase dopant retention in a semiconductor device Grant 8,138,045 - Nandakumar , et al. March 20, 2	2012-03-20
CMOS fabrication process Grant 8,125,035 - Nandakumar , et al. February 28, 2	2012-02-28
Stress memorization dielectric optimized for NMOS and PMOS Grant 8,101,476 - Garg , et al. January 24, 2	2012-01-24
Transistor with reduced short channel effects and method Grant 7,968,415 - Nandakumar June 28, 2	2011-06-28
Carbon And Nitrogen Doping For Selected Pmos Transistors On An Integrated Circuit App 20110147850 - Nandakumar; Mahalingam ; et al.	2011-06-23
Indium, Carbon And Halogen Doping For Pmos Transistors App 20110147854 - Nandakumar; Mahalingam ; et al.	2011-06-23
Semiconductor Device Having a Strain Inducing Sidewall Spacer and a Method of Manufacture Therefor App 20100270622 - NANDAKUMAR; Mahalingam ; et al.	2010-10-28
Damage Implantation of a Cap Layer App 20100252887 - Nandakumar; Mahalingam ; et al.	2010-10-07
Stress Memorization Dielectric Optimized For Nmos And Pmos App 20100210081 - GARG; Kanan ; et al.	2010-08-19
Implant damage of layer for easy removal and reduced silicon recess Grant 7,772,094 - Nandakumar , et al. August 10, 2	2010-08-10
CMOS Fabrication Process App 20100133624 - Nandakumar; Mahalingam ; et al.	2010-06-03
CMOS fabrication process Grant 7,678,637 - Nandakumar , et al. March 16, 2	2010-03-16
Sidewall spacer pullback scheme Grant 7,638,402 - Nandakumar , et al. December 29, 2	2009-12-29
Method Of Forming Sidewall Spacers To Reduce Formation Of Recesses In The Substrate And Increase Dopant Retention In A Semiconductor Device App 20090286375 - Nandakumar; Mahalingam ; et al.	2009-11-19
Implantation of carbon and/or fluorine in NMOS fabrication Grant 7,557,022 - Nandakumar , et al. July 7, 2	2009-07-07
Implant Damage Of Layer For Easy Removal And Reduced Silicon Recess App 20090170277 - Nandakumar; Mahalingam ; et al.	2009-07-02
Strain Engineering In Semiconductor Components App 20090166675 - Nandakumar; Mahalingam	2009-07-02
CMOS Fabrication Process App 20090079008 - Nandakumar; Mahalingam ; et al.	2009-03-26
Damage Implantation of a Cap Layer App 20090004805 - Nandakumar; Mahalingam ; et al.	2009-01-01
P-doped Region With Improved Abruptness App 20080308904 - Chidambaram; P. R. ; et al.	2008-12-18
Method of incorporating stress into a transistor channel by use of a backside layer Grant 7,402,535 - Nandakumar , et al. July 22, 2	2008-07-22
Sidewall spacer pullback scheme App 20080160708 - Nandakumar; Mahalingam ; et al.	2008-07-03
Formation of nitrogen containing dielectric layers having a uniform nitrogen distribution therein using a high temperature chemical treatment Grant 7,393,787 - Niimi , et al. July 1, 2	2008-07-01
Implantation of carbon and/or fluorine in NMOS fabrication App 20070287274 - Nandakumar; Mahalingam ; et al.	2007-12-13
Semiconductor Device Having A Strain Inducing Sidewall Spacer And A Method Of Manufacture Therefor App 20070196991 - Nandakumar; Mahalingam ; et al.	2007-08-23
Method to strain NMOS devices while mitigating dopant diffusion for PMOS using a capped poly layer Grant 7,211,481 - Mehrotra , et al. May 1, 2	2007-05-01
Formation of nitrogen containing dielectric layers having a uniform nitrogen distribution therein using a high temperature chemical treatment App 20070042559 - Niimi; Hiroaki ; et al.	2007-02-22
A MOS Transistor with a Three-Step Source/Drain Implant App 20060246645 - Nandakumar; Mahalingam ; et al.	2006-11-02
Method to strain NMOS devices while mitigating dopant diffusion for PMOS using a capped poly layer App 20060189048 - Mehrotra; Manoj ; et al.	2006-08-24
Method for forming halo/pocket implants through an L-shaped sidewall spacer App 20060121681 - Nandakumar; Mahalingam	2006-06-08
Method of incorporating stress into a transistor channel by use of a backside layer App 20060024873 - Nandakumar; Mahalingam ; et al.	2006-02-02
Dual-counterdoped channel field effect transistor and method Grant 6,960,499 - Nandakumar , et al. November 1, 2	2005-11-01
Transistor with reduced short channel effects and method App 20050170576 - Nandakumar, Mahalingam	2005-08-04
MOS transistor with a three-step source/drain implant App 20050156236 - Nandakumar, Mahalingam ; et al.	2005-07-21
Method for introducing hydrogen into a channel region of a metal oxide semiconductor (MOS) device App 20050118770 - Nandakumar, Mahalingam ; et al.	2005-06-02
Transistor with reduced short channel effects and method Grant 6,882,013 - Nandakumar April 19, 2	2005-04-19
Additional n-type LDD/pocket implant for improving short-channel NMOS ESD robustness Grant 6,822,297 - Nandakumar , et al. November 23, 2	2004-11-23
Dual-counterdoped channel field effect transistor and method App 20040224457 - Nandakumar, Mahalingam ; et al.	2004-11-11
Fabricating dual voltage CMOSFETs using additional implant into core at high voltage mask Grant 6,713,334 - Nandakumar , et al. March 30, 2	2004-03-30
Reduction in well implant channeling and resulting latchup characteristics in shallow trench isolation by implanting wells through nitride Grant 6,617,217 - Nandakumar , et al. September 9, 2	2003-09-09
Transistor with reduced short channel effects and method App 20030141550 - Nandakumar, Mahalingam	2003-07-31
Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing Grant 6,579,770 - Rodder , et al. June 17, 2	2003-06-17
Fabricating dual voltage CMOSFETs using additional implant into core at high voltage mask App 20030040148 - Nandakumar, Mahalingam ; et al.	2003-02-27
Additional n-type LDD/pocket implant for improving short-channel NMOS ESD robustness App 20020185682 - Nandakumar, Mahalingam ; et al.	2002-12-12
Use of a thin nitride spacer in a split gate embedded analog process Grant 6,479,339 - Nandakumar , et al. November 12, 2	2002-11-12
Reduction in well implant channeling and resulting latchup characteristics in shallow trench ilolation by implanting wells through nitride App 20020042184 - Nandakumar, Mahalingam ; et al.	2002-04-11
Use of a thin nitride spacer in a split gate embedded analog process App 20020042166 - Nandakumar, Mahalingam ; et al.	2002-04-11
Integrated circuit isolation Grant 6,326,281 - Violette , et al. December 4, 2	2001-12-04
Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing App 20010036713 - Rodder, Mark S. ; et al.	2001-11-01
Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing Grant 6,306,712 - Rodder , et al. October 23, 2	2001-10-23
Method of making multiple threshold voltage integrated of circuit transistors Grant 6,287,920 - Chatterjee , et al. September 11, 2	2001-09-11
Method of pocket implant modeling for a CMOS process Grant 6,274,449 - Vasanth , et al. August 14, 2	2001-08-14
Mixed voltage CMOS process for high reliability and high performance core and I/O transistors with reduced mask steps Grant 6,258,644 - Rodder , et al. July 10, 2	2001-07-10
Semiconductor devices with pocket implant and counter doping Grant 6,228,725 - Nandakumar , et al. May 8, 2	2001-05-08
Transistor having ultrashallow source and drain junctions with reduced gate overlap and method Grant 5,976,937 - Rodder , et al. November 2, 1	1999-11-02
Integrated multicelled semiconductor switching device for high current applications Grant 5,296,725 - Nandakumar , et al. March 22, 1	1994-03-22

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