Nahas; Joseph J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nahas; Joseph J..The latest application filed is for "devices for utilizing symfets for low-power information processing".

Company Profile

0.32.24

Nahas; Joseph J. - Austin TX
Nahas; Joseph J - Austin TX
Nahas; Joseph J. - Wyomissing Hills PA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Devices For Utilizing Symfets For Low-power Information Processing App 20160182055 - Sedighi; Behnam ; et al.	2016-06-23
Devices for utilizing symFETs for low-power information processing Grant 9,362,919 - Sedighi , et al. June 7, 2	2016-06-07
Random access memory architecture including midpoint reference Grant 8,184,476 - Nahas , et al. May 22, 2	2012-05-22
Random access memory architecture including midpoint reference App 20100165710 - NAHAS; Joseph J. ; et al.	2010-07-01
Toggle memory burst Grant 7,543,211 - Nahas , et al. June 2, 2	2009-06-02
MRAM having error correction code circuitry and method therefor Grant 7,370,260 - Nahas May 6, 2	2008-05-06
Mram With A Write Driver And A Method Therefor App 20070291531 - Nahas; Joseph J.	2007-12-20
Sense amplifier with multiple bits sharing a common reference Grant 7,292,484 - Andre , et al. November 6, 2	2007-11-06
Mram Array With Reference Cell Row And Methof Of Operation App 20070247939 - Nahas; Joseph J. ; et al.	2007-10-25
MRAM with a write driver and method therefor Grant 7,280,388 - Nahas October 9, 2	2007-10-09
Magnetoresistive random access memory simulation Grant 7,266,486 - Nahas September 4, 2	2007-09-04
MRAM with a write driver and method therefor App 20070133262 - Nahas; Joseph J.	2007-06-14
MRAM memory with residual write field reset Grant 7,206,223 - Nahas , et al. April 17, 2	2007-04-17
MRAM architecture with electrically isolated read and write circuitry Grant 7,154,772 - Nahas , et al. December 26, 2	2006-12-26
Toggle memory burst App 20060174172 - Nahas; Joseph J. ; et al.	2006-08-03
Method and apparatus for simulating a magnetoresistive random access memory (MRAM) Grant 7,082,389 - Nahas July 25, 2	2006-07-25
Circuit and method for current pulse compensation Grant 7,012,841 - Nahas March 14, 2	2006-03-14
Circuit And Method For Current Pulse Compensation App 20060044882 - Nahas; Joseph J.	2006-03-02
Magnetoresistive random access memory simulation App 20050216244 - Nahas, Joseph J.	2005-09-29
Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics Grant 6,944,052 - Subramanian , et al. September 13, 2	2005-09-13
MRAM architecture with electrically isolated read and write circuitry App 20050152183 - Nahas, Joseph J. ; et al.	2005-07-14
MRAM having error correction code circuitry and method therefor App 20050144551 - Nahas, Joseph J.	2005-06-30
MRAM and methods for reading the MRAM Grant 6,909,631 - Durlam , et al. June 21, 2	2005-06-21
MRAM architecture with electrically isolated read and write circuitry Grant 6,903,964 - Nahas , et al. June 7, 2	2005-06-07
Accelerated life test of MRAM cells Grant 6,894,937 - Garni , et al. May 17, 2	2005-05-17
MRAM architecture Grant 6,888,743 - Durlam , et al. May 3, 2	2005-05-03
Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics App 20050083760 - Subramanian, Chitra K. ; et al.	2005-04-21
Accelerated Life Test Of Mram Cells App 20050068815 - Garni, Bradley J. ; et al.	2005-03-31
Circuit For Write Field Disturbance Cancellation In An Mram And Method Of Operation App 20050052901 - Nahas, Joseph J. ; et al.	2005-03-10
Circuit for write field disturbance cancellation in an MRAM and method of operation Grant 6,859,388 - Nahas , et al. February 22, 2	2005-02-22
Write driver for a magnetoresistive memory Grant 6,842,365 - Nahas , et al. January 11, 2	2005-01-11
Sense amplifier and method for performing a read operation in a MRAM Grant 6,760,266 - Garni , et al. July 6, 2	2004-07-06
MRAM architecture App 20040125646 - Durlam, Mark A. ; et al.	2004-07-01
MRAM and methods for reading the MRAM App 20040125649 - Durlam, Mark A. ; et al.	2004-07-01
Circuit and method for reading a toggle memory cell Grant 6,744,663 - Garni , et al. June 1, 2	2004-06-01
Method and apparatus for simulating a magnetoresistive random access memory (MRAM) App 20040102943 - Nahas, Joseph J.	2004-05-27
Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics App 20040100817 - Subramanian, Chitra K. ; et al.	2004-05-27
Memory architecture with write circuitry and method therefor Grant 6,714,440 - Subramanian , et al. March 30, 2	2004-03-30
MRAM architecture with a grounded write bit line and electrically isolated read bit line Grant 6,714,442 - Nahas March 30, 2	2004-03-30
Memory having a precharge circuit and method therefor Grant 6,711,052 - Subramanian , et al. March 23, 2	2004-03-23
Balanced load memory and method of operation Grant 6,711,068 - Subramanian , et al. March 23, 2	2004-03-23
Sense amplifier bias circuit for a memory having at least two distinct resistance states Grant 6,700,814 - Nahas , et al. March 2, 2	2004-03-02
Circuit and method of writing a toggle memory Grant 6,693,824 - Nahas , et al. February 17, 2	2004-02-17
Circuit and method for reading a toggle memory cell App 20040008536 - Garni, Bradley J. ; et al.	2004-01-15
Balanced Load Memory And Method Of Operation App 20040001361 - Subramanian, Chitra K. ; et al.	2004-01-01
Circuit And Method Of Writing A Toggle Memory App 20040001352 - Nahas, Joseph J. ; et al.	2004-01-01
MRAM architecture with electrically isolated read and write circuitry App 20040001358 - Nahas, Joseph J. ; et al.	2004-01-01
Sense amplifier and method for performing a read operation in a MRAM App 20040001383 - Garni, Bradley J. ; et al.	2004-01-01
Memory having a precharge circuit and method therefor App 20040001351 - Subramanian, Chitra K. ; et al.	2004-01-01
Memory architecture with write circuitry and method therefor App 20040001360 - Subramanian, Chitra K. ; et al.	2004-01-01
Magnetic memory and method of bi-directional write current programming Grant 6,667,899 - Subramanian , et al. December 23, 2	2003-12-23
Memory having write current ramp rate control Grant 6,657,889 - Subramanian , et al. December 2, 2	2003-12-02
Sense amplifier incorporating a symmetric midpoint reference Grant 6,621,729 - Garni , et al. September 16, 2	2003-09-16
Sense amplifier for a memory having at least two distinct resistance states Grant 6,600,690 - Nahas , et al. July 29, 2	2003-07-29
Method and circuitry for identifying weak bits in an MRAM Grant 6,538,940 - Nahas , et al. March 25, 2	2003-03-25
Fraud prevention in an electronic coin telephone set Grant 4,625,078 - Crouch , et al. November 25, 1	1986-11-25