Mignot; Yann

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mignot; Yann.The latest application filed is for "same level mram stacks having different configurations".

Company Profile

87.75.85

Mignot; Yann - Slingerlands NY
Mignot; Yann - Singerlands NY
Mignot; Yann - Albany NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Same Level Mram Stacks Having Different Configurations App 20220302207 - Mignot; Yann ; et al.	2022-09-22
Nonmetallic Liner Around A Magnetic Tunnel Junction App 20220285606 - Li; Tao ; et al.	2022-09-08
Wrap-around contacts including localized metal silicide Grant 11,424,367 - Miller , et al. August 23, 2	2022-08-23
Sacrificial Fin For Contact Self-alignment App 20220262923 - Mignot; Yann ; et al.	2022-08-18
Polymerization Protective Liner For Reactive Ion Etch In Patterning App 20220238349 - Nagabhirava; Bhaskar ; et al.	2022-07-28
Method of forming a BEOL interconnect structure using a subtractive metal via first process Grant 11,398,409 - Mignot , et al. July 26, 2	2022-07-26
Bilayer hardmask for direct print lithography Grant 11,398,377 - Joseph , et al. July 26, 2	2022-07-26
Wrap-around Contacts Including Localized Metal Silicide App 20220190161 - Miller; Eric ; et al.	2022-06-16
Non Volatile Resistive Memory Logic Device App 20220172776 - Chen; Hsueh-Chung ; et al.	2022-06-02
Bi metal subtractive etch for trench and via formation Grant 11,328,954 - Mignot , et al. May 10, 2	2022-05-10
Sacrificial fin for contact self-alignment Grant 11,316,029 - Mignot , et al. April 26, 2	2022-04-26
Cut integration for subtractive first metal line with bottom up second metal line Grant 11,302,571 - Ghosh , et al. April 12, 2	2022-04-12
Method Of Forming A Beol Interconnect Structure Using A Subtractive Metal Via First Process App 20220093459 - Mignot; Yann ; et al.	2022-03-24
Co-integration of tensile silicon and compressive silicon germanium Grant 11,264,286 - Loubet , et al. March 1, 2	2022-03-01
Litho-etch-litho-etch with self-aligned blocks Grant 11,239,077 - Liu , et al. February 1, 2	2022-02-01
Spacer-defined Process For Lithography-etch Double Patterning For Interconnects App 20220013405 - Felix; Nelson ; et al.	2022-01-13
Metal Via Structure App 20220005762 - Mignot; Yann ; et al.	2022-01-06
Method to create multilayer microfluidic chips using spin-on carbon as gap filling materials Grant 11,192,101 - Liu , et al. December 7, 2	2021-12-07
Back-end-of-line compatible processing for forming an array of pillars Grant 11,195,995 - Liu , et al. December 7, 2	2021-12-07
Multiple patterning scheme integration with planarized cut patterning Grant 11,171,001 - Chen , et al. November 9, 2	2021-11-09
Spacer-defined process for lithography-etch double patterning for interconnects Grant 11,164,772 - Felix , et al. November 2, 2	2021-11-02
Barrier-free vertical interconnect structure Grant 11,164,778 - Wang , et al. November 2, 2	2021-11-02
Sacrificial Fin For Contact Self-alignment App 20210328041 - Mignot; Yann ; et al.	2021-10-21
Metal via structure Grant 11,152,298 - Mignot , et al. October 19, 2	2021-10-19
Multi-metal Interconnects For Semiconductor Device Structures App 20210305160 - CHEN; Hsueh-Chung ; et al.	2021-09-30
Extreme ultraviolet (EUV) mask stack processing Grant 11,131,919 - Xu , et al. September 28, 2	2021-09-28
Embedded Metal Contamination Removal from BEOL Wafers App 20210296118 - Sil; Devika ; et al.	2021-09-23
Bi Metal Subtractive Etch For Trench And Via Formation App 20210287940 - Mignot; Yann ; et al.	2021-09-16
Double metal double patterning with vias extending into dielectric Grant 11,107,727 - Mignot , et al. August 31, 2	2021-08-31
Tall trenches for via chamferless and self forming barrier Grant 11,101,175 - Mignot , et al. August 24, 2	2021-08-24
Method to create multilayer microfluidic chips using spin-on carbon as gap fill and spin-on glass tone inversion Grant 11,084,032 - Liu , et al. August 10, 2	2021-08-10
Large via buffer Grant 11,075,161 - Mignot , et al. July 27, 2	2021-07-27
Double metal patterning Grant 11,069,564 - Chen , et al. July 20, 2	2021-07-20
Bilayer Hardmask For Direct Print Lithography App 20210217624 - Joseph; Praveen ; et al.	2021-07-15
Metal contact isolation for semiconductor structures Grant 11,063,126 - Fan , et al. July 13, 2	2021-07-13
Back-end-of-line Compatible Processing For Forming An Array Of Pillars App 20210210679 - Liu; Chi-Chun ; et al.	2021-07-08
Metallization interconnect structure formation Grant 11,056,426 - Mignot , et al. July 6, 2	2021-07-06
Svia using a single damascene interconnect Grant 11,037,822 - Mignot , et al. June 15, 2	2021-06-15
EUV pattern transfer with ion implantation and reduced impact of resist residue Grant 11,031,246 - Mignot , et al. June 8, 2	2021-06-08
Barrier-free Vertical Interconnect Structure App 20210159117 - Wang; Junli ; et al.	2021-05-27
Semiconductor Device With Linerless Contacts App 20210151351 - Joseph Varghese; Alex ; et al.	2021-05-20
Litho-etch-litho-etch With Self-aligned Blocks App 20210143013 - Liu; Chi-Chun ; et al.	2021-05-13
Fin cut profile using fin base liner Grant 10,985,025 - Miller , et al. April 20, 2	2021-04-20
Cut Integration For Subtractive First Metal Line With Bottom Up Second Metal Line App 20210111066 - Ghosh; Somnath ; et al.	2021-04-15
Techniques for vertical FET gate length control Grant 10,978,576 - Liu , et al. April 13, 2	2021-04-13
Stack viabar structures Grant 10,971,356 - Fan , et al. April 6, 2	2021-04-06
Extreme ultraviolet lithography patterning with directional deposition Grant 10,957,552 - Xu , et al. March 23, 2	2021-03-23
Skip-via Proximity Interconnect App 20210082747 - Mignot; Yann ; et al.	2021-03-18
Multiple patterning scheme integration with planarized cut patterning Grant 10,937,653 - Chen , et al. March 2, 2	2021-03-02
Gate cut critical dimension shrink and active gate defect healing using selective deposition Grant 10,923,401 - Greene , et al. February 16, 2	2021-02-16
Semiconductor device with linerless contacts Grant 10,903,111 - Joseph Varghese , et al. January 26, 2	2021-01-26
Controlling via critical dimension with a titanium nitride hard mask Grant 10,886,197 - Mignot , et al. January 5, 2	2021-01-05
Extreme ultraviolet lithography for high volume manufacture of a semiconductor device Grant 10,879,068 - Xu , et al. December 29, 2	2020-12-29
Large Via Buffer App 20200395293 - MIGNOT; YANN ; et al.	2020-12-17
Metal Via Structure App 20200388567 - Mignot; Yann ; et al.	2020-12-10
Metallization Interconnect Structure Formation App 20200381354 - Mignot; Yann ; et al.	2020-12-03
Double Metal Double Patterning With Vias Extending Into Dielectric App 20200357686 - Mignot; Yann ; et al.	2020-11-12
Svia Using A Single Damascene Interconnect App 20200357692 - Mignot; Yann ; et al.	2020-11-12
Methods and structures for forming uniform fins when using hardmask patterns Grant 10,832,955 - Xu , et al. November 10, 2	2020-11-10
Single trench damascene interconnect using TiN HMO Grant 10,825,720 - Mignot , et al. November 3, 2	2020-11-03
Metal spacer self aligned multi-patterning integration Grant 10,825,726 - Chen , et al. November 3, 2	2020-11-03
Metal spacer self aligned double patterning with airgap integration Grant 10,811,310 - Chen , et al. October 20, 2	2020-10-20
Double Metal Patterning App 20200328111 - CHEN; HSUEH-CHUNG ; et al.	2020-10-15
Semiconductor Device With Linerless Contacts App 20200303246 - Joseph Varghese; Alex ; et al.	2020-09-24
Metal Contact Isolation For Semiconductor Structures App 20200279925 - Fan; Su Chen ; et al.	2020-09-03
Crossbar reinforced semiconductor fins having reduced wiggling Grant 10,755,963 - Cheng , et al. A	2020-08-25
Fabricating electrically nonconductive blocks using a polymer brush and a sequential infiltration synthesis process Grant 10,755,928 - Liu , et al. A	2020-08-25
Embedded etch rate reference layer for enhanced etch time precision Grant 10,748,823 - Mignot , et al. A	2020-08-18
Controlling fin hardmask cut profile using a sacrificial epitaxial structure Grant 10,741,452 - Miller , et al. A	2020-08-11
Euv Pattern Transfer With Ion Implantation And Reduced Impact Of Resist Residue App 20200251338 - Kind Code	2020-08-06
Fabricating Electrically Nonconductive Blocks Using A Polymer Brush And A Sequential Infiltration Synthesis Process App 20200243335 - Liu; Chi-Chun ; et al.	2020-07-30
Direct Extreme Ultraviolet Lithography On Hard Mask With Reverse Tone App 20200234957 - MIGNOT; Yann ; et al.	2020-07-23
Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integration Grant 10,714,389 - Chen , et al.	2020-07-14
Stack Viabar Structures App 20200203156 - FAN; Su Chen ; et al.	2020-06-25
Formation of VTFET fin and vertical fin profile Grant 10,692,776 - Miller , et al.	2020-06-23
Controlling Via Critical Dimension With A Titanium Nitride Hard Mask App 20200194343 - Mignot; Yann ; et al.	2020-06-18
Self-aligned Litho-etch Double Patterning App 20200185269 - Chen; Hsueh-Chung ; et al.	2020-06-11
Multi-buried ULK field in BEOL structure Grant 10,679,892 - Mignot , et al.	2020-06-09
Method of forming a straight via profile with precise critical dimension control Grant 10,672,705 - Xu , et al.	2020-06-02
Tall Trenches For Via Chamferless And Self Forming Barrier App 20200161180 - MIGNOT; Yann ; et al.	2020-05-21
EUV pattern transfer with ion implantation and reduced impact of resist residue Grant 10,658,180 - Mignot , et al.	2020-05-19
Extreme ultraviolet lithography patterning with directional deposition Grant 10,658,190 - Xu , et al.	2020-05-19
Euv Pattern Transfer With Ion Implantation And Reduced Impact Of Resist Residue App 20200144061 - Mignot; Yann ; et al.	2020-05-07
Formation Of Vtfet Fin And Vertical Fin Profile App 20200144131 - Miller; Eric R. ; et al.	2020-05-07
Fin Cut Profile Using Fin Base Liner App 20200135484 - Miller; Eric R. ; et al.	2020-04-30
Spacer-defined Process For Lithography-etch Double Patterning For Interconnects App 20200135542 - Felix; Nelson ; et al.	2020-04-30
Controlling Fin Hardmask Cut Profile Using A Sacrificial Epitaxial Structure App 20200135570 - Miller; Eric R. ; et al.	2020-04-30
Gate Cut Critical Dimension Shrink And Active Gate Defect Healing Using Selective Deposition App 20200135575 - Greene; Andrew ; et al.	2020-04-30
Crossbar Reinforced Semiconductor Fins Having Reduced Wiggling App 20200135539 - Cheng; Kangguo ; et al.	2020-04-30
Metal Spacer Self Aligned Double Patterning With Airgap Integration App 20200135537 - Chen; Hsueh-Chung ; et al.	2020-04-30
Stack Viabar Structures App 20200135457 - FAN; Su Chen ; et al.	2020-04-30
Spacer image transfer with double mandrel Grant 10,629,436 - Mignot , et al.	2020-04-21
Metal Spacer Self Aligned Multi-patterning Integration App 20200118872 - CHEN; HSUEH-CHUNG ; et al.	2020-04-16
Method of forming a straight via profile with precise critical dimension control Grant 10,622,301 - Xu , et al.	2020-04-14
Stack viabar structures Grant 10,615,027 - Fan , et al.	2020-04-07
Embedded Etch Rate Reference Layer For Enhanced Etch Time Precision App 20200105628 - Mignot; Yann ; et al.	2020-04-02
Controlling via critical dimension during fabrication of a semiconductor wafer Grant 10,607,922 - Mignot , et al.	2020-03-31
Extreme Ultraviolet Lithography Patterning With Directional Deposition App 20200098581 - Xu; Yongan ; et al.	2020-03-26
Extreme Ultraviolet Lithography Patterning With Directional Deposition App 20200098578 - Xu; Yongan ; et al.	2020-03-26
Method To Create Multilayer Microfluidic Chips Using Spin-on Carbon As Gap Fill And Spin-on Glass Tone Inversion App 20200070151 - Liu; Chi-Chun ; et al.	2020-03-05
Method To Create Multilayer Microfluidic Chips Using Spin-on Carbon As Gap Filling Materials App 20200070150 - Liu; Chi-Chun ; et al.	2020-03-05
Multiple Patterning Scheme Integration With Planarized Cut Patterning App 20200066526 - Chen; Hsueh-Chung ; et al.	2020-02-27
Multiple Patterning Scheme Integration With Planarized Cut Patterning App 20200066525 - Chen; Hsueh-Chung ; et al.	2020-02-27
Single Trench Damascene Interconnect Using TiN HMO App 20200066575 - Mignot; Yann ; et al.	2020-02-27
Alternating Hard Mask For Tight-pitch Fin Formation App 20200066520 - ARNOLD; JOHN C. ; et al.	2020-02-27
Method Of Forming A Straight Via Profile With Precise Critical Dimension Control App 20200066632 - Xu; Yongan ; et al.	2020-02-27
Multiple patterning scheme integration with planarized cut patterning Grant 10,573,520 - Chen , et al. Feb	2020-02-25
Method Of Forming A Straight Via Profile With Precise Critical Dimension Control App 20200058585 - Xu; Yongan ; et al.	2020-02-20
Techniques for Vertical FET Gate Length Control App 20200044055 - Liu; Chi-Chun ; et al.	2020-02-06
Advanced interconnect with air gap Grant 10,546,743 - Zhang , et al. Ja	2020-01-28
Methods and structures for forming uniform fins when using hardmask patterns Grant 10,535,567 - Xu , et al. Ja	2020-01-14
Extreme Ultraviolet (euv) Mask Stack Processing App 20190391481 - Xu; Yongan ; et al.	2019-12-26
Multiple Patterning Scheme Integration With Planarized Cut Patterning App 20190378718 - Chen; Hsueh-Chung ; et al.	2019-12-12
Inverse Tone Direct Print Euv Lithography Enabled By Selective Material Deposition App 20190355625 - JOSEPH; Praveen ; et al.	2019-11-21
Extreme Ultraviolet Lithography For High Volume Manufacture Of A Semiconductor Device App 20190348281 - Xu; Yongan ; et al.	2019-11-14
Techniques for vertical FET gate length control Grant 10,475,905 - Liu , et al. Nov	2019-11-12
Vertical transistors having improved gate length control using uniformly deposited spacers Grant 10,461,172 - Waskiewicz , et al. Oc	2019-10-29
Spacer Image Transfer With Double Mandrel App 20190318928 - Mignot; Yann ; et al.	2019-10-17
Co-integration Of Tensile Silicon And Compressive Silicon Germanium App 20190304845 - LOUBET; Nicolas ; et al.	2019-10-03
Methods And Structures For Forming Uniform Fins When Using Hardmask Patterns App 20190252262 - Xu; Peng ; et al.	2019-08-15
Methods And Structures For Forming Uniform Fins When Using Hardmask Patterns App 20190252263 - Xu; Peng ; et al.	2019-08-15
Techniques for Vertical FET Gate Length Control App 20190237562 - Liu; Chi-Chun ; et al.	2019-08-01
Methods and structures for forming uniform fins when using hardmask patterns Grant 10,361,125 - Xu , et al.	2019-07-23
Self-aligned double patterning formed fincut Grant 10,361,129 - Sieg , et al.	2019-07-23
Co-integration of tensile silicon and compressive silicon germanium Grant 10,354,927 - Loubet , et al. July 16, 2	2019-07-16
Structure And Method Using Metal Spacer For Insertion Of Variable Wide Line Implantation In Sadp/saqp Integration App 20190206719 - Chen; Hsueh-Chung ; et al.	2019-07-04
Vertical Transistors Having Improved Gate Length Control Using Uniformly Deposited Spacers App 20190198642 - Waskiewicz; Christopher J. ; et al.	2019-06-27
Methods And Structures For Forming Uniform Fins When Using Hardmask Patterns App 20190189519 - Xu; Peng ; et al.	2019-06-20
Inverse tone direct print EUV lithography enabled by selective material deposition Grant 10,304,744 - Joseph , et al.	2019-05-28
Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integration Grant 10,276,434 - Chen , et al.	2019-04-30
Co-integration Of Tensile Silicon And Compressive Silicon Germanium App 20180315666 - LOUBET; Nicolas ; et al.	2018-11-01
Co-integration of tensile silicon and compressive silicon germanium Grant 10,037,922 - Loubet , et al. July 31, 2	2018-07-31
Integration of super via structure in BEOL Grant 10,020,254 - Bao , et al. July 10, 2	2018-07-10
Integration of super via structure in BEOL Grant 10,020,255 - Bao , et al. July 10, 2	2018-07-10
Inverted damascene interconnect structures Grant 9,984,919 - Zhang , et al. May 29, 2	2018-05-29
Advanced Interconnect With Air Gap App 20180144926 - Zhang; John H. ; et al.	2018-05-24
Co-integration Of Tensile Silicon And Compressive Silicon Germanium App 20180144991 - Loubet; Nicolas ; et al.	2018-05-24
Co-integration of tensile silicon and compressive silicon germanium Grant 9,905,478 - Loubet , et al. February 27, 2	2018-02-27
Self aligned via in integrated circuit Grant 9,768,113 - Feurprier , et al. September 19, 2	2017-09-19
Co-integration Of Tensile Silicon And Compressive Silicon Germanium App 20170200653 - Loubet; Nicolas ; et al.	2017-07-13
Co-integration of tensile silicon and compressive silicon germanium Grant 9,679,899 - Loubet , et al. June 13, 2	2017-06-13
Co-integration Of Tensile Silicon And Compressive Silicon Germanium App 20170062426 - Loubet; Nicolas ; et al.	2017-03-02
Integrated circuits with self aligned contacts and methods of manufacturing the same Grant 9,576,852 - He , et al. February 21, 2	2017-02-21
Integrated Circuits With Self Aligned Contacts And Methods Of Manufacturing The Same App 20160379881 - He; Ming ; et al.	2016-12-29
Self Aligned Via In Integrated Circuit App 20160379929 - Feurprier; Yannick ; et al.	2016-12-29
SiARC REMOVAL WITH PLASMA ETCH AND FLUORINATED WET CHEMICAL SOLUTION COMBINATION App 20160372334 - Mignot; Yann ; et al.	2016-12-22
SiARC removal with plasma etch and fluorinated wet chemical solution combination Grant 9,508,560 - Mignot , et al. November 29, 2	2016-11-29
Method for residue-free block pattern transfer onto metal interconnects for air gap formation Grant 9,390,967 - Lee , et al. July 12, 2	2016-07-12
Self aligned via in integrated circuit Grant 9,385,078 - Feurprier , et al. July 5, 2	2016-07-05
Self aligned via in integrated circuit Grant 9,373,582 - Feurprier , et al. June 21, 2	2016-06-21
Method For Residue-free Block Pattern Transfer Onto Metal Interconnects For Air Gap Formation App 20160172231 - Lee; Joe ; et al.	2016-06-16
Interconnect Structure For An Integrated Circuit And Method Of Fabricating An Interconnect Structure App 20160155701 - Mignot; Yann ; et al.	2016-06-02
Method for top oxide rounding with protection of patterned features Grant 9,252,051 - Lee , et al. February 2, 2	2016-02-02
Trench interconnect having reduced fringe capacitance Grant 9,214,429 - Zhang , et al. December 15, 2	2015-12-15
Hardmask Faceting For Enhancing Metal Fill In Trenches App 20150221547 - Arnold; John C. ; et al.	2015-08-06
Advanced Interconnect With Air Gap App 20150162277 - Zhang; John H. ; et al.	2015-06-11
Trench Interconnect Having Reduced Fringe Capacitance App 20150162278 - Zhang; John H. ; et al.	2015-06-11
Sidewall Height Nonuniformity Reduction For Sidewall Image Transfer Processes App 20150155176 - MIGNOT; Yann ; et al.	2015-06-04
Integrated Circuit Via Structure And Method Of Fabrication App 20150076707 - Mignot; Yann ; et al.	2015-03-19
Multipatterning Via Shrink Method Using Ald Spacer App 20150001735 - Mignot; Yann ; et al.	2015-01-01

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