| Patent | Date |
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High performance CMOS transistors using PMD liner stress
Grant 8,809,141 - Bu , et al. August 19, 2 | 2014-08-19 |
Laminated stress overlayer using In-situ multiple plasma treatments for transistor improvement
Grant 8,114,784 - Bu , et al. February 14, 2 | 2012-02-14 |
PMD liner nitride films and fabrication methods for improved NMOS performance
Grant 8,084,787 - Bu , et al. December 27, 2 | 2011-12-27 |
Nitrogen based implants for defect reduction in strained silicon
Grant 8,084,312 - Chakravarthi , et al. December 27, 2 | 2011-12-27 |
Gate structure and method
Grant 8,021,990 - Rotondaro , et al. September 20, 2 | 2011-09-20 |
Laminated Stress Overlayer Using In-SITU Multiple Plasma Treatments for Transistor Improvement
App 20110027953 - Bu; Haowen ; et al. | 2011-02-03 |
Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps
Grant 7,847,401 - Chidambaram , et al. December 7, 2 | 2010-12-07 |
Nitrogen Based Implants for Defect Reduction in Strained Silicon
App 20100120215 - CHAKRAVARTHI; Srinivasan ; et al. | 2010-05-13 |
Thermal treatment of nitrided oxide to improve negative bias thermal instability
Grant 7,682,988 - Alshareef , et al. March 23, 2 | 2010-03-23 |
Nitrogen based implants for defect reduction in strained silicon
Grant 7,670,892 - Chakravarthi , et al. March 2, 2 | 2010-03-02 |
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance
Grant 7,601,575 - Bu , et al. October 13, 2 | 2009-10-13 |
Gate Structure And Method
App 20090227117 - Rotondaro; Antonio L.P. ; et al. | 2009-09-10 |
Methods, Systems and Structures for Forming Semiconductor Structures Incorporating High-Temperature Processing Steps
App 20090224296 - Chidambaram; PR ; et al. | 2009-09-10 |
Reliable high voltage gate dielectric layers using a dual nitridation process
Grant 7,560,792 - Khamankar , et al. July 14, 2 | 2009-07-14 |
Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps
Grant 7,553,718 - Chidambaram , et al. June 30, 2 | 2009-06-30 |
Laminated Stress Overlayer Using In-SITU Multiple Plasma Treatments for Transistor Improvement
App 20090152639 - Bu; Haowen ; et al. | 2009-06-18 |
Gate structure and method
Grant 7,535,066 - Rotondaro , et al. May 19, 2 | 2009-05-19 |
CMOS device having different amounts of nitrogen in the NMOS gate dielectric layers and PMOS gate dielectric layers
Grant 7,514,308 - Varghese , et al. April 7, 2 | 2009-04-07 |
Methodology for Reducing Post Burn-In Vmin Drift
App 20090045472 - Chakravarthi; Srinivasan ; et al. | 2009-02-19 |
PMD Liner Nitride Films and Fabrication Methods for Improved NMOS Performance
App 20080251850 - Bu; Haowen ; et al. | 2008-10-16 |
Post high voltage gate oxide pattern high-vacuum outgas surface treatment
Grant 7,402,524 - Kirkpatrick , et al. July 22, 2 | 2008-07-22 |
Gate Dielectric Having a Flat Nitrogen Profile and Method of Manufacture Therefor
App 20080116542 - Niimi; Hiroaki ; et al. | 2008-05-22 |
Rework Methodology That Preserves Gate Performance
App 20080076076 - Obeng; Yaw Samuel ; et al. | 2008-03-27 |
Gate dielectric having a flat nitrogen profile and method of manufacture therefor
Grant 7,345,001 - Niimi , et al. March 18, 2 | 2008-03-18 |
Dual-gate integrated circuit semiconductor device
Grant 7,339,240 - Kirkpatrick , et al. March 4, 2 | 2008-03-04 |
Semiconductor device fabricated using a carbon-containing film as a contact etch stop layer
App 20070210421 - Bu; Haowen ; et al. | 2007-09-13 |
CMOS Device Having Different Amounts of Nitrogen in the NMOS Gate Dielectric Layers and PMOS Gate Dielectric Layers
App 20070207572 - Varghese; Ajith ; et al. | 2007-09-06 |
High performance CMOS transistors using PMD liner stress
App 20070128806 - Bu; Haowen ; et al. | 2007-06-07 |
CMOS device having different amounts of nitrogen in the NMOS gate dielectric layers and PMOS gate dielectric layers
Grant 7,227,201 - Varghese , et al. June 5, 2 | 2007-06-05 |
PMD liner nitride films and fabrication methods for improved NMOS performance
Grant 7,226,834 - Bu , et al. June 5, 2 | 2007-06-05 |
Reliable high voltage gate dielectric layers using a dual nitridation process
App 20070117331 - Khamankar; Rajesh ; et al. | 2007-05-24 |
Transistor fabrication methods using dual sidewall spacers
Grant 7,217,626 - Bu , et al. May 15, 2 | 2007-05-15 |
Nitrogen based implants for defect reduction in strained silicon
App 20070105294 - Chakravarthi; Srinivasan ; et al. | 2007-05-10 |
High performance CMOS transistors using PMD liner stress
Grant 7,192,894 - Bu , et al. March 20, 2 | 2007-03-20 |
Reliable high voltage gate dielectric layers using a dual nitridation process
Grant 7,183,165 - Khamankar , et al. February 27, 2 | 2007-02-27 |
Integration scheme to improve NMOS with poly cap while mitigating PMOS degradation
Grant 7,129,127 - Chidambaram , et al. October 31, 2 | 2006-10-31 |
Post high voltage gate dielectric pattern plasma surface treatment
App 20060183337 - Kirkpatrick; Brian K. ; et al. | 2006-08-17 |
Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps
App 20060172502 - Chidambaram; PR ; et al. | 2006-08-03 |
CMOS transistors and methods of forming same
App 20060154411 - Bu; Haowen ; et al. | 2006-07-13 |
Post high voltage gate dielectric pattern plasma surface treatment
Grant 7,049,242 - Kirkpatrick , et al. May 23, 2 | 2006-05-23 |
Post high voltage gate oxide pattern high-vacuum outgas surface treatment
App 20060084229 - Kirkpatrick; Brian K. ; et al. | 2006-04-20 |
Integration scheme to improve NMOS with poly cap while mitigating PMOS degradation
App 20060068541 - Chidambaram; PR ; et al. | 2006-03-30 |
Post high voltage gate oxide pattern high-vacuum outgas surface treatment
Grant 7,018,925 - Kirkpatrick , et al. March 28, 2 | 2006-03-28 |
Transistor fabrication methods using reduced width sidewall spacers
Grant 7,012,028 - Bu , et al. March 14, 2 | 2006-03-14 |
Thermal treatment of nitrided oxide to improve negative bias thermal instability
App 20060046514 - Alshareef; Husam N. ; et al. | 2006-03-02 |
CMOS device having different amounts of nitrogen in the NMOS gate dielectric layers and PMOS gate dielectric layers
App 20060043369 - Varghese; Ajith ; et al. | 2006-03-02 |
Transistor fabrication methods using dual sidewall spacers
App 20060019456 - Bu; Haowen ; et al. | 2006-01-26 |
Transistor fabrication methods using reduced width sidewall spacers
App 20060019455 - Bu; Haowen ; et al. | 2006-01-26 |
Gate dielectric having a flat nitrogen profile and method of manufacture therefor
App 20050285211 - Niimi, Hiroaki ; et al. | 2005-12-29 |
High performance CMOS transistors using PMD linear stress
App 20050245012 - Bu, Haowen ; et al. | 2005-11-03 |
PMD liner nitride films and fabrication methods for improved NMOS performance
App 20050233514 - Bu, Haowen ; et al. | 2005-10-20 |
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance
Grant 6,930,007 - Bu , et al. August 16, 2 | 2005-08-16 |
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance
App 20050164431 - Bu, Haowen ; et al. | 2005-07-28 |
Method for improving a physical property defect value of a gate dielectric
App 20050156286 - Kirkpatrick, Brian K. ; et al. | 2005-07-21 |
Method for improving a physical property defect value of a gate dielectric
Grant 6,869,862 - Kirkpatrick , et al. March 22, 2 | 2005-03-22 |
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance
App 20050059228 - Bu, Haowen ; et al. | 2005-03-17 |
CMOS transistors and methods of forming same
App 20050059260 - Bu, Haowen ; et al. | 2005-03-17 |
Post high voltage gate oxide pattern high-vacuum outgas surface treatment
App 20040266113 - Kirkpatrick, Brian K. ; et al. | 2004-12-30 |
Nitridation process for independent control of device gate leakage and drive current
App 20040262701 - Alshareef, Husam N. ; et al. | 2004-12-30 |
Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures
Grant 6,780,719 - Niimi , et al. August 24, 2 | 2004-08-24 |
Post high voltage gate dielectric pattern plasma surface treatment
App 20040142570 - Kirkpatrick, Brian K. ; et al. | 2004-07-22 |
Reliable high voltage gate dielectric layers using a dual nitridation process
App 20040102010 - Khamankar, Rajesh ; et al. | 2004-05-27 |
Method for non-thermally nitrided gate formation for high voltage devices
Grant 6,730,566 - Niimi , et al. May 4, 2 | 2004-05-04 |
Reduction of seed layer roughness for use in forming SiGe gate electrode
App 20040067631 - Bu, Haowen ; et al. | 2004-04-08 |
Method For Non-thermally Nitrided Gate Formation For High Voltage Devices
App 20040067619 - Niimi, Hiroaki ; et al. | 2004-04-08 |
Method for improving a physical property defect value of a gate dielectric
App 20040029391 - Kirkpatrick, Brian K. ; et al. | 2004-02-12 |
Method of ammonia annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
Grant 6,632,747 - Niimi , et al. October 14, 2 | 2003-10-14 |
Gate structure and method
App 20030164525 - Rotondaro, Antonio L. P. ; et al. | 2003-09-04 |
Method for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates
Grant 6,610,614 - Niimi , et al. August 26, 2 | 2003-08-26 |
Semiconductor device having a dielectric layer with a uniform nitrogen profile
App 20030157773 - Hu, Jerry ; et al. | 2003-08-21 |
Integrated circuit capacitor and memory
Grant 6,600,183 - Visokay , et al. July 29, 2 | 2003-07-29 |
Oxynitride device and method using non-stoichiometric silicon oxide
App 20030109146 - Colombo, Luigi ; et al. | 2003-06-12 |
Semiconductor device having a dielectric layer with a uniform nitrogen profile
App 20030080389 - Hu, Jerry ; et al. | 2003-05-01 |
Method for forming integrated circuit capacitor and memory
Grant 6,555,431 - Xing , et al. April 29, 2 | 2003-04-29 |
Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
Grant 6,548,366 - Niimi , et al. April 15, 2 | 2003-04-15 |
Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates
Grant 6,503,846 - Niimi , et al. January 7, 2 | 2003-01-07 |
Temperature Spike For Uniform Nitridization Of Ultra-thin Silicon Dioxide Layers In Transistor Gates
App 20020197882 - Niimi, Hiroaki ; et al. | 2002-12-26 |
Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
App 20020197884 - Niimi, Hiroaki ; et al. | 2002-12-26 |
Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures
App 20020197886 - Niimi, Hiroaki ; et al. | 2002-12-26 |
Method for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates
App 20020197880 - Niimi, Hiroaki ; et al. | 2002-12-26 |
Method of ammonia annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
App 20020197883 - Niimi, Hiroaki ; et al. | 2002-12-26 |
Method for forming integrated circuit capacitor and memory
Grant 6,153,490 - Xing , et al. November 28, 2 | 2000-11-28 |
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