| Patent | Date |
|---|
Fin cut to prevent replacement gate collapse on STI
Grant 11,315,922 - Greene , et al. April 26, 2 | 2022-04-26 |
Additive core subtractive liner for metal cut etch processes
Grant 11,276,767 - Bao , et al. March 15, 2 | 2022-03-15 |
Forming A Sacrificial Liner For Dual Channel Devices
App 20220069118 - Bu; Huiming ; et al. | 2022-03-03 |
Self-aligned pattern formation for a semiconductor device
Grant 11,227,793 - Burns , et al. January 18, 2 | 2022-01-18 |
Forming a sacrificial liner for dual channel devices
Grant 11,189,729 - Bu , et al. November 30, 2 | 2021-11-30 |
Additive core subtractive liner for metal cut etch processes
Grant 11,152,489 - Bao , et al. October 19, 2 | 2021-10-19 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 11,145,658 - Chan , et al. October 12, 2 | 2021-10-12 |
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations
App 20210280422 - Burns; Sean D. ; et al. | 2021-09-09 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 11,107,821 - Chan , et al. August 31, 2 | 2021-08-31 |
Forming a sacrificial liner for dual channel devices
Grant 11,094,824 - Bu , et al. August 17, 2 | 2021-08-17 |
Self-aligned contacts for vertical field effect transistors
Grant 11,081,566 - Fan , et al. August 3, 2 | 2021-08-03 |
Additive core subtractive liner for metal cut etch processes
Grant 11,075,281 - Bao , et al. July 27, 2 | 2021-07-27 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 11,056,493 - Chan , et al. July 6, 2 | 2021-07-06 |
Self aligned pattern formation post spacer etchback in tight pitch configurations
Grant 11,018,007 - Burns , et al. May 25, 2 | 2021-05-25 |
Epitaxial oxide fin segments to prevent strained semiconductor fin end relaxation
Grant 10,957,694 - Balakrishnan , et al. March 23, 2 | 2021-03-23 |
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs
Grant 10,957,583 - Burns , et al. March 23, 2 | 2021-03-23 |
Conformal doping for punch through stopper in fin field effect transistor devices
Grant 10,937,867 - Bu , et al. March 2, 2 | 2021-03-02 |
Utilizing multilayer gate spacer to reduce erosion of semiconductor Fin during spacer patterning
Grant 10,790,393 - Greene , et al. September 29, 2 | 2020-09-29 |
Self-aligned Contacts For Vertical Field Effect Transistors
App 20200295156 - Fan; Su Chen ; et al. | 2020-09-17 |
Conformal doping for punch through stopper in fin field effect transistor devices
Grant 10,741,647 - Bu , et al. A | 2020-08-11 |
Bottom contact formation for vertical transistor devices
Grant 10,727,317 - Fan , et al. | 2020-07-28 |
Fin Cut to Prevent Replacement Gate Collapse on STI
App 20200219874 - Greene; Andrew M. ; et al. | 2020-07-09 |
High aspect ratio gates
Grant 10,707,083 - Cheng , et al. | 2020-07-07 |
Fin cut to prevent replacement gate collapse on STI
Grant 10,622,352 - Greene , et al. | 2020-04-14 |
Bottom Contact Formation For Vertical Transistor Devices
App 20200111895 - Fan; Su Chen ; et al. | 2020-04-09 |
Preventing strained fin relaxation
Grant 10,615,278 - Cheng , et al. | 2020-04-07 |
Self-aligned patterning methods which implement directed self-assembly
Grant 10,613,438 - Burns , et al. | 2020-04-07 |
Additive core subtractive liner for metal cut etch processes
Grant 10,600,884 - Bao , et al. | 2020-03-24 |
Self-aligned Pattern Formation For A Semiconductor Device
App 20200090985 - Burns; Sean D. ; et al. | 2020-03-19 |
Forming A Sacrificial Liner For Dual Channel Devices
App 20200091336 - Bu; Huiming ; et al. | 2020-03-19 |
Forming a sacrificial liner for dual channel devices
Grant 10,593,802 - Bu , et al. | 2020-03-17 |
Static random access memory (SRAM) density scaling by using middle of line (MOL) flow
Grant 10,593,679 - Basker , et al. | 2020-03-17 |
Additive Core Subtractive Liner For Metal Cut Etch Processes
App 20200083350 - Bao; Ruqiang ; et al. | 2020-03-12 |
Additive Core Subtractive Liner For Metal Cut Etch Processes
App 20200083349 - Bao; Ruqiang ; et al. | 2020-03-12 |
Forming A Sacrificial Liner For Dual Channel Devices
App 20200083364 - Bu; Huiming ; et al. | 2020-03-12 |
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations
App 20200075336 - Burns; Sean D. ; et al. | 2020-03-05 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20200051984 - Chan; Kevin K. ; et al. | 2020-02-13 |
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs
Grant 10,546,774 - Burns , et al. Ja | 2020-01-28 |
Semiconductor structures including an integrated FinFET with deep trench capacitor and methods of manufacture
Grant 10,535,662 - Chan , et al. Ja | 2020-01-14 |
Self aligned pattern formation post spacer etchback in tight pitch configurations
Grant 10,529,569 - Burns , et al. J | 2020-01-07 |
Self-aligned Quadruple Patterning (saqp) For Routing Layouts Including Multi-track Jogs
App 20190393082 - Burns; Sean D. ; et al. | 2019-12-26 |
Forming a sacrificial liner for dual channel devices
Grant 10,510,892 - Bu , et al. Dec | 2019-12-17 |
Modified fin cut after epitaxial growth
Grant 10,475,886 - Kanakasabapathy , et al. Nov | 2019-11-12 |
Conformal Doping For Punch Through Stopper In Fin Field Effect Transistor Devices
App 20190341457 - Bu; Huiming ; et al. | 2019-11-07 |
Conformal Doping For Punch Through Stopper In Fin Field Effect Transistor Devices
App 20190341458 - Bu; Huiming ; et al. | 2019-11-07 |
Conformal doping for punch through stopper in fin field effect transistor devices
Grant 10,453,922 - Bu , et al. Oc | 2019-10-22 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20190279987 - Chan; Kevin K. ; et al. | 2019-09-12 |
Self aligned conductive lines with relaxed overlay
Grant 10,395,985 - Burns , et al. A | 2019-08-27 |
Finfet With Reduced Parasitic Capacitance
App 20190259852 - Alptekin; Emre ; et al. | 2019-08-22 |
Hybridization fin reveal for uniform fin reveal depth across different fin pitches
Grant 10,366,928 - Bi , et al. July 30, 2 | 2019-07-30 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 10,361,207 - Chan , et al. | 2019-07-23 |
Self-aligned Patterning Methods Which Implement Directed Self-assembly
App 20190221428 - Burns; Sean D. ; et al. | 2019-07-18 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20190206871 - Chan; Kevin K. ; et al. | 2019-07-04 |
Replacement metal gate stack for diffusion prevention
Grant 10,332,971 - Ando , et al. | 2019-06-25 |
FinFET with reduced parasitic capacitance
Grant 10,326,000 - Alptekin , et al. | 2019-06-18 |
Epitaxial Oxide Fin Segments To Prevent Strained Semiconductor Fin End Relaxation
App 20190172827 - Balakrishnan; Karthik ; et al. | 2019-06-06 |
Utilizing Multilayer Gate Spacer To Reduce Erosion Of Semiconductor Fin During Spacer Patterning
App 20190172940 - Greene; Andrew M. ; et al. | 2019-06-06 |
Forming a sacrificial liner for dual channel devices
Grant 10,312,370 - Bu , et al. | 2019-06-04 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 10,269,806 - Chan , et al. | 2019-04-23 |
Epitaxial oxide fin segments to prevent strained semiconductor fin end relaxation
Grant 10,249,622 - Balakrishnan , et al. | 2019-04-02 |
Tunable TiOxNy hardmask for multilayer patterning
Grant 10,249,512 - Arceo De La Pena , et al. | 2019-04-02 |
Gate cut on a vertical field effect transistor with a defined-width inorganic mask
Grant 10,249,753 - Anderson , et al. | 2019-04-02 |
Utilizing multilayer gate spacer to reduce erosion of semiconductor fin during spacer patterning
Grant 10,243,079 - Greene , et al. | 2019-03-26 |
Registration mark formation during sidewall image transfer process
Grant 10,242,952 - Conklin , et al. | 2019-03-26 |
Fin cut during replacement gate formation
Grant 10,242,981 - Greene , et al. | 2019-03-26 |
Fin cut during replacement gate formation
Grant 10,224,326 - Greene , et al. | 2019-03-05 |
Stress retention in fins of fin field-effect transistors
Grant 10,211,321 - Kanakasabapathy , et al. Feb | 2019-02-19 |
Stress retention in fins of fin field-effect transistors
Grant 10,211,319 - Kanakasabapathy , et al. Feb | 2019-02-19 |
Utilizing Multilayer Gate Spacer To Reduce Erosion Of Semiconductor Fin During Spacer Patterning
App 20190006506 - Greene; Andrew M. ; et al. | 2019-01-03 |
FinFET with reduced parasitic capacitance
Grant 10,170,581 - Alptekin , et al. J | 2019-01-01 |
Bulk fin formation with vertical fin sidewall profile
Grant 10,170,471 - Cheng , et al. J | 2019-01-01 |
High Aspect Ratio Gates
App 20180374707 - Cheng; Kangguo ; et al. | 2018-12-27 |
Hybridization fin reveal for uniform fin reveal depth across different fin pitches
Grant 10,163,721 - Bi , et al. Dec | 2018-12-25 |
High aspect ratio gates
Grant 10,157,745 - Cheng , et al. Dec | 2018-12-18 |
High Aspect Ratio Gates
App 20180350605 - Cheng; Kangguo ; et al. | 2018-12-06 |
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations
App 20180350599 - Burns; Sean D. ; et al. | 2018-12-06 |
High aspect ratio gates
Grant 10,134,595 - Cheng , et al. November 20, 2 | 2018-11-20 |
Registration Mark Formation During Sidewall Image Transfer Process
App 20180331047 - Conklin; David J. ; et al. | 2018-11-15 |
Structure and process to tuck fin tips self-aligned to gates
Grant 10,121,852 - Doris , et al. November 6, 2 | 2018-11-06 |
Pitch scalable active area patterning structure and process for multi-channel fin FET technologies
Grant 10,121,785 - Kanakasabapathy , et al. November 6, 2 | 2018-11-06 |
Self aligned pattern formation post spacer etchback in tight pitch configurations
Grant 10,121,661 - Burns , et al. November 6, 2 | 2018-11-06 |
Structure and process to tuck fin tips self-aligned to gates
Grant 10,121,853 - Doris , et al. November 6, 2 | 2018-11-06 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20180286866 - Chan; Kevin K. ; et al. | 2018-10-04 |
Self aligned conductive lines with relaxed overlay
Grant 10,083,864 - Burns , et al. September 25, 2 | 2018-09-25 |
Additive Core Subtractive Liner For Metal Cut Etch Processes
App 20180269306 - Bao; Ruqiang ; et al. | 2018-09-20 |
Additive Core Subtractive Liner For Metal Cut Etch Processes
App 20180269305 - Bao; Ruqiang ; et al. | 2018-09-20 |
Material removal process for self-aligned contacts
Grant 10,079,148 - Kanakasabapathy , et al. September 18, 2 | 2018-09-18 |
Self-aligned Pattern Formation For A Semiconductor Device
App 20180247864 - Burns; Sean D. ; et al. | 2018-08-30 |
Self-aligned pattern formation for a semiconductor device
Grant 10,056,290 - Burns , et al. August 21, 2 | 2018-08-21 |
Self Aligned Conductive Lines With Relaxed Overlay
App 20180233408 - Burns; Sean D. ; et al. | 2018-08-16 |
Self-aligned Quadruple Patterning (saqp) For Routing Layouts Including Multi-track Jogs
App 20180233403 - Burns; Sean D. ; et al. | 2018-08-16 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 10,050,039 - Chan , et al. August 14, 2 | 2018-08-14 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20180225405 - Chan; Kevin K. ; et al. | 2018-08-09 |
Registration mark formation during sidewall image transfer process
Grant 10,043,760 - Conklin , et al. August 7, 2 | 2018-08-07 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 10,042,968 - Chan , et al. August 7, 2 | 2018-08-07 |
Fin Cut to Prevent Replacement Gate Collapse on STI
App 20180211955 - Greene; Andrew M. ; et al. | 2018-07-26 |
Strained finFET device fabrication
Grant 10,032,680 - Doris , et al. July 24, 2 | 2018-07-24 |
TUNABLE TiOxNy HARDMASK FOR MULTILAYER PATTERNING
App 20180197752 - ARCEO DE LA PENA; ABRAHAM ; et al. | 2018-07-12 |
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations
App 20180197738 - Burns; Sean D. ; et al. | 2018-07-12 |
Confined eptaxial growth for continued pitch scaling
Grant 9,997,419 - Kanakasabapathy , et al. June 12, 2 | 2018-06-12 |
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs
Grant 9,991,156 - Burns , et al. June 5, 2 | 2018-06-05 |
Finfet With Reduced Parasitic Capacitance
App 20180151686 - Alptekin; Emre ; et al. | 2018-05-31 |
Stable multiple threshold voltage devices on replacement metal gate CMOS devices
Grant 9,985,027 - Fan , et al. May 29, 2 | 2018-05-29 |
FinFET with reduced parasitic capacitance
Grant 9,985,109 - Alptekin , et al. May 29, 2 | 2018-05-29 |
Method of cutting fins to create diffusion breaks for finFETs
Grant 9,978,748 - Jagannathan , et al. May 22, 2 | 2018-05-22 |
Aligning conductive vias with trenches
Grant 9,972,533 - Burns , et al. May 15, 2 | 2018-05-15 |
Fin Cut During Replacement Gate Formation
App 20180122708 - Greene; Andrew M. ; et al. | 2018-05-03 |
Fin Cut During Replacement Gate Formation
App 20180122801 - Greene; Andrew M. ; et al. | 2018-05-03 |
Finfet With Reduced Parasitic Capacitance
App 20180114846 - Alptekin; Emre ; et al. | 2018-04-26 |
Finfet With Reduced Parasitic Capacitence
App 20180114847 - Alptekin; Emre ; et al. | 2018-04-26 |
Static Random Access Memory (sram) Density Scaling By Using Middle Of Line (mol) Flow
App 20180114792 - Basker; Veeraraghavan S. ; et al. | 2018-04-26 |
Stress Retention In Fins Of Fin Field-effect Transistors
App 20180108752 - Kanakasabapathy; Sivananda K. ; et al. | 2018-04-19 |
Tunable TiOxNy hardmask for multilayer patterning
Grant 9,941,142 - Arceo De La Pena , et al. April 10, 2 | 2018-04-10 |
Gate Cut On A Vertical Field Effect Transistor With A Defined-width Inorganic Mask
App 20180097107 - Anderson; Brent A. ; et al. | 2018-04-05 |
Epitaxial Oxide Fin Segments To Prevent Strained Semiconductor Fin End Relaxation
App 20180096997 - Balakrishnan; Karthik ; et al. | 2018-04-05 |
Hybridization fin reveal for uniform fin reveal depth across different fin pitches
Grant 9,935,015 - Bi , et al. April 3, 2 | 2018-04-03 |
Self aligned pattern formation post spacer etchback in tight pitch configurations
Grant 9,934,970 - Burns , et al. April 3, 2 | 2018-04-03 |
Forming A Sacrificial Liner For Dual Channel Devices
App 20180090599 - Bu; Huiming ; et al. | 2018-03-29 |
Forming A Sacrificial Liner For Dual Channel Devices
App 20180090606 - Bu; Huiming ; et al. | 2018-03-29 |
Hybridization Fin Reveal For Uniform Fin Reveal Depth Across Different Fin Pitches
App 20180090367 - Bi; Zhenxing ; et al. | 2018-03-29 |
Forming A Sacrificial Liner For Dual Channel Devices
App 20180090604 - Bu; Huiming ; et al. | 2018-03-29 |
Hybridization Fin Reveal For Uniform Fin Reveal Depth Across Different Fin Pitches
App 20180090384 - Bi; Zhenxing ; et al. | 2018-03-29 |
Hybridization Fin Reveal For Uniform Fin Reveal Depth Across Different Fin Pitches
App 20180090385 - Bi; Zhenxing ; et al. | 2018-03-29 |
Material removal process for self-aligned contacts
Grant 9,929,016 - Kanakasabapathy , et al. March 27, 2 | 2018-03-27 |
Replacement Metal Gate Stack For Diffusion Prevention
App 20180083117 - Ando; Takashi ; et al. | 2018-03-22 |
Strained FinFET device fabrication
Grant 9,917,019 - Doris , et al. March 13, 2 | 2018-03-13 |
Preventing Strained Fin Relaxation
App 20180069027 - Cheng; Kangguo ; et al. | 2018-03-08 |
Self aligned conductive lines
Grant 9,911,647 - Burns , et al. March 6, 2 | 2018-03-06 |
Structure And Process To Tuck Fin Tips Self-aligned To Gates
App 20180061941 - Doris; Bruce B. ; et al. | 2018-03-01 |
Structure And Process To Tuck Fin Tips Self-aligned To Gates
App 20180061942 - Doris; Bruce B. ; et al. | 2018-03-01 |
Registration Mark Formation During Sidewall Image Transfer Process
App 20180061773 - Conklin; David J. ; et al. | 2018-03-01 |
Replacement metal gate stack for diffusion prevention
Grant 9,905,665 - Ando , et al. February 27, 2 | 2018-02-27 |
Gate cut on a vertical field effect transistor with a defined-width inorganic mask
Grant 9,882,048 - Anderson , et al. January 30, 2 | 2018-01-30 |
Preventing strained fin relaxation
Grant 9,881,937 - Cheng , et al. January 30, 2 | 2018-01-30 |
Static random access memory (SRAM) density scaling by using middle of line (MOL) flow
Grant 9,881,926 - Basker , et al. January 30, 2 | 2018-01-30 |
Aligning Conductive Vias With Trenches
App 20180025943 - Burns; Sean D. ; et al. | 2018-01-25 |
Structure and process to tuck fin tips self-aligned to gates
Grant 9,876,074 - Doris , et al. January 23, 2 | 2018-01-23 |
Self Aligned Conductive Lines With Relaxed Overlay
App 20180005885 - Burns; Sean D. ; et al. | 2018-01-04 |
High Aspect Ratio Gates
App 20180005833 - Cheng; Kangguo ; et al. | 2018-01-04 |
High Aspect Ratio Gates
App 20180005834 - Cheng; Kangguo ; et al. | 2018-01-04 |
Gate Cut On A Vertical Field Effect Transistor With A Defined-width Inorganic Mask
App 20180006150 - Anderson; Brent A. ; et al. | 2018-01-04 |
Self-aligned Pattern Formation For A Semiconductor Device
App 20180005875 - Burns; Sean D. ; et al. | 2018-01-04 |
Registration mark formation during sidewall image transfer process
Grant 9,859,224 - Conklin , et al. January 2, 2 | 2018-01-02 |
Self aligned conductive lines
Grant 9,852,946 - Burns , et al. December 26, 2 | 2017-12-26 |
Material Removal Process For Self-aligned Contacts
App 20170358453 - Kanakasabapathy; Sivananda K. ; et al. | 2017-12-14 |
Self Aligned Conductive Lines
App 20170358487 - Burns; Sean D. ; et al. | 2017-12-14 |
Self Aligned Conductive Lines
App 20170358492 - Burns; Sean D. ; et al. | 2017-12-14 |
Self-aligned quadruple patterning process
Grant 9,842,737 - Colburn , et al. December 12, 2 | 2017-12-12 |
Self-aligned Quadruple Patterning (saqp) For Routing Layouts Including Multi-track Jogs
App 20170352585 - Burns; Sean D. ; et al. | 2017-12-07 |
Material Removal Process For Self-aligned Contacts
App 20170345659 - Kanakasabapathy; Sivananda K. ; et al. | 2017-11-30 |
Strained finFET device fabrication
Grant 9,805,992 - Doris , et al. October 31, 2 | 2017-10-31 |
Strained finFET device fabrication
Grant 9,805,991 - Doris , et al. October 31, 2 | 2017-10-31 |
Application of titanium-oxide as a patterning hardmask
Grant 9,799,534 - Arceo de la Pena , et al. October 24, 2 | 2017-10-24 |
Stress Retention In Fins Of Fin Field-effect Transistors
App 20170301770 - Kanakasabapathy; Sivananda K. ; et al. | 2017-10-19 |
Self aligned conductive lines
Grant 9,786,554 - Burns , et al. October 10, 2 | 2017-10-10 |
Method and structure for cut material selection
Grant 9,779,944 - Burns , et al. October 3, 2 | 2017-10-03 |
Aligning conductive vias with trenches
Grant 9,773,700 - Burns , et al. September 26, 2 | 2017-09-26 |
Forming a sacrificial liner for dual channel devices
Grant 9,773,893 - Bu , et al. September 26, 2 | 2017-09-26 |
Material removal process for self-aligned contacts
Grant 9,761,455 - Kanakasabapathy , et al. September 12, 2 | 2017-09-12 |
Hybridization fin reveal for uniform fin reveal depth across different fin pitches
Grant 9,754,798 - Bi , et al. September 5, 2 | 2017-09-05 |
Stress retention in fins of fin field-effect transistors
Grant 9,741,856 - Kanakasabapathy , et al. August 22, 2 | 2017-08-22 |
Fin cut during replacement gate formation
Grant 9,741,823 - Greene , et al. August 22, 2 | 2017-08-22 |
Stable multiple threshold voltage devices on replacement metal gate CMOS devices
Grant 9,728,462 - Fan , et al. August 8, 2 | 2017-08-08 |
Cutting fins and gates in CMOS devices
Grant 9,721,848 - Bu , et al. August 1, 2 | 2017-08-01 |
Pitch Scalable Active Area Patterning Structure & Process For Multi-channel Fin Fet Technologies
App 20170213825 - KANAKASABAPATHY; SIVANANDA K. ; et al. | 2017-07-27 |
Enabling large feature alignment marks with sidewall image transfer patterning
Grant 9,716,184 - Cheng , et al. July 25, 2 | 2017-07-25 |
Epitaxial oxide fin segments to prevent strained semiconductor fin end relaxation
Grant 9,704,860 - Balakrishnan , et al. July 11, 2 | 2017-07-11 |
Enabling Large Feature Alignment Marks With Sidewall Image Transfer Patterning
App 20170179305 - Cheng; Kangguo ; et al. | 2017-06-22 |
Confined Eptaxial Growth For Continued Pitch Scaling
App 20170178976 - Kanakasabapathy; Sivananda K. ; et al. | 2017-06-22 |
Method Of Cutting Fins To Create Diffusion Breaks For Finfets
App 20170170171 - Jagannathan; Hemanth ; et al. | 2017-06-15 |
Method Of Cutting Fins To Create Diffusion Breaks For Finfets
App 20170170176 - Jagannathan; Hemanth ; et al. | 2017-06-15 |
Material Removal Process For Self-aligned Contacts
App 20170170019 - Kanakasabapathy; Sivananda K. ; et al. | 2017-06-15 |
Stress Retention In Fins Of Fin Field-effect Transistors
App 20170162685 - Kanakasabapathy; Sivananda K. ; et al. | 2017-06-08 |
Gate cutting for a vertical transistor device
Grant 9,673,199 - Anderson , et al. June 6, 2 | 2017-06-06 |
Replacement metal gate including dielectric gate material
Grant 9,653,573 - Jang , et al. May 16, 2 | 2017-05-16 |
Conformal Doping For Punch Through Stopper In Fin Field Effect Transistor Devices
App 20170117365 - Bu; Huiming ; et al. | 2017-04-27 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20170117281 - Chan; Kevin K. ; et al. | 2017-04-27 |
Preventing Strained Fin Relaxation
App 20170117300 - Cheng; Kangguo ; et al. | 2017-04-27 |
System and method for source-drain extension in FinFETs
Grant 9,634,009 - Inada , et al. April 25, 2 | 2017-04-25 |
Structure and method for replacement gate integration with self-aligned contacts
Grant 9,627,510 - Jagannathan , et al. April 18, 2 | 2017-04-18 |
Self aligned conductive lines with relaxed overlay
Grant 9,607,886 - Burns , et al. March 28, 2 | 2017-03-28 |
Stable Multiple Threshold Voltage Devices On Replacement Metal Gate Cmos Devices
App 20170077098 - Fan; Su Chen ; et al. | 2017-03-16 |
Fin cut enabling single diffusion breaks
Grant 9,589,845 - Jagannathan , et al. March 7, 2 | 2017-03-07 |
Pitch scalable active area patterning structure and process for multi-channel finFET technologies
Grant 9,589,958 - Kanakasabapathy , et al. March 7, 2 | 2017-03-07 |
Conformal doping for punch through stopper in fin field effect transistor devices
Grant 9,583,563 - Bu , et al. February 28, 2 | 2017-02-28 |
Strained Finfet Device Fabrication
App 20170054024 - Doris; Bruce B. ; et al. | 2017-02-23 |
Strained Finfet Device Fabrication
App 20170053838 - Doris; Bruce B. ; et al. | 2017-02-23 |
Strained Finfet Device Fabrication
App 20170054002 - Doris; Bruce B. ; et al. | 2017-02-23 |
Strained Finfet Device Fabrication
App 20170053942 - Doris; Bruce B. ; et al. | 2017-02-23 |
Preventing strained fin relaxation by sealing fin ends
Grant 9,576,979 - Cheng , et al. February 21, 2 | 2017-02-21 |
Semiconductor structures including an integrated finFET with deep trench capacitor and methods of manufacture
Grant 9,576,096 - Chan , et al. February 21, 2 | 2017-02-21 |
Semiconductor structure containing semiconductor fins and insulating fence fins on a same substrate
Grant 9,564,438 - Kanakasabapathy February 7, 2 | 2017-02-07 |
Bulk Fin Formation With Vertical Fin Sidewall Profile
App 20170033103 - Cheng; Kangguo ; et al. | 2017-02-02 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20170025418 - Chan; Kevin K. ; et al. | 2017-01-26 |
Asymmetric multi-gate FinFET
Grant 9,548,379 - Basker , et al. January 17, 2 | 2017-01-17 |
Asymmetric multi-gate finFET
Grant 9,543,435 - Basker , et al. January 10, 2 | 2017-01-10 |
Enabling large feature alignment marks with sidewall image transfer patterning
Grant 9,536,744 - Cheng , et al. January 3, 2 | 2017-01-03 |
Stable multiple threshold voltage devices on replacement metal gate CMOS devices
Grant 9,536,791 - Fan , et al. January 3, 2 | 2017-01-03 |
Registration Mark Formation During Sidewall Image Transfer Process
App 20160358861 - Conklin; David J. ; et al. | 2016-12-08 |
Bulk fin formation with vertical fin sidewall profile
Grant 9,515,089 - Cheng , et al. December 6, 2 | 2016-12-06 |
FinFET device with channel strain
Grant 9,515,141 - Doris , et al. December 6, 2 | 2016-12-06 |
Preventing Strained Fin Relaxation
App 20160351590 - Cheng; Kangguo ; et al. | 2016-12-01 |
Structure And Process To Tuck Fin Tips Self-aligned To Gates
App 20160343861 - Doris; Bruce B. ; et al. | 2016-11-24 |
Strained finFET device fabrication
Grant 9,502,411 - Doris , et al. November 22, 2 | 2016-11-22 |
Bulk Fin Formation With Vertical Fin Sidewall Profile
App 20160336347 - Cheng; Kangguo ; et al. | 2016-11-17 |
Confined eptaxial growth for continued pitch scaling
Grant 9,472,447 - Kanakasabapathy , et al. October 18, 2 | 2016-10-18 |
Registration mark formation during sidewall image transfer process
Grant 9,472,506 - Conklin , et al. October 18, 2 | 2016-10-18 |
Directional chemical oxide etch technique
Grant 9,472,415 - Alptekin , et al. October 18, 2 | 2016-10-18 |
Stable Multiple Threshold Voltage Devices On Replacement Metal Gate Cmos Devices
App 20160293493 - Fan; Su Chen ; et al. | 2016-10-06 |
Stable Multiple Threshold Voltage Devices On Replacement Metal Gate Cmos Devices
App 20160293492 - Fan; Su Chen ; et al. | 2016-10-06 |
Registration Mark Formation During Sidewall Image Transfer Process
App 20160247766 - Conklin; David J. ; et al. | 2016-08-25 |
Replacement Metal Gate Stack For Diffusion Prevention
App 20160197157 - Ando; Takashi ; et al. | 2016-07-07 |
Modified Fin Cut After Epitaxial Growth
App 20160172379 - Kanakasabapathy; Sivananda K. ; et al. | 2016-06-16 |
Replacement Metal Gate Including Dielectric Gate Material
App 20160172467 - Jang; Linus ; et al. | 2016-06-16 |
Modified Fin Cut After Epitaxial Growth
App 20160172380 - Kanakasabapathy; Sivananda K. ; et al. | 2016-06-16 |
Self-aligned Quadruple Patterning Process
App 20160163600 - COLBURN; Matthew E. ; et al. | 2016-06-09 |
FinFET device with channel strain
Grant 9,331,148 - Doris , et al. May 3, 2 | 2016-05-03 |
Replacement metal gate stack for diffusion prevention
Grant 9,312,136 - Ando , et al. April 12, 2 | 2016-04-12 |
Self-aligned quadruple patterning process
Grant 9,305,845 - Colburn , et al. April 5, 2 | 2016-04-05 |
Method of forming semiconductor fins and insulating fence fins on a same substrate
Grant 9,299,705 - Kanakasabapathy March 29, 2 | 2016-03-29 |
Sidewall image transfer process for fin patterning
Grant 9,287,135 - Doris , et al. March 15, 2 | 2016-03-15 |
Self-aligned Quadruple Patterning Process
App 20160071771 - COLBURN; Matthew E. ; et al. | 2016-03-10 |
Fabrication Of Insulating Fence Fins
App 20150371990 - Kanakasabapathy; Sivananda K. | 2015-12-24 |
Replacement Metal Gate Including Dielectric Gate Material
App 20150357434 - Jang; Linus ; et al. | 2015-12-10 |
finFET isolation by selective cyclic etch
Grant 9,209,178 - Kanakasabapathy , et al. December 8, 2 | 2015-12-08 |
Directional Chemical Oxide Etch Technique
App 20150318184 - Alptekin; Emre ; et al. | 2015-11-05 |
Replacement Metal Gate Stack For Diffusion Prevention
App 20150255458 - Ando; Takashi ; et al. | 2015-09-10 |
Fabrication Of Insulating Fence Fins
App 20150236018 - Kanakasabapathy; Sivananda K. | 2015-08-20 |
Structure And Process To Decouple Deep Trench Capacitors And Well Isolation
App 20150214244 - Ho; Herbert L. ; et al. | 2015-07-30 |
Replacement Metal Gate Including Dielectric Gate Material
App 20150214331 - Jang; Linus ; et al. | 2015-07-30 |
Trench patterning with block first sidewall image transfer
Grant 9,064,813 - Kanakasabapathy , et al. June 23, 2 | 2015-06-23 |
finFET Isolation by Selective Cyclic Etch
App 20150145065 - Kanakasabapathy; Sivananda K. ; et al. | 2015-05-28 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20150135156 - Chan; Kevin K. ; et al. | 2015-05-14 |
Semiconductor structures with deep trench capacitor and methods of manufacture
Grant 8,987,800 - Chan , et al. March 24, 2 | 2015-03-24 |
Trench Patterning With Block First Sidewall Image Transfer
App 20150031201 - Kanakasabapathy; Sivananda K. ; et al. | 2015-01-29 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20150021610 - Chan; Kevin K. ; et al. | 2015-01-22 |
Borderless contact for an aluminum-containing gate
Grant 8,906,793 - Kanakasabapathy , et al. December 9, 2 | 2014-12-09 |
Semiconductor device including multiple metal semiconductor alloy region and a gate structure covered by a continuous encapsulating layer
Grant 8,901,670 - Kanakasabapathy , et al. December 2, 2 | 2014-12-02 |
Structure and method for stress latching in non-planar semiconductor devices
Grant 8,890,255 - Kanakasabapathy , et al. November 18, 2 | 2014-11-18 |
Trench Patterning With Block First Sidewall Image Transfer
App 20140315380 - Kanakasabapathy; Sivananda K. ; et al. | 2014-10-23 |
Method for forming a self-aligned hard mask for contact to a tunnel junction
Grant 8,847,338 - Assefa , et al. September 30, 2 | 2014-09-30 |
Semiconductor Structures With Deep Trench Capacitor And Methods Of Manufacture
App 20140264522 - Chan; Kevin K. ; et al. | 2014-09-18 |
Low external resistance ETSOI transistors
Grant 8,835,232 - Jagannathan , et al. September 16, 2 | 2014-09-16 |
Semiconductor plural gate lengths
Grant 8,802,565 - Hartig , et al. August 12, 2 | 2014-08-12 |
Semiconductor structure containing an aluminum-containing replacement gate electrode
Grant 8,779,515 - Kanakasabapathy , et al. July 15, 2 | 2014-07-15 |
Finfet Hybrid Full Metal Gate With Borderless Contacts
App 20140162447 - Edge; Lisa F. ; et al. | 2014-06-12 |
Borderless contacts in semiconductor devices
Grant 8,741,752 - Fan , et al. June 3, 2 | 2014-06-03 |
Method of simultaneously forming multiple structures having different critical dimensions using sidewall transfer
Grant 8,735,296 - Jung , et al. May 27, 2 | 2014-05-27 |
Semiconductor plural gate lengths
App 20140070414 - Hartig; Michael J. ; et al. | 2014-03-13 |
Borderless contacts in semiconductor devices
Grant 8,637,908 - Fan , et al. January 28, 2 | 2014-01-28 |
FinFET parasitic capacitance reduction using air gap
Grant 8,637,384 - Ando , et al. January 28, 2 | 2014-01-28 |
FinFET parasitic capacitance reduction using air gap
Grant 8,637,930 - Ando , et al. January 28, 2 | 2014-01-28 |
Image transfer process employing a hard mask layer
Grant 8,637,406 - Jung , et al. January 28, 2 | 2014-01-28 |
Image Transfer Process Employing A Hard Mask Layer
App 20140023834 - Jung; Ryan O. ; et al. | 2014-01-23 |
Method Of Simultaneously Forming Multiple Structures Having Different Critical Dimensions Using Sidewall Transfer
App 20140024209 - Jung; Ryan O. ; et al. | 2014-01-23 |
Image Transfer Process Employing A Hard Mask Layer
App 20140024219 - Jung; Ryan O. ; et al. | 2014-01-23 |
Low resistance source and drain extensions for ETSOI
Grant 8,614,486 - Haran , et al. December 24, 2 | 2013-12-24 |
Borderless Contact For An Aluminum-containing Gate
App 20130309852 - KANAKASABAPATHY; Sivananda K. ; et al. | 2013-11-21 |
Borderless Contact For An Aluminum-Containing Gate
App 20130307033 - KANAKASABAPATHY; Sivananda K. ; et al. | 2013-11-21 |
Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation
Grant 8,586,482 - Arnold , et al. November 19, 2 | 2013-11-19 |
Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation
Grant 8,580,692 - Arnold , et al. November 12, 2 | 2013-11-12 |
Forming a self-aligned hard mask for contact to a tunnel junction
Grant 8,563,225 - Assefa , et al. October 22, 2 | 2013-10-22 |
Self aligning via patterning
Grant 8,518,824 - Arnold , et al. August 27, 2 | 2013-08-27 |
Low External Resistance Etsoi Transistors
App 20130217190 - Jagannathan; Hemanth ; et al. | 2013-08-22 |
Low External Resistance Etsoi Transistors
App 20130214358 - Jagannathan; Hemanth ; et al. | 2013-08-22 |
Structure For Nano-scale Metallization And Method For Fabricating Same
App 20130193579 - Ponoth; Shom ; et al. | 2013-08-01 |
Structure And Method For Stress Latching In Non-planar Semiconductor Devices
App 20130187234 - Kanakasabapathy; Sivananda K. ; et al. | 2013-07-25 |
Structure for nano-scale metallization and method for fabricating same
Grant 8,492,270 - Ponoth , et al. July 23, 2 | 2013-07-23 |
Low resistance source and drain extensions for ETSOI
Grant 8,486,778 - Haran , et al. July 16, 2 | 2013-07-16 |
Methods For Forming Field Effect Transistor Devices With Protective Spacers
App 20130168775 - Basker; Veeraraghavan S. ; et al. | 2013-07-04 |
Sidewall image transfer using the lithographic stack as the mandrel
Grant 8,455,364 - Kanakasabapathy June 4, 2 | 2013-06-04 |
Finfet Parasitic Capacitance Reduction Using Air Gap
App 20130095629 - Ando; Takashi ; et al. | 2013-04-18 |
Finfet Parasitic Capacitance Reduction Using Air Gap
App 20130093019 - ANDO; Takashi ; et al. | 2013-04-18 |
Spacer as hard mask scheme for in-situ doping in CMOS finFETs
Grant 8,420,464 - Basker , et al. April 16, 2 | 2013-04-16 |
Method for Forming A Self-Aligned Hard Mask for Contact to a Tunnel Junction
App 20130069183 - Assefa; Solomon ; et al. | 2013-03-21 |
Structure and method for stress latching in non-planar semiconductor devices
Grant 8,394,684 - Kanakasabapathy , et al. March 12, 2 | 2013-03-12 |
Cut first methodology for double exposure double etch integration
Grant 8,377,795 - Kanakasabapathy , et al. February 19, 2 | 2013-02-19 |
Borderless Contacts in Semiconductor Devices
App 20130020615 - Fan; Su Chen ; et al. | 2013-01-24 |
Borderless Contacts in Semiconductor Devices
App 20130023115 - Fan; Su Chen ; et al. | 2013-01-24 |
Metal semiconductor alloy structure for low contact resistance
Grant 8,358,012 - Haran , et al. January 22, 2 | 2013-01-22 |
Low Resistance Source And Drain Extensions For Etsoi
App 20130015509 - Haran; Balasubramanian S. ; et al. | 2013-01-17 |
Low Resistance Source And Drain Extensions For Etsoi
App 20130015512 - Haran; Balasubramanian S. ; et al. | 2013-01-17 |
Film Stack Including Metal Hardmask Layer For Sidewall Image Transfer Fin Field Effect Transistor Formation
App 20130001750 - ARNOLD; JOHN C. ; et al. | 2013-01-03 |
Film Stack Including Metal Hardmask Layer For Sidewall Image Transfer Fin Field Effect Transistor Formation
App 20130001749 - ARNOLD; JOHN C. ; et al. | 2013-01-03 |
Semiconductor Device Including Multiple Metal Semiconductor Alloy Region And A Gate Structure Covered By A Continuous Encapsulating Layer
App 20120326217 - Kanakasabapathy; Sivananda K. ; et al. | 2012-12-27 |
Metal Semiconductor Alloy Structure For Low Contact Resistance
App 20120326241 - Haran; Balasubramanian S. ; et al. | 2012-12-27 |
Self Aligning Via Patterning
App 20120302057 - Arnold; John Christopher ; et al. | 2012-11-29 |
Spacer As Hard Mask Scheme For In-situ Doping In Cmos Finfets
App 20120280250 - Basker; Veeraraghavan S. ; et al. | 2012-11-08 |
Self aligning via patterning
Grant 8,298,943 - Arnold , et al. October 30, 2 | 2012-10-30 |
Semiconductor Device Including Multiple Metal Semiconductor Alloy Region And A Gate Structure Covered By A Continuous Encapsulating Layer
App 20120205727 - Kanakasabapathy; Sivananda K. ; et al. | 2012-08-16 |
Methods for Forming Field Effect Transistor Devices With Protective Spacers
App 20120181613 - Basker; Veeraraghavan S. ; et al. | 2012-07-19 |
Magnetic devices and techniques for formation thereof
Grant 8,164,128 - Kanakasabapathy , et al. April 24, 2 | 2012-04-24 |
Structure For Nano-scale Metallization And Method For Fabricating Same
App 20120068346 - PONOTH; SHOM ; et al. | 2012-03-22 |
Method of forming self-aligned local interconnect and structure formed thereby
Grant 8,124,525 - Koburger, III , et al. February 28, 2 | 2012-02-28 |
Differential Stoichiometries By Infusion Thru Gcib For Multiple Work Function Metal Gate Cmos
App 20120037999 - Jagannathan; Hemanth ; et al. | 2012-02-16 |
Metal Semiconductor Alloy Structure For Low Contact Resistance
App 20120032275 - Haran; Balasubramanian S. ; et al. | 2012-02-09 |
Structure And Method For Stress Latching In Non-planar Semiconductor Devices
App 20120018730 - Kanakasabapathy; Sivananda K. ; et al. | 2012-01-26 |
Methods for obtaining gate stacks with tunable threshold voltage and scaling
Grant 7,943,458 - Jagannathan , et al. May 17, 2 | 2011-05-17 |
Sidewall Image Transfer Using the Lithographic Stack as the Mandrel
App 20110111596 - Kanakasabapathy; Sivananda K. | 2011-05-12 |
Methods For Obtaining Gate Stacks With Tunable Threshold Voltage And Scaling
App 20110081754 - Jagannathan; Hemanth ; et al. | 2011-04-07 |
Method for integration of magnetic random access memories with improved lithographic alignment to magnetic tunnel junctions
Grant 7,825,000 - Kanakasabapathy , et al. November 2, 2 | 2010-11-02 |
Method of forming vertical contacts in integrated circuits
Grant 7,803,639 - Assefa , et al. September 28, 2 | 2010-09-28 |
Magnetically de-coupling magnetic memory cells and bit/word lines for reducing bit selection errors
Grant 7,782,660 - Assefa , et al. August 24, 2 | 2010-08-24 |
Cut First Methodology For Double Exposure Double Etch Integration
App 20100203717 - Kanakasabapathy; Sivananda K. ; et al. | 2010-08-12 |
Method and structure for improved alignment in MRAM integration
Grant 7,723,813 - Kanakasabapathy , et al. May 25, 2 | 2010-05-25 |
Methods for removing sidewall spacers
Grant 7,642,147 - Kanakasabapathy January 5, 2 | 2010-01-05 |
Method for Forming a Self-Aligned Hard Mask for Contact to a Tunnel Junction
App 20090291388 - Assefa; Solomon ; et al. | 2009-11-26 |
Magnetically De-Coupling Magnetic Tunnel Junctions and Bit/Word Lines for Reducing Bit Selection Errors in Spin-Momentum Transfer Switching
App 20090237982 - Assefa; Solomon ; et al. | 2009-09-24 |
Hard mask structure for patterning of materials
Grant 7,550,044 - Gaidis , et al. June 23, 2 | 2009-06-23 |
Method and structure for improved alignment in MRAM integration
Grant 7,507,633 - Kanakasabapathy , et al. March 24, 2 | 2009-03-24 |
Method and Structure for Improved Lithographic Alignment to Magnetic Tunnel Junctions in the Integration of Magnetic Random Access Memories
App 20090059656 - Kanakasabapathy; Sivananda K. ; et al. | 2009-03-05 |
Method And Structure For Improved Alignment In Mram Integration
App 20080220374 - Kanakasabapathy; Sivananda K. ; et al. | 2008-09-11 |
Hard Mask Structure for Patterning of Materials
App 20080185101 - Gaidis; Michael C. ; et al. | 2008-08-07 |
Magnetic devices and techniques for formation thereof
Grant 7,399,646 - Kanakasabapathy , et al. July 15, 2 | 2008-07-15 |
Method of Forming Vertical Contacts in Integrated Circuits
App 20080164617 - Assefa; Solomon ; et al. | 2008-07-10 |
Method And Structure For Improved Alignment In Mram Integration
App 20080157156 - Kanakasabapathy; Sivananda K. ; et al. | 2008-07-03 |
Method And Structure For Improved Alignment In Mram Integration
App 20080160644 - Kanakasabapathy; Sivananda K. ; et al. | 2008-07-03 |
Hard mask structure for patterning of materials
Grant 7,381,343 - Gaidis , et al. June 3, 2 | 2008-06-03 |
Methods of patterning a magnetic stack of a magnetic memory cell and structures thereof
Grant 7,374,952 - Kasko , et al. May 20, 2 | 2008-05-20 |
Magnetic Devices and Techniques For Formation Thereof
App 20080043379 - Kanakasabapathy; Sivananda K. ; et al. | 2008-02-21 |
Method and structure for improved alignment in MRAM integration
App 20070210394 - Kanakasabapathy; Sivananda K. ; et al. | 2007-09-13 |
Magnetic devices and techniques for formation thereof
App 20070048950 - Kanakasabapathy; Sivananda K. ; et al. | 2007-03-01 |
Hard mask structure for patterning of materials
App 20070020934 - Gaidis; Michael C. ; et al. | 2007-01-25 |
Magnetic tunnel junction cap structure and method for forming the same
Grant 7,112,861 - Kanakasabapathy , et al. September 26, 2 | 2006-09-26 |
Method for fabricating magnetic field concentrators as liners around conductive wires in microelectronic devices
Grant 7,033,881 - Gaidis , et al. April 25, 2 | 2006-04-25 |
Method For Fabricating Magnetic Field Concentrators As Liners Around Conductive Wires In Microelectronic Devices
App 20050274997 - Gaidis, Michael C. ; et al. | 2005-12-15 |
Magnetic Tunnel Junction Cap Structure And Method For Forming The Same
App 20050254180 - Kanakasabapathy, Sivananda K. ; et al. | 2005-11-17 |
Method for improved alignment of magnetic tunnel junction elements
Grant 6,933,204 - Sarma , et al. August 23, 2 | 2005-08-23 |
Method For Improved Alignment Of Magnetic Tunnel Junction Elements
App 20050079683 - Sarma, Chandrasekhar ; et al. | 2005-04-14 |
Ion-Ion plasma processing with bias modulation synchronized to time-modulated discharges
Grant 6,875,700 - Kanakasabapathy , et al. April 5, 2 | 2005-04-05 |
Ion-Ion plasma processing with bias modulation synchronized to time-modulated discharges
App 20020139658 - Kanakasabapathy, Sivananda K. ; et al. | 2002-10-03 |
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