loadpatents
name:-0.031863212585449
name:-0.069388866424561
name:-0.001039981842041
Jeon; Jun Young Patent Filings

Jeon; Jun Young

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jeon; Jun Young.The latest application filed is for "flash memory integrated circuit with compression/decompression codec".

Company Profile
0.18.4
  • Jeon; Jun Young - Seoul KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Flash memory integrated circuit with compression/decompression CODEC
Grant 9,236,129 - Jeon January 12, 2
2016-01-12
Flash Memory Integrated Circuit with Compression/Decompression CODEC
App 20100077133 - Jeon; Jun Young
2010-03-25
Semiconductor memory device and method of outputting data strobe signal thereof
Grant 7,173,871 - Kong , et al. February 6, 2
2007-02-06
Multi-chip memory devices and modules including independent control of memory chips
Grant 6,768,660 - Kong , et al. July 27, 2
2004-07-27
Semiconductor memory device and method of outputting data strobe signal thereof
App 20030179627 - Kong, Eun-Youp ;   et al.
2003-09-25
Multi-chip memory devices, modules and control methods including independent control of memory chips
App 20020088633 - Kong, Eun Youp ;   et al.
2002-07-11
Memory module having programmable logic device and sTSOP
App 20020024834 - Jeon, Jun-Young ;   et al.
2002-02-28
Integrated circuit packaging systems and methods that use the same packaging substrates for integrated circuits of different data path widths
Grant 6,274,931 - Jeon , et al. August 14, 2
2001-08-14
Semiconductor package
Grant D432,097 - Song , et al. October 17, 2
2000-10-17
Semiconductor module
Grant D432,096 - Jeon , et al. October 17, 2
2000-10-17
Integrated circuit memory devices including rows of pads extending parallel to the short sides of the integrated circuit
Grant 6,069,812 - Lee , et al. May 30, 2
2000-05-30
Integrated circuit memory device with hierarchical work line structure
Grant 6,026,047 - Ryu , et al. February 15, 2
2000-02-15
Integrated circuit memory devices including split word lines and predecoders and related methods
Grant 5,812,483 - Jeon , et al. September 22, 1
1998-09-22
Multiple power line arrangement for a semiconductor memory device
Grant 5,748,550 - Jeon , et al. May 5, 1
1998-05-05
Internal supply voltage generating circuit for semiconductor memory device
Grant 5,747,974 - Jeon May 5, 1
1998-05-05
Integrated circuit output driver systems including multiple power and ground lines
Grant 5,701,072 - Jeon , et al. December 23, 1
1997-12-23
Internal voltage generating circuit of a semiconductor device
Grant 5,479,093 - Jeon December 26, 1
1995-12-26
Method of making dynamic random access memory cell having a stacked capacitor and a trench capacitor
Grant 5,455,192 - Jeon October 3, 1
1995-10-03
Highly integrated semiconductor memory device with triple well structure
Grant 5,373,476 - Jeon December 13, 1
1994-12-13
Charge pump circuit for a substrate voltage generator of a semiconductor memory device
Grant 5,343,088 - Jeon August 30, 1
1994-08-30
Semiconductor memory device capable of executing non-periodic refreshing operations
Grant 5,278,797 - Jeon , et al. January 11, 1
1994-01-11
Company Registrations

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