Dalton; Timothy J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dalton; Timothy J..The latest application filed is for "methods and structures for protecting one area while processing another area on a chip".

Company Profile

2.130.125

Dalton; Timothy J. - Yorktown Heights NY US
Dalton; Timothy J. - Ridgefield CT
Dalton; Timothy J. - Ridgefiled CT
Dalton; Timothy J - Ridgefield CT
Dalton; Timothy J. - North Reading MA
Dalton; Timothy J. - N. Reading MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Photovoltaic module with a controllable infrared protection layer Grant 10,319,870 - Clevenger , et al.	2019-06-11
Methods and structures for protecting one area while processing another area on a chip Grant 9,472,402 - Kim , et al. October 18, 2	2016-10-18
Extended gate sensor for pH sensing Grant 9,201,041 - Dalton , et al. December 1, 2	2015-12-01
Corrugated interfaces for multilayered interconnects Grant 9,089,080 - Clevenger , et al. July 21, 2	2015-07-21
Forming semiconductor chip connections Grant 9,035,465 - Cheng , et al. May 19, 2	2015-05-19
Methods and Structures for Protecting One Area While Processing Another Area on a Chip App 20150004802 - Kim; Deok-kee ; et al.	2015-01-01
EXTENDED GATE SENSOR FOR pH SENSING App 20140367748 - Dalton; Timothy J. ; et al.	2014-12-18
EXTENDED GATE SENSOR FOR pH SENSING App 20140370636 - Dalton; Timothy J. ; et al.	2014-12-18
Forming Semiconductor Chip Connections App 20140332929 - Cheng; Kangguo ; et al.	2014-11-13
Corrugated interfaces for multilayered interconnects Grant 8,828,521 - Clevenger , et al. September 9, 2	2014-09-09
Forming semiconductor chip connections Grant 8,802,497 - Hsu , et al. August 12, 2	2014-08-12
Interconnect structures and design structures for a radiofrequency integrated circuit Grant 8,791,545 - Dalton , et al. July 29, 2	2014-07-29
Two-dimensional patterning employing self-assembled material Grant 8,754,400 - Dalton , et al. June 17, 2	2014-06-17
Corrugated Interfaces For Multilayered Interconnects App 20130273325 - Clevenger; Lawrence A. ; et al.	2013-10-17
Corrugated Interfaces For Multilayered Interconnects App 20130270224 - Clevenger; Lawrence A. ; et al.	2013-10-17
Electrical fuses and resistors having sublithographic dimensions Grant 8,513,769 - Black , et al. August 20, 2	2013-08-20
Corrugated interfaces for multilayered interconnects Grant 8,512,849 - Clevenger , et al. August 20, 2	2013-08-20
Methods of fabricating passive element without planarizing and related semiconductor device Grant 8,487,401 - Chinthakindi , et al. July 16, 2	2013-07-16
Pattern formation employing self-assembled material Grant 8,486,512 - Black , et al. July 16, 2	2013-07-16
Pattern formation employing self-assembled material Grant 8,486,511 - Black , et al. July 16, 2	2013-07-16
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 8,343,868 - Edelstein , et al. January 1, 2	2013-01-01
Structure and method for MOSFET gate electrode landing pad Grant 8,304,912 - Clevenger , et al. November 6, 2	2012-11-06
Interconnect structures, methods for fabricating interconnect structures, and design structures for a radiofrequency integrated circuit Grant 8,298,902 - Dalton , et al. October 30, 2	2012-10-30
Forming semiconductor chip connections Grant 8,236,610 - Hsu , et al. August 7, 2	2012-08-07
Three dimensional vertical E-fuse structures and methods of manufacturing the same Grant 8,232,190 - Bernstein , et al. July 31, 2	2012-07-31
Methods for self-aligned self-assembled patterning enhancement Grant 8,232,211 - Clevenger , et al. July 31, 2	2012-07-31
Methods For Self-aligned Self-assembled Patterning Enhancement App 20120190205 - Clevenger; Larry ; et al.	2012-07-26
Forming Semiconductor Chip Connections App 20120187561 - Hsu; Louis Lu-Chen ; et al.	2012-07-26
Two-dimensional Patterning Employing Self-assembled Material App 20120183743 - Dalton; Timothy J. ; et al.	2012-07-19
Pattern Formation Employing Self-assembled Material App 20120183736 - Black; Charles T. ; et al.	2012-07-19
Pattern Formation Employing Self-assembled Material App 20120183742 - Black; Charles T. ; et al.	2012-07-19
Pattern formation employing self-assembled material Grant 8,215,074 - Black , et al. July 10, 2	2012-07-10
Two-dimensional patterning employing self-assembled material Grant 8,207,028 - Dalton , et al. June 26, 2	2012-06-26
Addition of ballast hydrocarbon gas to doped polysilicon etch masked by resist Grant 8,198,103 - Dalton , et al. June 12, 2	2012-06-12
Pattern Formation Employing Self-assembled Material App 20120138571 - Black; Charles T. ; et al.	2012-06-07
Methods Of Fabricating Passive Element Without Planarizing And Related Semiconductor Device App 20120133022 - Chinthakindi; Anil K. ; et al.	2012-05-31
Two-dimensional Patterning Employing Self-assembled Material App 20120129357 - Dalton; Timothy J. ; et al.	2012-05-24
Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application Grant 8,159,042 - Yang , et al. April 17, 2	2012-04-17
Reducing effective dielectric constant in semiconductor devices Grant 8,129,286 - Edelstein , et al. March 6, 2	2012-03-06
Integrated circuit comb capacitor Grant 8,120,143 - Edelstein , et al. February 21, 2	2012-02-21
Methods of fabricating passive element without planarizing and related semiconductor device Grant 8,119,491 - Chinthakindi , et al. February 21, 2	2012-02-21
Trilayer resist scheme for gate etching applications Grant 8,084,825 - Fuller , et al. December 27, 2	2011-12-27
System and method for plasma induced modification and improvement of critical dimension uniformity Grant 8,049,335 - Dalton , et al. November 1, 2	2011-11-01
High density planar magnetic domain wall memory apparatus Grant 8,023,305 - Gaidis , et al. September 20, 2	2011-09-20
Three-dimensional networking design structure Grant 8,019,970 - Bernstein , et al. September 13, 2	2011-09-13
High density planar magnetic domain wall memory apparatus Grant 8,009,453 - Gaidis , et al. August 30, 2	2011-08-30
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20110111590 - Edelstein; Daniel C. ; et al.	2011-05-12
Photovoltaic Module With A Controllable Infrared Protection Layer App 20110100420 - Clevenger; Lawrence A. ; et al.	2011-05-05
Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application Grant 7,927,995 - Yang , et al. April 19, 2	2011-04-19
Interconnect structures with encasing cap and methods of making thereof Grant 7,902,061 - Clevenger , et al. March 8, 2	2011-03-08
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,892,940 - Edelstein , et al. February 22, 2	2011-02-22
Flash memory gate structure for widened lithography window Grant 7,888,729 - Cheng , et al. February 15, 2	2011-02-15
Semitubular metal-oxide-semiconductor field effect transistor Grant 7,868,374 - Cheng , et al. January 11, 2	2011-01-11
Three-dimensional networking structure Grant 7,865,694 - Bernstein , et al. January 4, 2	2011-01-04
Forming Semiconductor Chip Connections App 20100301475 - Hsu; Louis Lu-Chen ; et al.	2010-12-02
Structure for stochastic integrated circuit personalization Grant 7,838,873 - Clevenger , et al. November 23, 2	2010-11-23
Electrical Fuses And Resistors Having Sublithographic Dimensions App 20100283121 - Black; Charles T. ; et al.	2010-11-11
Method for forming slot via bitline for MRAM devices Grant 7,825,420 - Gaidis , et al. November 2, 2	2010-11-02
MIM capacitor and method of fabricating same Grant 7,821,051 - Yang , et al. October 26, 2	2010-10-26
Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics Grant 7,811,926 - Fuller , et al. October 12, 2	2010-10-12
Method of forming an interconnection structure in a organosilicate glass having a porous layer with higher carbon content located between two lower carbon content non-porous layers Grant 7,767,587 - Fuller , et al. August 3, 2	2010-08-03
Addressable hierarchical metal wire test methodology Grant 7,749,778 - Chanda , et al. July 6, 2	2010-07-06
Electrical fuses and resistors having sublithographic dimensions Grant 7,741,721 - Black , et al. June 22, 2	2010-06-22
Method of forming a micro-electromechanical (MEMS) switch Grant 7,726,010 - Hsu , et al. June 1, 2	2010-06-01
Chip-in-slot interconnect for 3D chip stacks Grant 7,700,410 - Bernstein , et al. April 20, 2	2010-04-20
Flash Memory Gate Structure For Widened Lithography Window App 20100052034 - Cheng; Kangguo ; et al.	2010-03-04
Structure and method for self aligned vertical plate capacitor Grant 7,670,921 - Chinthakindi , et al. March 2, 2	2010-03-02
Air gap under on-chip passive device Grant 7,662,722 - Stamper , et al. February 16, 2	2010-02-16
Method and structure for forming slot via bitline for MRAM devices Grant 7,635,884 - Gaidis , et al. December 22, 2	2009-12-22
Adopting Feature Of Buried Electrically Conductive Layer In Dielectrics For Electrical Anti-fuse Application App 20090305493 - Yang; Chih-Chao ; et al.	2009-12-10
Method For Forming Slot Via Bitline For Mram Devices App 20090302405 - Gaidis; Michael C. ; et al.	2009-12-10
Interconnect structure Grant 7,598,616 - Yang , et al. October 6, 2	2009-10-06
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,592,685 - Edelstein , et al. September 22, 2	2009-09-22
Integrated circuit comb capacitor Grant 7,585,722 - Edelstein , et al. September 8, 2	2009-09-08
Semitubular Metal-oxide-semiconductor Field Effect Transistor App 20090212341 - Cheng; Kangguo ; et al.	2009-08-27
Method of fabrication of interconnect structures Grant 7,563,710 - Yang , et al. July 21, 2	2009-07-21
Method for producing thermally matched probe assembly Grant 7,546,670 - Dalton , et al. June 16, 2	2009-06-16
Structure and method for stochastic integrated circuit personalization Grant 7,544,578 - Clevenger , et al. June 9, 2	2009-06-09
Three-dimensional Networking Design Structure App 20090138581 - Bernstein; Kerry ; et al.	2009-05-28
Self-assembled Material Pattern Transfer Contrast Enhancement App 20090117360 - Clevenger; Lawrence A. ; et al.	2009-05-07
Interconnect structure and method of fabrication of same Grant 7,528,493 - Yang , et al. May 5, 2	2009-05-05
Structure and method for MOSFET gate electrode landing pad Grant 7,528,065 - Clevenger , et al. May 5, 2	2009-05-05
Planar vertical resistor and bond pad resistor and related method Grant 7,528,048 - Coolbaugh , et al. May 5, 2	2009-05-05
Trilayer Resist Scheme For Gate Etching Applications App 20090101985 - Fuller; Nicholas C. ; et al.	2009-04-23
Method of forming high density planar magnetic domain wall memory Grant 7,514,271 - Gaidis , et al. April 7, 2	2009-04-07
Three Dimensional Vertical E-fuse Structures And Methods Of Manufacturing The Same App 20090085152 - Bernstein; Kerry ; et al.	2009-04-02
Semiconductor interconnect structure utilizing a porous dielectric material as an etch stop layer between adjacent non-porous dielectric materials Grant 7,504,727 - Fuller , et al. March 17, 2	2009-03-17
Back end interconnect with a shaped interface Grant 7,494,915 - Clevenger , et al. February 24, 2	2009-02-24
Corrugated Interfaces For Multilayered Interconnects App 20090041989 - Clevenger; Lawrence A. ; et al.	2009-02-12
Interconnect structures with encasing cap and methods of making thereof Grant 7,488,677 - Wong , et al. February 10, 2	2009-02-10
Electrical Fuses And Resistors Having Sublithographic Dimensions App 20090032959 - Black; Charles T. ; et al.	2009-02-05
Waveguide polarization beam splitters and method of fabricating a waveguide wire-grid polarization beam splitter Grant 7,486,845 - Black , et al. February 3, 2	2009-02-03
Dual Damascene Process Flow Enabling Minimal Ulk Film Modification And Enhanced Stack Integrity App 20090014880 - Dalton; Timothy J. ; et al.	2009-01-15
Interconnect Structures With Encasing Cap And Methods Of Making Thereof App 20080318415 - Wong; Kwong Hon ; et al.	2008-12-25
Structure For Stochastic Integrated Circuit Personalization App 20080308801 - Clevenger; Lawrence A. ; et al.	2008-12-18
MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SiCOH DIELECTRICS App 20080311744 - Fuller; Nicholas C.M. ; et al.	2008-12-18
Chip-in-slot Interconnect For 3d Chip Stacks App 20080303139 - Bernstein; Kerry ; et al.	2008-12-11
Addition Of Ballast Hydrocarbon Gas To Doped Polysilicon Etch Masked By Resist App 20080286972 - Dalton; Timothy J. ; et al.	2008-11-20
Adopting Feature Of Buried Electrically Conductive Layer In Dielectrics For Electrical Anti-fuse Application App 20080283964 - Yang; Chih-Chao ; et al.	2008-11-20
Method and structure for integrating MIM capacitors within dual damascene processing techniques Grant 7,439,151 - Coolbaugh , et al. October 21, 2	2008-10-21
Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics Grant 7,439,174 - Dalton , et al. October 21, 2	2008-10-21
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080254630 - EDELSTEIN; Daniel C. ; et al.	2008-10-16
Trilayer resist scheme for gate etching applications Grant 7,435,671 - Fuller , et al. October 14, 2	2008-10-14
Dual damascene process flow enabling minimal ULK film modification and enhanced stack integrity Grant 7,435,676 - Dalton , et al. October 14, 2	2008-10-14
Interconnect Structure And Method Of Fabrication Of Same App 20080246151 - Yang; Chih-Chao ; et al.	2008-10-09
High Density Planar Magnetic Domain Wall Memory Apparatus And Method Of Forming The Same App 20080243972 - Gaidis; Michael C. ; et al.	2008-10-02
High Density Planar Magnetic Domain Wall Memory Apparatus App 20080239785 - Gaidis; Michael C. ; et al.	2008-10-02
High Density Planar Magnetic Domain Wall Memory Apparatus App 20080239784 - Gaidis; Michael C. ; et al.	2008-10-02
Methods of fabricating passive element without planarizing Grant 7,427,550 - Chinthakindi , et al. September 23, 2	2008-09-23
Methods Of Fabricating Passive Element Without Planarizing And Related Semiconductor Device App 20080224259 - Chinthakindi; Anil K. ; et al.	2008-09-18
Method And Structure For Integrating Mim Capacitors Within Dual Damascene Processing Techniques App 20080185684 - Coolbaugh; Douglas D. ; et al.	2008-08-07
Device and methodology for reducing effective dielectric constant in semiconductor devices Grant 7,405,147 - Edelstein , et al. July 29, 2	2008-07-29
Air Gap Under On-chip Passive Device App 20080173976 - Stamper; Anthony K. ; et al.	2008-07-24
Waveguide Polarization Beam Splitters And Method Of Fabricating A Waveguide Wire-grid Polarization Beam Splitter App 20080175527 - Black; Charles T. ; et al.	2008-07-24
Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application Grant 7,402,463 - Yang , et al. July 22, 2	2008-07-22
Structure and Method for Mosfet Gate Electrode Landing Pad App 20080164525 - Clevenger; Lawrence A. ; et al.	2008-07-10
Method For Chip To Package Interconnect App 20080160752 - Clevenger; Lawrence ; et al.	2008-07-03
Addressable Hierarchical Metal Wire Test Methodology App 20080160656 - Chanda; Kaushik ; et al.	2008-07-03
Direct Termination Of A Wiring Metal In A Semiconductor Device App 20080157382 - Chinthakindi; Anil K. ; et al.	2008-07-03
Structure And Method For Self Aligned Vertical Plate Capacitor App 20080158771 - Chinthakindi; Anil K. ; et al.	2008-07-03
Structure And Method For Stochastic Integrated Circuit Personalization App 20080157314 - Clevenger; Lawrence A. ; et al.	2008-07-03
Micro-cavity MEMS device and method of fabricating same Grant 7,394,332 - Hsu , et al. July 1, 2	2008-07-01
Methods of fabricating passive element without planarizing and related semiconductor device Grant 7,394,145 - Chinthakindi , et al. July 1, 2	2008-07-01
Method of forming closed air gap interconnects and structures formed thereby Grant 7,393,776 - Colburn , et al. July 1, 2	2008-07-01
Planar vertical resistor and bond pad resistor Grant 7,394,110 - Coolbaugh , et al. July 1, 2	2008-07-01
Use Of A Porous Dielectric Material As An Etch Stop Layer For Non-porous Dielectric Films App 20080146037 - Fuller; Nicholas C.M. ; et al.	2008-06-19
Planar Vertical Resistor And Bond Pad Resistor And Related Method App 20080132027 - Coolbaugh; Douglas D. ; et al.	2008-06-05
Integrated Circuit Comb Capacitor App 20080130200 - Edelstein; Daniel C. ; et al.	2008-06-05
Formation of low resistance via contacts in interconnect structures Grant 7,378,350 - Dalton , et al. May 27, 2	2008-05-27
Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics Grant 7,371,461 - Fuller , et al. May 13, 2	2008-05-13
Vertical parallel plate capacitor using spacer shaped electrodes and method for fabrication thereof Grant 7,365,412 - Dalton , et al. April 29, 2	2008-04-29
Etching Apparatus For Semicondutor Fabrication App 20080093342 - Dalton; Timothy J. ; et al.	2008-04-24
Micro-cavity Mems Device And Method Of Fabricating Same App 20080092367 - Hsu; Louis C. ; et al.	2008-04-24
Closed air gap interconnect structure Grant 7,361,991 - Saenger , et al. April 22, 2	2008-04-22
Multiple layer resist scheme implementing etch recipe particular to each layer Grant 7,352,064 - Fuller , et al. April 1, 2	2008-04-01
Method And Structure For Integrating Mim Capacitors Within Dual Damascene Processing Techniques App 20080064163 - Coolbaugh; Douglas D. ; et al.	2008-03-13
Methods Of Fabricating Passive Element Without Planarizing And Related Semiconductor Device App 20080054393 - Chinthakindi; Anil K. ; et al.	2008-03-06
Vertical Parallel Plate Capacitor Using Spacer Shaped Electrodes And Method For Fabrication Thereof App 20080047118 - Dalton; Timothy J. ; et al.	2008-02-28
Interconnect structure and method of fabrication of same Grant 7,335,588 - Yang , et al. February 26, 2	2008-02-26
Trilayer resist scheme for gate etching applications App 20080045011 - Fuller; Nicholas C. ; et al.	2008-02-21
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080038923 - EDELSTEIN; Daniel C. ; et al.	2008-02-14
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20080038915 - EDELSTEIN; Daniel C. ; et al.	2008-02-14
MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SiCOH DIELECTRICS App 20080038917 - Dalton; Timothy J. ; et al.	2008-02-14
Interconnect Structure And Method Of Fabrication Of Same App 20080014744 - Yang; Chih-Chao ; et al.	2008-01-17
Interconnect Structure And Method Of Fabrication Of Same App 20080006944 - Yang; Chih-Chao ; et al.	2008-01-10
Methods Of Fabricating Passive Element Without Planarizing And Related Semiconductor Device App 20080003759 - Chinthakindi; Anil K. ; et al.	2008-01-03
Method of forming closed air gap interconnects and structures formed thereby Grant 7,309,649 - Colburn , et al. December 18, 2	2007-12-18
Waveguide polarization beam splitters and method of fabricating a waveguide wire-grid polarization beam splitter Grant 7,298,935 - Black , et al. November 20, 2	2007-11-20
Three-dimensional Networking Structure App 20070266129 - Bernstein; Kerry ; et al.	2007-11-15
High density thermally matched contacting probe assembly and method for producing same App 20070257689 - Dalton; Timothy J. ; et al.	2007-11-08
Waveguide Polarization Beam Splitters And Method Of Fabricating A Waveguide Wire-grid Polarization Beam Splitter App 20070253661 - Black; Charles T. ; et al.	2007-11-01
Vertical Parallel Plate Capacitor Using Spacer Shaped Electrodes And Method For Fabrication Thereof App 20070241424 - Dalton; Timothy J. ; et al.	2007-10-18
De-fluorination after via etch to preserve passivation Grant 7,282,441 - Fuller , et al. October 16, 2	2007-10-16
Planar Vertical Resistor And Bond Pad Resistor And Related Method App 20070181974 - Coolbaugh; Douglas D. ; et al.	2007-08-09
High ion energy and reative species partial pressure plasma ash process Grant 7,253,116 - Fuller , et al. August 7, 2	2007-08-07
Structure and method for MOSFET gate electrode landing pad App 20070164357 - Clevenger; Lawrence A. ; et al.	2007-07-19
Dual damascene process flow enabling minimal ULK film modification and enhanced stack integrity App 20070161226 - Dalton; Timothy J. ; et al.	2007-07-12
Integrated Circuit Comb Capacitor App 20070158717 - Edelstein; Daniel C. ; et al.	2007-07-12
System And Method For Plasma Induced Modification And Improvement Of Critical Dimension Uniformity App 20070143721 - Dalton; Timothy J. ; et al.	2007-06-21
MIM capacitor and method of fabricating same Grant 7,223,654 - Yang , et al. May 29, 2	2007-05-29
Method of forming low resistance and reliable via in inter-level dielectric interconnect Grant 7,223,691 - Cabral, Jr. , et al. May 29, 2	2007-05-29
Mim Capacitor And Method Of Fabricating Same App 20070117313 - Yang; Chih-Chao ; et al.	2007-05-24
System and method for plasma induced modification and improvement of critical dimension uniformity Grant 7,196,014 - Dalton , et al. March 27, 2	2007-03-27
Post-etch removal of fluorocarbon-based residues from a hybrid dielectric structure App 20070059922 - Clevenger; Lawrence A. ; et al.	2007-03-15
Interconnect structures with encasing cap and methods of making thereof App 20070054489 - Wong; Kwong Hon ; et al.	2007-03-08
Method For Protecting A Semiconductor Device From Carbon Depletion Based Damage App 20070048981 - Bonilla; Griselda ; et al.	2007-03-01
Micro-cavity MEMS device and method of fabricating same App 20070046392 - Hsu; Louis C. ; et al.	2007-03-01
Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application App 20070040276 - Yang; Chih-Chao ; et al.	2007-02-22
Method and structure for forming slot via bitline for MRAM devices App 20070023806 - Gaidis; Michael C. ; et al.	2007-02-01
Back End Interconnect With A Shaped Interface App 20060292852 - Clevenger; Lawrence A. ; et al.	2006-12-28
Method of forming closed air gap interconnects and structures formed thereby App 20060267208 - Colburn; Matthew E. ; et al.	2006-11-30
Method of forming closed air gap interconnects and structures formed thereby App 20060258147 - Colburn; Matthew E. ; et al.	2006-11-16
MIM capacitor and method of fabricating same App 20060234443 - Yang; Chih-Chao ; et al.	2006-10-19
Interconnect structure and method of fabrication of same App 20060234497 - Yang; Chih-Chao ; et al.	2006-10-19
Back end interconnect with a shaped interface Grant 7,122,462 - Clevenger , et al. October 17, 2	2006-10-17
Interconnect structures with encasing cap and methods of making thereof Grant 7,105,445 - Wong , et al. September 12, 2	2006-09-12
Etching Apparatus For Semiconductor Fabrication App 20060191638 - Dalton; Timothy J. ; et al.	2006-08-31
Method for adjusting capacitance of an on-chip capacitor Grant 7,092,235 - Clevenger , et al. August 15, 2	2006-08-15
Addition Of Ballast Hydrocarbon Gas To Doped Polysilicon Etch Masked By Resist App 20060166416 - Dalton; Timothy J. ; et al.	2006-07-27
Interconnect structures with encasing cap and methods of making thereof App 20060160349 - Wong; Kwong Hon ; et al.	2006-07-20
Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics App 20060154086 - Fuller; Nicholas C.M. ; et al.	2006-07-13
Copper recess process with application to selective capping and electroless plating Grant 7,064,064 - Chen , et al. June 20, 2	2006-06-20
Apparatus and Method of Intelligent Multistage System Deactivation App 20060109117 - Hsu; Louis C. ; et al.	2006-05-25
De-fluorination of wafer surface and related structure Grant 7,049,209 - Dalton , et al. May 23, 2	2006-05-23
Very low effective dielectric constant interconnect structures and methods for fabricating the same Grant 7,045,453 - Canaperi , et al. May 16, 2	2006-05-16
System and method for plasma induced modification and improvement of critical dimension uniformity App 20060099816 - Dalton; Timothy J. ; et al.	2006-05-11
De-fluorination After Via Etch To Preserve Passivation App 20060099785 - Fuller; Nicholas ; et al.	2006-05-11
Multiple Layer Resist Scheme Implementing Etch Recipe Particular to Each Layer App 20060094230 - Fuller; Nicholas C.M. ; et al.	2006-05-04
Method of forming low resistance and reliable via in inter-level dielectric interconnect App 20060084256 - Cabral; Cyril JR. ; et al.	2006-04-20
Very low effective dielectric constant interconnect Structures and methods for fabricating the same Grant 7,023,093 - Canaperi , et al. April 4, 2	2006-04-04
CD uniformity of chrome etch to photomask process Grant 7,014,959 - Crawford , et al. March 21, 2	2006-03-21
Crystallographic modification of hard mask properties Grant 7,001,835 - Clevenger , et al. February 21, 2	2006-02-21
Copper recess process with application to selective capping and electroless plating Grant 6,975,032 - Chen , et al. December 13, 2	2005-12-13
Formation of low resistance via contacts in interconnect structures App 20050266681 - Dalton, Timothy J. ; et al.	2005-12-01
Use of a porous dielectric material as an etch stop layer for non-porous dielectric films App 20050258542 - Fuller, Nicholas C.M. ; et al.	2005-11-24
Interconnect structure improvements Grant 6,960,519 - Dalton , et al. November 1, 2	2005-11-01
Filled Cavities Semiconductor Devices App 20050218504 - Dalton, Timothy J. ; et al.	2005-10-06
Oxidized Tantalum Nitride As An Improved Hardmask In Dual-damascene Processing App 20050208742 - America, William G. ; et al.	2005-09-22
Very low effective dielectric constant interconnect structures and methods for fabricating the same App 20050186778 - Canaperi, Donald F. ; et al.	2005-08-25
Two-mask process for metal-insulator-metal capacitors and single mask process for thin film resistors Grant 6,933,191 - Biery , et al. August 23, 2	2005-08-23
Fuse structure and method to form the same Grant 6,927,472 - Anderson , et al. August 9, 2	2005-08-09
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices App 20050167838 - Edelstein, Daniel C. ; et al.	2005-08-04
Fuse structure and method to form the same Grant 6,924,185 - Anderson , et al. August 2, 2	2005-08-02
Copper recess process with application to selective capping and electroless plating App 20050158985 - Chen, Shyng-Tsong ; et al.	2005-07-21
Method for adjusting capacitance of an on-chip capacitor App 20050128682 - Clevenger, Lawrence A. ; et al.	2005-06-16
Partial inter-locking metal contact structure for semiconductor devices and method of manufacture App 20050112957 - Yang, Chih-Chao ; et al.	2005-05-26
Back End Interconnect With a Shaped Interface App 20050112864 - Clevenger, Lawrence A. ; et al.	2005-05-26
Crystallographic Modification of Hard mask Properties App 20050112862 - Clevenger, Lawrence A. ; et al.	2005-05-26
Photoresist ash process with reduced inter-level dielectric ( ILD) damage App 20050077629 - Dalton, Timothy J. ; et al.	2005-04-14
Plasma surface modification and passivation of organo-silicate glass films for improved hardmask adhesion and optimal RIE processing App 20050067702 - America, William G. ; et al.	2005-03-31
Method For Adjusting Capacitance Of An On-chip Capacitor App 20050070127 - Clevenger, Lawrence A. ; et al.	2005-03-31
Encapsulated energy-dissipative fuse for integrated circuits and method of making the same Grant 6,873,027 - Dalton , et al. March 29, 2	2005-03-29
Formation of low resistance via contacts in interconnect structures App 20050064701 - Dalton, Timothy J. ; et al.	2005-03-24
Method of forming closed air gap interconnects and structures formed thereby App 20050062165 - Saenger, Katherine L. ; et al.	2005-03-24
Two-mask Process For Metal-insulator-metal Capacitors And Single Mask Process For Thin Film Resistors App 20050064658 - Biery, Glenn A. ; et al.	2005-03-24
Method for adjusting capacitance of an on-chip capacitor Grant 6,869,895 - Clevenger , et al. March 22, 2	2005-03-22
Damascene interconnect structures including etchback for low-k dielectric materials Grant 6,838,355 - Stamper , et al. January 4, 2	2005-01-04
Improved Cd Uniformity Of Chrome Etch To Photomask Process App 20040262264 - Crawford, Shaun B. ; et al.	2004-12-30
Structure and method for reducing thermo-mechanical stress in stacked vias Grant 6,831,363 - Dalton , et al. December 14, 2	2004-12-14
Self-contained heat sink and a method for fabricating same Grant 6,815,813 - Dalton , et al. November 9, 2	2004-11-09
Method of fabricating micro-electromechanical switches on CMOS compatible substrates Grant 6,798,029 - Volant , et al. September 28, 2	2004-09-28
Method Of Fabricating Micro-electromechanical Switches On Cmos Compatible Substrates App 20040126921 - Volant, Richard P. ; et al.	2004-07-01
Copper recess process with application to selective capping and electroless plating App 20040113279 - Chen, Shyng-Tsong ; et al.	2004-06-17
Structure and method for reducing thermo-mechanical stress in stacked vias App 20040113278 - Dalton, Timothy J. ; et al.	2004-06-17
Fine-pitch device lithography using a sacrificial hardmask Grant 6,734,096 - Dalton , et al. May 11, 2	2004-05-11
Very low effective dielectric constant interconnect Structures and methods for fabricating the same App 20040087135 - Canaperi, Donald F. ; et al.	2004-05-06
Fuse structure and method to form the same App 20040070049 - Anderson, David K. ; et al.	2004-04-15
Protective hardmask for producing interconnect structures Grant 6,720,249 - Dalton , et al. April 13, 2	2004-04-13
Process for forming a damascene structure Grant 6,649,531 - Cote , et al. November 18, 2	2003-11-18
Method of fabricating micro-electromechanical switches on CMOS compatible substrates Grant 6,635,506 - Volant , et al. October 21, 2	2003-10-21
Interconnect structures containing stress adjustment cap layer Grant 6,617,690 - Gates , et al. September 9, 2	2003-09-09
Method to decrease fluorine contamination in low dielectric constant films Grant 6,613,484 - Dalton , et al. September 2, 2	2003-09-02
Method Of Fabricating Micro-electromechanical Switches On Cmos Compatible Substrates App 20030148550 - Volant, Richard P. ; et al.	2003-08-07
Fine-pitch device lithography using a sacrificial hardmask App 20030134505 - Dalton, Timothy J. ; et al.	2003-07-17
Process for forming a damascene structure App 20030100190 - Cote, William J. ; et al.	2003-05-29
Fuse structure and method to form the same App 20030089962 - Anderson, David K. ; et al.	2003-05-15
Low k dielectric film deposition process App 20030087043 - Edelstein, Daniel C. ; et al.	2003-05-08
Encapsulated energy-dissipative fuse for integrated circuits and method of making the same App 20030080393 - Dalton, Timothy J. ; et al.	2003-05-01
Post metalization chem-mech polishing dielectric etch Grant 6,551,924 - Dalton , et al. April 22, 2	2003-04-22
Self-supporting air bridge interconnect structure for integrated circuits Grant 6,472,740 - Engel , et al. October 29, 2	2002-10-29
Method of forming an on-chip decoupling capacitor with bottom hardmask Grant 6,387,754 - Dalton , et al. May 14, 2	2002-05-14
Method of forming barrier layers for damascene interconnects Grant 6,358,832 - Edelstein , et al. March 19, 2	2002-03-19
Method of forming an on-chip decoupling capacitor with bottom hardmask App 20010036753 - Dalton, Timothy J. ; et al.	2001-11-01
Dual etch stop/diffusion barrier for damascene interconnects Grant 6,153,935 - Edelstein , et al. November 28, 2	2000-11-28
Methodology for in situ etch stop detection and control of plasma etching process and device design to minimize process chamber contamination Grant 5,788,869 - Dalton , et al. August 4, 1	1998-08-04
Apparatus and method for real-time measurement of thin film layer thickness and changes thereof Grant 5,450,205 - Sawin , et al. September 12, 1	1995-09-12