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name:-0.028861045837402
name:-0.14188003540039
name:-0.00058698654174805
Cliff; Richard G. Patent Filings

Cliff; Richard G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cliff; Richard G..The latest application filed is for "pld architecture for flexible placement of ip function blocks".

Company Profile
0.127.30
  • Cliff; Richard G. - Los Altos CA
  • Cliff; Richard G - Los Altos CA
  • Cliff; Richard G - Milpitas CA
  • Cliff; Richard G. - Milpitas CA
  • Cliff; Richard G. - Santa Clara CA
  • Cliff; Richard G. - Milipitas CA
  • Cliff; Richard G. - Plymouth GB2
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Phase-locked loop architecture and clock distribution system
Grant 9,654,123 - Pham , et al. May 16, 2
2017-05-16
Phase-locked loop architecture and clock distribution system
Grant 9,350,530 - Pham , et al. May 24, 2
2016-05-24
PLD architecture for flexible placement of IP function blocks
Grant 9,094,014 - Lee , et al. July 28, 2
2015-07-28
Phase-locked loop architecture and clock distribution system
Grant 8,866,520 - Pham , et al. October 21, 2
2014-10-21
Pld Architecture For Flexible Placement Of Ip Function Blocks
App 20140210515 - Lee; Andy L. ;   et al.
2014-07-31
PLD architecture for flexible placement of IP function blocks
Grant 8,732,646 - Lee , et al. May 20, 2
2014-05-20
Apparatus for improving performance of field programmable gate arrays and associated methods
Grant 8,698,516 - Rahim , et al. April 15, 2
2014-04-15
Phase-locked loop architecture and clock distribution system
Grant 8,542,042 - Pham , et al. September 24, 2
2013-09-24
Apparatus for configuring performance of field programmable gate arrays and associated methods
Grant 8,461,869 - Rahim , et al. June 11, 2
2013-06-11
Apparatus For Improving Performance Of Field Programmable Gate Arrays And Associated Methods
App 20130043902 - Rahim; Irfan ;   et al.
2013-02-21
Phase-locked loop architecture and clock distribution system
Grant 8,228,102 - Pham , et al. July 24, 2
2012-07-24
Apparatus and methods for adjusting performance of programmable logic devices
Grant 8,198,914 - Lee , et al. June 12, 2
2012-06-12
Apparatus and methods for adjusting performance of programmable logic devices
App 20110204919 - Lee; Andy L. ;   et al.
2011-08-25
Apparatus and methods for adjusting performance of programmable logic devices
Grant 7,936,184 - Lee , et al. May 3, 2
2011-05-03
Embedded Digital Ip Strip Chip
App 20100277201 - Wortman; Curt ;   et al.
2010-11-04
Passgate structures for use in low-voltage applications
Grant 7,800,405 - Lee , et al. September 21, 2
2010-09-21
Low-power transceiver architectures for programmable logic integrated circuit devices
Grant 7,750,674 - Shumarayev , et al. July 6, 2
2010-07-06
Reducing false positives in configuration error detection for programmable devices
Grant 7,620,876 - Lewis , et al. November 17, 2
2009-11-17
Passgate Structures For Use In Low-voltage Applications
App 20090267645 - Lee; Andy L. ;   et al.
2009-10-29
Passgate structures for use in low-voltage applications
Grant 7,557,608 - Lee , et al. July 7, 2
2009-07-07
Low-power transceiver architectures for programmable logic integrated circuit devices
App 20080258765 - Shumarayev; Sergey ;   et al.
2008-10-23
Low-power transceiver architectures for programmable logic integrated circuit devices
Grant 7,403,035 - Shumarayev , et al. July 22, 2
2008-07-22
Apparatus and methods for adjusting performance of programmable logic devices
App 20070200596 - Lee; Andy L. ;   et al.
2007-08-30
Multiple size memories in a programmable logic device
Grant 7,236,008 - Cliff , et al. June 26, 2
2007-06-26
Programmable logic integrated circuit devices with low voltage differential signaling capabilities
Grant 7,196,556 - Nguyen , et al. March 27, 2
2007-03-27
Phase-locked loop circuitry for programmable logic devices
Grant 7,190,755 - Sung , et al. March 13, 2
2007-03-13
Passgate structures for use in low-voltage applications
App 20070008000 - Lee; Andy L. ;   et al.
2007-01-11
Reducing false positives in configuration error detection for programmable devices
App 20070011578 - Lewis; David ;   et al.
2007-01-11
PCI-compatible programmable logic devices
Grant 7,148,722 - Cliff , et al. December 12, 2
2006-12-12
Passage structures for use in low-voltage applications
Grant 7,119,574 - Lee , et al. October 10, 2
2006-10-10
Integrated circuits with reduced standby power consumption
Grant 7,109,748 - Liu , et al. September 19, 2
2006-09-19
I/O cell configuration for multiple I/O standards
Grant 7,034,570 - McClintock , et al. April 25, 2
2006-04-25
Time-multiplexed routing in a programmable logic device architecture
Grant 6,977,520 - Hutton , et al. December 20, 2
2005-12-20
Integrated circuits with reduced standby power consumption
Grant 6,940,307 - Liu , et al. September 6, 2
2005-09-06
I/O cell configuration for multiple I/O standards
App 20050151564 - McClintock, Cameron ;   et al.
2005-07-14
Programmable logic array integrated circuits
Grant 6,897,679 - Cliff , et al. May 24, 2
2005-05-24
Tristate structures for programmable logic devices
Grant 6,882,177 - Reddy , et al. April 19, 2
2005-04-19
Programmable logic device architectures with super-regions having logic regions and a memory region
Grant 6,879,183 - Jefferson , et al. April 12, 2
2005-04-12
Shift register implementations of first-in/first-out memories utilizing a double increment gray code counter
Grant 6,857,043 - Lee , et al. February 15, 2
2005-02-15
I/O cell configuration for multiple I/O standards
Grant 6,836,151 - McClintock , et al. December 28, 2
2004-12-28
Programmable logic array integrated circuit devices
Grant 6,815,981 - Cliff , et al. November 9, 2
2004-11-09
Variable depth and width memory device
Grant RE38,651 - Sung , et al. November 9, 2
2004-11-09
Programmable logic device with hierarchical interconnection resources
Grant 6,798,242 - Reddy , et al. September 28, 2
2004-09-28
Programmable logic array integrated circuits
Grant 6,759,870 - Cliff , et al. July 6, 2
2004-07-06
Programmable logic array integrated circuits
App 20040066212 - Cliff, Richard G. ;   et al.
2004-04-08
I/O cell configuration for multiple I/O standards
Grant 6,714,050 - McClintock , et al. March 30, 2
2004-03-30
Programming mode selection with JTAG circuits
Grant 6,681,378 - Wang , et al. January 20, 2
2004-01-20
Passgate structures for use in low-voltage applications
Grant 6,661,253 - Lee , et al. December 9, 2
2003-12-09
Programmable logic with on-chip DLL or PLL to distribute clock
Grant 6,657,456 - Jefferson , et al. December 2, 2
2003-12-02
PCI-compatible programmable logic devices
Grant 6,646,467 - Cliff , et al. November 11, 2
2003-11-11
Programmable logic device with hierarchical interconnection resources
App 20030201794 - Reddy, Srinivas T. ;   et al.
2003-10-30
Programmable logic array integrated circuit devices
App 20030128051 - Cliff, Richard G. ;   et al.
2003-07-10
Programmable logic array integrated circuits
App 20030128052 - Cliff, Richard G. ;   et al.
2003-07-10
Programmable logic device architectures with super-regions having logic regions and a memory region
App 20030080778 - Jefferson, David E. ;   et al.
2003-05-01
Programmable logic device with hierarchical interconnection resources
App 20030076130 - Reddy, Srinivas T. ;   et al.
2003-04-24
Interconnect chip for programmable logic devices
Grant 6,526,461 - Cliff February 25, 2
2003-02-25
Programmable logic array integrated circuit devices
App 20030016053 - Cliff, Richard G. ;   et al.
2003-01-23
Phase-locked loop circuitry for programmable logic devices
Grant 6,483,886 - Sung , et al. November 19, 2
2002-11-19
Programming mode selection with JTAG circuits
App 20020157078 - Wang, Xiaobao ;   et al.
2002-10-24
Phase-locked loop circuitry for programmable logic devices
Grant 6,469,553 - Sung , et al. October 22, 2
2002-10-22
Programmable logic array integrated circuits
App 20020130681 - Cliff, Richard G. ;   et al.
2002-09-19
Programming mode selection with JTAG circuits
Grant 6,421,812 - Wang , et al. July 16, 2
2002-07-16
Programmable logic device architectures with super-regions having logic regions and a memory region
App 20020084801 - Jefferson, David E. ;   et al.
2002-07-04
Programmable logic device logic modules with shift register capabilities
Grant 6,411,124 - Lee , et al. June 25, 2
2002-06-25
Programmable logic array integrated circuit devices
Grant 6,392,438 - Cliff , et al. May 21, 2
2002-05-21
Techniques for programming programmable logic array devices
Grant 6,384,630 - Cliff , et al. May 7, 2
2002-05-07
Programmable logic device with hierarchical interconnection resources
App 20020041191 - Reddy, Srinivas T. ;   et al.
2002-04-11
Logic element for a programmable logic integrated circuit
Grant 6,359,469 - Mendel , et al. March 19, 2
2002-03-19
Circuitry and methods for internal interconnection of programmable logic devices
Grant 6,335,634 - Reddy , et al. January 1, 2
2002-01-01
Programmable logic device logic modules with shift register capabilities
App 20010048320 - Lee, Andy L. ;   et al.
2001-12-06
Programmable logic device circuitry for improving multiplier speed and/or efficiency
Grant 6,323,677 - Lane , et al. November 27, 2
2001-11-27
Programmable Logic Array Integrated Circuits With Blocks Of Logic Regions Grouped Into Super-blocks
App 20010043083 - CLIFF, RICHARD G. ;   et al.
2001-11-22
I/O cell configuration for multiple I/O standards
App 20010035773 - McClintock, Cameron ;   et al.
2001-11-01
Programmable logic array integrated circuit architectures
App 20010022519 - Cliff, Richard G. ;   et al.
2001-09-20
Programmable logic with on-chip DLL or PLL to distribute clock
Grant 6,292,016 - Jefferson , et al. September 18, 2
2001-09-18
High-speed programmable interconnect
App 20010020851 - Huang, Joseph ;   et al.
2001-09-13
Dual port programmable logic device variable depth and width memory array
App 20010015933 - Reddy, Srinivas T. ;   et al.
2001-08-23
I/O cell configuration for multiple I/O standards
Grant 6,271,679 - McClintock , et al. August 7, 2
2001-08-07
Logic element for a programmable logic integrated circuit
Grant 6,271,680 - Mendel , et al. August 7, 2
2001-08-07
Programmable logic device architectures
App 20010006348 - Jefferson, David E. ;   et al.
2001-07-05
Techniques for programming programmable logic array devices
App 20010003844 - Cliff, Richard G. ;   et al.
2001-06-14
Tristate structures for programmable logic devices
Grant 6,239,613 - Reddy , et al. May 29, 2
2001-05-29
Programmable logic integrated circuit devices with low voltage differential signaling capabilities
Grant 6,236,231 - Nguyen , et al. May 22, 2
2001-05-22
Phase-locked loop circuitry for programmable logic devices
Grant 6,218,876 - Sung , et al. April 17, 2
2001-04-17
Programmable logic device architecture with super-regions having logic regions and a memory region
Grant 6,215,326 - Jefferson , et al. April 10, 2
2001-04-10
Techniques for programming programmable logic array devices
Grant 6,191,608 - Cliff , et al. February 20, 2
2001-02-20
Techniques for programming programmable logic array devices
Grant 6,184,705 - Cliff , et al. February 6, 2
2001-02-06
Redundancy circuitry for logic circuits
Grant 6,166,559 - McClintock , et al. December 26, 2
2000-12-26
Programmable logic array integrated circuit devices
Grant 6,154,055 - Cliff , et al. November 28, 2
2000-11-28
Programmable logic array integrated circuits
Grant 6,134,173 - Cliff , et al. October 17, 2
2000-10-17
Programmable logic integrated circuit with on-chip DLL or PLL for clock distribution
Grant 6,130,552 - Jefferson , et al. October 10, 2
2000-10-10
Programming and verification address generation for random access memory blocks in programmable logic array integrated circuit devices
Grant 6,128,692 - Sung , et al. October 3, 2
2000-10-03
Coarse-grained look-up table architecture
Grant 6,122,720 - Cliff September 19, 2
2000-09-19
Circuitry and methods for internal interconnection of programmable logic devices
Grant 6,107,824 - Reddy , et al. August 22, 2
2000-08-22
Logic element for a programmable logic integrated circuit
Grant 6,107,822 - Mendel , et al. August 22, 2
2000-08-22
Redundancy circuitry for logic circuits
Grant 6,091,258 - McClintock , et al. July 18, 2
2000-07-18
Programmable logic device circuitry for improving multiplier speed and/or efficiency
Grant 6,069,487 - Lane , et al. May 30, 2
2000-05-30
Programmable logic array integrated circuits
Grant 6,064,599 - Cliff , et al. May 16, 2
2000-05-16
Dual-port programmable logic device variable depth and width memory array
Grant 6,052,327 - Reddy , et al. April 18, 2
2000-04-18
Input/output interface circuitry for programmable logic array integrated circuit devices
Grant 6,049,225 - Huang , et al. April 11, 2
2000-04-11
Redundancy circuitry for logic circuits
Grant 6,034,536 - McClintock , et al. March 7, 2
2000-03-07
Programmable logic array integrated circuits
Grant 6,028,808 - Cliff , et al. February 22, 2
2000-02-22
Logic region resources for programmable logic devices
Grant 5,999,015 - Cliff , et al. December 7, 1
1999-12-07
Architectures for programmable logic devices
Grant 5,999,016 - McClintock , et al. December 7, 1
1999-12-07
Programmable logic device with hierarchical interconnection resources
Grant 5,977,793 - Reddy , et al. November 2, 1
1999-11-02
System for distributing clocks using a delay lock loop in a programmable logic circuit
Grant 5,963,069 - Jefferson , et al. October 5, 1
1999-10-05
Programmable logic array integrated circuit architectures
Grant 5,963,049 - Cliff , et al. October 5, 1
1999-10-05
Segmented localized conductors for programmable logic devices
Grant 5,963,051 - Cliff , et al. October 5, 1
1999-10-05
Programmable logic array circuits comprising look up table implementation of fast carry adders and counters
Grant 5,926,036 - Cliff , et al. July 20, 1
1999-07-20
Programmable logic array integrated circuit devices with interleaved logic array blocks
Grant 5,909,126 - Cliff , et al. June 1, 1
1999-06-01
Programmable logic array devices with interconnect lines of various lengths
Grant 5,900,743 - McClintock , et al. May 4, 1
1999-05-04
Tristate structures for programmable logic devices
Grant 5,894,228 - Reddy , et al. April 13, 1
1999-04-13
Programmable logic array integrated circuits
Grant 5,883,850 - Lee , et al. March 16, 1
1999-03-16
Programmable logic array intergrated circuit devices
Grant 5,850,151 - Cliff , et al. December 15, 1
1998-12-15
Programmable logic array integrated circuit devices
Grant 5,850,152 - Cliff , et al. December 15, 1
1998-12-15
Variable-path-length voltage-controlled oscillator circuit
Grant 5,847,617 - Reddy , et al. December 8, 1
1998-12-08
Programmable logic array integrated circuits
Grant 5,848,005 - Cliff , et al. December 8, 1
1998-12-08
Look up table implementation of fast carry arithmetic and exclusive-or operations
Grant RE35,977 - Cliff , et al. December 1, 1
1998-12-01
Programmable logic array integrated circuits
Grant 5,838,628 - Cliff , et al. November 17, 1
1998-11-17
Programmable logic array integrated circuits
Grant 5,828,229 - Cliff , et al. October 27, 1
1998-10-27
Coarse-grained look-up table architecture
Grant 5,815,726 - Cliff September 29, 1
1998-09-29
Programmable logic array integrated circuits
Grant 5,812,479 - Cliff , et al. September 22, 1
1998-09-22
Input/output interface circuitry for programmable logic array integrated circuit devices
Grant 5,764,080 - Huang , et al. June 9, 1
1998-06-09
Programmable logic array integrated circuits
Grant 5,764,583 - Cliff , et al. June 9, 1
1998-06-09
System for distributing clocks using a delay lock loop in a programmable logic circuit
Grant 5,744,991 - Jefferson , et al. April 28, 1
1998-04-28
Variable depth and width memory device
Grant 5,717,901 - Sung , et al. February 10, 1
1998-02-10
Programmable logic array integrated circuits with segmented, selectively connectable, long interconnection conductors
Grant 5,705,939 - McClintock , et al. January 6, 1
1998-01-06
Programmable logic array integrated circuit devices
Grant 5,689,195 - Cliff , et al. November 18, 1
1997-11-18
Programmable logic array integrated circuits
Grant 5,668,771 - Cliff , et al. September 16, 1
1997-09-16
Random access memory block circuitry for programmable logic array integrated circuit devices
Grant 5,633,830 - Sung , et al. May 27, 1
1997-05-27
Programmable logic array integrated circuits with segmented, selectively connectable, long interconnection conductors
Grant 5,614,840 - McClintock , et al. March 25, 1
1997-03-25
Programmable logic array device with grouped logic regions and three types of conductors
Grant 5,598,109 - Leong , et al. * January 28, 1
1997-01-28
Programmable logic array integrated circuits with interconnection conductors of overlapping extent
Grant 5,592,106 - Leong , et al. January 7, 1
1997-01-07
Programmable logic device having a compressed configuration file and associated decompression
Grant 5,563,592 - Cliff , et al. October 8, 1
1996-10-08
Programmable logic array integrated circuits
Grant 5,550,782 - Cliff , et al. August 27, 1
1996-08-27
Programmable logic array devices with interconnect lines of various lengths
Grant 5,543,732 - McClintock , et al. August 6, 1
1996-08-06
Techniques for programming programmable logic array devices
Grant 5,543,730 - Cliff , et al. August 6, 1
1996-08-06
Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks
Grant 5,541,530 - Cliff , et al. July 30, 1
1996-07-30
Programmable logic array device with grouped logic regions and three types of conductors
Grant 5,537,057 - Leong , et al. July 16, 1
1996-07-16
Implementation of redundancy on a programmable logic device
Grant 5,498,975 - Cliff , et al. March 12, 1
1996-03-12
Programmable logic array with local and global conductors
Grant 5,485,103 - Pedersen , et al. January 16, 1
1996-01-16
Programmable logic devices with spare circuits for replacement of defects
Grant 5,485,102 - Cliff , et al. January 16, 1
1996-01-16
Look up table implementation of fast carry arithmetic and exclusive-OR operations
Grant 5,481,486 - Cliff , et al. January 2, 1
1996-01-02
Programmable logic devices with spare circuits for replacement of defects
Grant 5,434,514 - Cliff , et al. July 18, 1
1995-07-18
Programmable logic device with multiplexer-based programmable interconnections
Grant 5,376,844 - Pedersen , et al. * December 27, 1
1994-12-27
Look up table implementation of fast carry for adders and counters
Grant 5,274,581 - Cliff , et al. December 28, 1
1993-12-28
Complementary low power non-volatile reconfigurable EEcell
Grant 5,272,368 - Turner , et al. December 21, 1
1993-12-21
Programmable logic array having local and long distance conductors
Grant 5,260,611 - Cliff , et al. November 9, 1
1993-11-09
Programmable logic element interconnections for programmable logic array integrated circuits
Grant 5,260,610 - Pedersen , et al. November 9, 1
1993-11-09
Programmable logic array integrated circuits with cascade connections between logic modules
Grant 5,258,668 - Cliff , et al. November 2, 1
1993-11-02
Programmable transfer-devices
Grant 5,247,478 - Gupta , et al. September 21, 1
1993-09-21
Methods and apparatus for programming cellular programmable logic integrated circuits
Grant 5,237,219 - Cliff August 17, 1
1993-08-17
Configurable logic array
Grant 5,001,368 - Cliff , et al. March 19, 1
1991-03-19

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