Bu; Haowen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bu; Haowen.The latest application filed is for "precision capacitor".

Company Profile

4.72.89

Bu; Haowen - Plano TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Precision Capacitor App 20210202688 - Fernandes; Poornika ; et al.	2021-07-01
Precision capacitor Grant 10,964,778 - Fernandes , et al. March 30, 2	2021-03-30
Precision Capacitor App 20200219969 - Fernandes; Poornika ; et al.	2020-07-09
Precision capacitor Grant 10,644,098 - Fernandes , et al.	2020-05-05
Ic With 3d Metal-insulator-metal Capacitor App 20200006471 - FERNANDES; POORNIKA ; et al.	2020-01-02
Precision Capacitor App 20190259826 - Fernandes; Poornika ; et al.	2019-08-22
Precision Capacitor App 20190259827 - Fernandes; Poornika ; et al.	2019-08-22
Capacitor with improved voltage coefficients Grant 10,157,915 - Srinivasan , et al. Dec	2018-12-18
System and method for mitigating oxide growth in a gate dielectric Grant 10,068,771 - Bevan , et al. September 4, 2	2018-09-04
System And Method For Mitigating Oxide Growth In A Gate Dielectric App 20180130662 - Bevan; Malcolm J. ; et al.	2018-05-10
System and method for mitigating oxide growth in a gate dielectric Grant 9,892,927 - Bevan , et al. February 13, 2	2018-02-13
System and method for mitigating oxide growth in a gate dielectric Grant 9,779,946 - Bevan , et al. October 3, 2	2017-10-03
System And Method For Mitigating Oxide Growth In A Gate Dielectric App 20170170022 - Bevan; Malcolm J. ; et al.	2017-06-15
System And Method For Mitigating Oxide Growth In A Gate Dielectric App 20170133228 - Bevan; Malcolm J. ; et al.	2017-05-11
Process to enable ferroelectric layers on large area substrates Grant 9,583,336 - Srinivasan , et al. February 28, 2	2017-02-28
System and method for mitigating oxide growth in a gate dielectric Grant 9,576,804 - Bevan , et al. February 21, 2	2017-02-21
System And Method For Mitigating Oxide Growth In A Gate Dielectric App 20160300722 - Bevan; Malcolm J. ; et al.	2016-10-13
System and method for mitigating oxide growth in a gate dielectric Grant 9,396,951 - Bevan , et al. July 19, 2	2016-07-19
System and method for mitigating oxide growth in a gate dielectric Grant 9,368,355 - Bevan , et al. June 14, 2	2016-06-14
System and Method for Mitigating Oxide Growth in a Gate Dielectric App 20160155641 - Bevan; Malcolm J. ; et al.	2016-06-02
System and method for mitigating oxide growth in a gate dielectric Grant 9,337,046 - Bevan , et al. May 10, 2	2016-05-10
System and method for mitigating oxide growth in a gate dielectric Grant 9,337,044 - Bevan , et al. May 10, 2	2016-05-10
Adhesion of ferroelectric material to underlying conductive capacitor plate Grant 9,305,998 - Srinivasan , et al. April 5, 2	2016-04-05
System and Method for Mitigating Oxide Growth in a Gate Dielectric App 20160013082 - Bevan; Malcolm J. ; et al.	2016-01-14
System and Method for Mitigating Oxide Growth in a Gate Dielectric App 20160013083 - Bevan; Malcolm J. ; et al.	2016-01-14
System and Method for Mitigating Oxide Growth in a Gate Dielectric App 20160013061 - Bevan; Malcolm J. ; et al.	2016-01-14
System and method for mitigating oxide growth in a gate dielectric Grant 9,177,806 - Bevan , et al. November 3, 2	2015-11-03
Multi-step deposition of ferroelectric dielectric material Grant 8,962,350 - Srinivasan , et al. February 24, 2	2015-02-24
Hydrogen-blocking film for ferroelectric capacitors Grant 8,822,236 - Lin , et al. September 2, 2	2014-09-02
High performance CMOS transistors using PMD liner stress Grant 8,809,141 - Bu , et al. August 19, 2	2014-08-19
Multi-Step Deposition of Ferroelectric Dielectric Material App 20140225226 - Srinivasan; Bhaskar ; et al.	2014-08-14
Adhesion of Ferroelectric Material to Underlying Conductive Capacitor Plate App 20140227805 - Srinivasan; Bhaskar ; et al.	2014-08-14
Hydrogen-blocking Film For Ferroelectric Capacitors App 20130309783 - Lin; Bo-Yang ; et al.	2013-11-21
Nickel silicide formation for semiconductor components Grant 8,546,259 - DeLoach , et al. October 1, 2	2013-10-01
In-situ carbon doped e-SiGeCB stack for MOS transistor Grant 8,471,307 - Khamankar , et al. June 25, 2	2013-06-25
Hydrogen-Blocking Film for Ferroelectric Capacitors App 20130056811 - Lin; Bo-Yang ; et al.	2013-03-07
Laminated stress overlayer using In-situ multiple plasma treatments for transistor improvement Grant 8,114,784 - Bu , et al. February 14, 2	2012-02-14
Stress memorization dielectric optimized for NMOS and PMOS Grant 8,101,476 - Garg , et al. January 24, 2	2012-01-24
Nitrogen based implants for defect reduction in strained silicon Grant 8,084,312 - Chakravarthi , et al. December 27, 2	2011-12-27
PMD liner nitride films and fabrication methods for improved NMOS performance Grant 8,084,787 - Bu , et al. December 27, 2	2011-12-27
Capacitor formed on a recrystallized polysilicon layer Grant 8,053,296 - Lu , et al. November 8, 2	2011-11-08
System and Method for Mitigating Oxide Growth in a Gate Dielectric App 20110120374 - Bevan; Malcolm J. ; et al.	2011-05-26
Systems and methods that selectively modify liner induced stress Grant 7,939,400 - Tsui , et al. May 10, 2	2011-05-10
Methodology of improving the manufacturability of laser anneal Grant 7,932,139 - Bu , et al. April 26, 2	2011-04-26
System and method for mitigating oxide growth in a gate dielectric Grant 7,906,441 - Bevan , et al. March 15, 2	2011-03-15
Method for forming a metal silicide Grant 7,897,513 - Bu , et al. March 1, 2	2011-03-01
Laminated Stress Overlayer Using In-SITU Multiple Plasma Treatments for Transistor Improvement App 20110027953 - Bu; Haowen ; et al.	2011-02-03
Border region defect reduction in hybrid orientation technology (HOT) direct silicon bonded (DSB) substrates Grant 7,855,111 - Bu , et al. December 21, 2	2010-12-21
Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps Grant 7,847,401 - Chidambaram , et al. December 7, 2	2010-12-07
Antimony ion implantation for semiconductor components Grant 7,795,122 - Bu , et al. September 14, 2	2010-09-14
Gate sidewall spacer and method of manufacture therefor Grant 7,790,561 - Rouse , et al. September 7, 2	2010-09-07
Stress Memorization Dielectric Optimized For Nmos And Pmos App 20100210081 - GARG; Kanan ; et al.	2010-08-19
Capacitor Formed On A Recrystallized Polysilicon Layer App 20100159665 - Lu; Jiong-Ping ; et al.	2010-06-24
Nitrogen Based Implants for Defect Reduction in Strained Silicon App 20100120215 - CHAKRAVARTHI; Srinivasan ; et al.	2010-05-13
Methodology of implementing ultra high temperature (UHT) anneal in fabricating devices that contain sige Grant 7,700,467 - Bu , et al. April 20, 2	2010-04-20
Nitrogen based implants for defect reduction in strained silicon Grant 7,670,892 - Chakravarthi , et al. March 2, 2	2010-03-02
Using oxynitride spacer to reduce parasitic capacitance in CMOS devices Grant 7,667,275 - Chen , et al. February 23, 2	2010-02-23
Ic Formed With Densified Chemical Oxide Layer App 20100032813 - Riley; Deborah J. ; et al.	2010-02-11
Border Region Defect Reduction In Hybrid Orientation Technology (hot) Direct Silicon Bonded (dsb) Substrates App 20100032727 - Bu; Haowen ; et al.	2010-02-11
IN-SITU CARBON DOPED e-SiGeCB STACK FOR MOS TRANSISTOR App 20090309140 - Khamankar; Rajesh B. ; et al.	2009-12-17
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance Grant 7,601,575 - Bu , et al. October 13, 2	2009-10-13
Methods, Systems and Structures for Forming Semiconductor Structures Incorporating High-Temperature Processing Steps App 20090224296 - Chidambaram; PR ; et al.	2009-09-10
Semiconductor doping with improved activation Grant 7,572,716 - Bu , et al. August 11, 2	2009-08-11
Annealing Method For Sige Process App 20090170256 - Chakravarthi; Srinivasan ; et al.	2009-07-02
Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps Grant 7,553,718 - Chidambaram , et al. June 30, 2	2009-06-30
Laminated Stress Overlayer Using In-SITU Multiple Plasma Treatments for Transistor Improvement App 20090152639 - Bu; Haowen ; et al.	2009-06-18
Methodology Of Implementing Ultra High Temperature (uht) Anneal In Fabricating Devices That Contain Sige App 20090098665 - BU; Haowen ; et al.	2009-04-16
Method of manufacturing gate sidewalls that avoids recessing Grant 7,514,331 - Yoon , et al. April 7, 2	2009-04-07
Nickel Silicide Formation For Semiconductor Components App 20090079010 - DeLoach; Juanita ; et al.	2009-03-26
Systems And Methods That Selectively Modify Liner Induced Stress App 20090017588 - Tsui; Ting Y. ; et al.	2009-01-15
Method For Forming A Metal Silicide App 20090004853 - Bu; Haowen ; et al.	2009-01-01
Methodology Of Improving The Manufacturability Of Laser Anneal App 20080272097 - Bu; Haowen ; et al.	2008-11-06
Semiconductor Doping With Improved Activation App 20080268623 - Bu; Haowen ; et al.	2008-10-30
Systems and methods that selectively modify liner induced stress Grant 7,442,597 - Tsui , et al. October 28, 2	2008-10-28
PMD Liner Nitride Films and Fabrication Methods for Improved NMOS Performance App 20080251850 - Bu; Haowen ; et al.	2008-10-16
CMOS transistor using high stress liner layer Grant 7,429,517 - Wu , et al. September 30, 2	2008-09-30
Method of incorporating stress into a transistor channel by use of a backside layer Grant 7,402,535 - Nandakumar , et al. July 22, 2	2008-07-22
Method for manufacturing a silicided gate electrode using a buffer layer Grant 7,341,933 - Yu , et al. March 11, 2	2008-03-11
Method for manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same Grant 7,338,888 - Lu , et al. March 4, 2	2008-03-04
System and Method for Mitigating Oxide Growth in a Gate Dielectric App 20080050882 - Bevan; Malcolm J. ; et al.	2008-02-28
A Method Of Manufacturing Gate Sidewalls That Avoids Recessing App 20070287258 - Yoon; Jong Shik ; et al.	2007-12-13
Reduced hydrogen sidewall spacer oxide Grant 7,306,995 - Bu , et al. December 11, 2	2007-12-11
Antimony ion implantation for semiconductor components App 20070218662 - Bu; Haowen ; et al.	2007-09-20
Semiconductor device fabricated using a carbon-containing film as a contact etch stop layer App 20070210421 - Bu; Haowen ; et al.	2007-09-13
Method for fabricating dual work function metal gates Grant 7,253,049 - Lu , et al. August 7, 2	2007-08-07
Drive current improvement from recessed SiGe incorporation close to gate Grant 7,244,654 - Chidambaram , et al. July 17, 2	2007-07-17
High performance CMOS transistors using PMD liner stress App 20070128806 - Bu; Haowen ; et al.	2007-06-07
PMD liner nitride films and fabrication methods for improved NMOS performance Grant 7,226,834 - Bu , et al. June 5, 2	2007-06-05
Transistor fabrication methods using dual sidewall spacers Grant 7,217,626 - Bu , et al. May 15, 2	2007-05-15
Nitrogen based implants for defect reduction in strained silicon App 20070105294 - Chakravarthi; Srinivasan ; et al.	2007-05-10
Method of fabricating a microelectronic device using electron beam treatment to induce stress App 20070105368 - Tsui; Ting Y. ; et al.	2007-05-10
Interface improvement by stress application during oxide growth through use of backside films Grant 7,208,380 - Krishnan , et al. April 24, 2	2007-04-24
Method for fabricating transistor gate structures and gate dielectrics thereof App 20070072364 - Visokay; Mark R. ; et al.	2007-03-29
Method for fabricating transistor gate structures and gate dielectrics thereof App 20070072363 - Visokay; Mark R. ; et al.	2007-03-29
Semiconductor Device Having a Fully Silicided Gate Electrode and Method of Manufacture Therefor App 20070063294 - Bu; Haowen ; et al.	2007-03-22
High performance CMOS transistors using PMD liner stress Grant 7,192,894 - Bu , et al. March 20, 2	2007-03-20
Reduced hydrogen sidewall spacer oxide Grant 7,173,296 - Bu , et al. February 6, 2	2007-02-06
Novel gate sidewall spacer and method of manufacture therefor App 20070004156 - Rouse; Richard P. ; et al.	2007-01-04
Method for using a wet etch to manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same Grant 7,157,358 - Hall , et al. January 2, 2	2007-01-02
Semiconductor device having a fully silicided gate electrode and method of manufacture therefor Grant 7,148,143 - Bu , et al. December 12, 2	2006-12-12
Method for fabricating transistor gate structures and gate dielectrics thereof Grant 7,135,361 - Visokay , et al. November 14, 2	2006-11-14
Integration scheme to improve NMOS with poly cap while mitigating PMOS degradation Grant 7,129,127 - Chidambaram , et al. October 31, 2	2006-10-31
Methods, systems and structures for forming improved transistors Grant 7,122,435 - Chidambaram , et al. October 17, 2	2006-10-17
Using Oxynitride Spacer to Reduce Parasitic Capacitance in CMOS Devices App 20060216882 - Chen; Yuanning ; et al.	2006-09-28
Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps App 20060172502 - Chidambaram; PR ; et al.	2006-08-03
Systems and methods that selectively modify liner induced stress App 20060172481 - Tsui; Ting Y. ; et al.	2006-08-03
Method of making transistors and non-silicided polysilicon resistors for mixed signal circuits App 20060166457 - Liu; Sarah X. ; et al.	2006-07-27
CMOS transistors and methods of forming same App 20060154411 - Bu; Haowen ; et al.	2006-07-13
Method for fabricating dual work function metal gates App 20060134844 - Lu; Jiong-Ping ; et al.	2006-06-22
Forming a retrograde well in a transistor to enhance performance of the transistor Grant 7,061,058 - Chakravarthi , et al. June 13, 2	2006-06-13
Increased drive current by isotropic recess etch Grant 7,060,579 - Chidambaram , et al. June 13, 2	2006-06-13
Method for manufacturing a silicided gate electrode using a buffer layer App 20060121713 - Yu; Shaofeng ; et al.	2006-06-08
Method for integrating high-k dielectrics in transistor devices Grant 7,045,431 - Rotondaro , et al. May 16, 2	2006-05-16
Integration scheme to improve NMOS with poly cap while mitigating PMOS degradation App 20060068541 - Chidambaram; PR ; et al.	2006-03-30
Using oxynitride spacer to reduce parasitic capacitance in CMOS devices App 20060054934 - Chen; Yuanning ; et al.	2006-03-16
Transistor fabrication methods using reduced width sidewall spacers Grant 7,012,028 - Bu , et al. March 14, 2	2006-03-14
Method of incorporating stress into a transistor channel by use of a backside layer App 20060024873 - Nandakumar; Mahalingam ; et al.	2006-02-02
Increased drive current by isotropic recess etch App 20060024898 - Chidambaram; PR ; et al.	2006-02-02
Methods, systems and structures for forming improved transistors App 20060024876 - Chidambaram; PR ; et al.	2006-02-02
Transistor fabrication methods using reduced width sidewall spacers App 20060019455 - Bu; Haowen ; et al.	2006-01-26
Transistor fabrication methods using dual sidewall spacers App 20060019456 - Bu; Haowen ; et al.	2006-01-26
CMOS transistor using high stress liner layer App 20050255659 - Wu, Zhiqiang ; et al.	2005-11-17
High performance CMOS transistors using PMD linear stress App 20050245012 - Bu, Haowen ; et al.	2005-11-03
PMD liner nitride films and fabrication methods for improved NMOS performance App 20050233514 - Bu, Haowen ; et al.	2005-10-20
Forming a retrograde well in a transistor to enhance performance of the transistor App 20050224874 - Chakravarthi, Srinivasan ; et al.	2005-10-13
System and method for mitigating oxide growth in a gate dielectric App 20050221564 - Bevan, Malcolm J. ; et al.	2005-10-06
Method for manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same App 20050215037 - Lu, Jiong-Ping ; et al.	2005-09-29
Semiconductor device having a fully silicided gate electrode and method of manufacture therefor App 20050215055 - Bu, Haowen ; et al.	2005-09-29
Method for using a wet etch to manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same App 20050215038 - Hall, Lindsey ; et al.	2005-09-29
Interface improvement by stress application during oxide growth through use of backside films App 20050208776 - Krishnan, Anand T. ; et al.	2005-09-22
Source drain and extension dopant concentration App 20050189660 - Bu, Haowen ; et al.	2005-09-01
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance Grant 6,930,007 - Bu , et al. August 16, 2	2005-08-16
Forming a retrograde well in a transistor to enhance performance of the transistor Grant 6,927,137 - Chakravarthi , et al. August 9, 2	2005-08-09
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance App 20050164431 - Bu, Haowen ; et al.	2005-07-28
System and method for mitigating oxide growth in a gate dielectric Grant 6,921,703 - Bevan , et al. July 26, 2	2005-07-26
Drive current improvement from recessed SiGe incorporation close to gate App 20050139872 - Chidambaram, Pr ; et al.	2005-06-30
Reduced hydrogen sidewall spacer oxide App 20050133835 - Bu, Haowen ; et al.	2005-06-23
Reduced hydrogen sidewall spacer oxide App 20050133876 - Bu, Haowen ; et al.	2005-06-23
Method for integrating high-k dielectrics in transistor devices App 20050136589 - Rotondaro, Antonio L.P. ; et al.	2005-06-23
Method for fabricating transistor gate structures and gate dielectrics thereof App 20050130442 - Visokay, Mark R. ; et al.	2005-06-16
Method for introducing hydrogen into a channel region of a metal oxide semiconductor (MOS) device App 20050118770 - Nandakumar, Mahalingam ; et al.	2005-06-02
Forming a retrograde well in a transistor to enhance performance of the transistor App 20050118792 - Chakravarthi, Srinivasan ; et al.	2005-06-02
Capacitor formed on a recrystallized polysilicon layer and a method of manufacture therefor App 20050110114 - Lu, Jiong-Ping ; et al.	2005-05-26
CMOS transistors and methods of forming same App 20050059260 - Bu, Haowen ; et al.	2005-03-17
Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance App 20050059228 - Bu, Haowen ; et al.	2005-03-17
System and method for depositing a graded carbon layer to enhance critical layer stability App 20040248354 - Chidambaram, Pr ; et al.	2004-12-09
System and method for depositing a graded carbon layer to enhance critical layer stability App 20040235228 - Chidambaram, PR. ; et al.	2004-11-25
System and method for mitigating oxide growth in a gate dielectric App 20040229475 - Bevan, Malcolm J. ; et al.	2004-11-18
Source drain and extension dopant concentration Grant 6,812,073 - Bu , et al. November 2, 2	2004-11-02
Sidewall processes using alkylsilane precursors for MOS transistor fabrication Grant 6,806,149 - Bu , et al. October 19, 2	2004-10-19
Source Drain And Extension Dopant Concentration App 20040110352 - Bu, Haowen ; et al.	2004-06-10
Transistor with improved source/drain extension dopant concentration Grant 6,743,705 - Mehrotra , et al. June 1, 2	2004-06-01
Reduction of seed layer roughness for use in forming SiGe gate electrode App 20040067631 - Bu, Haowen ; et al.	2004-04-08
Sidewall processes using alkylsilane precursors for MOS transistor fabrication App 20040063260 - Bu, Haowen ; et al.	2004-04-01
Method of fabricating thermal CVD oxynitride and BTBAS nitride sidewall spacer for metal oxide semiconductor transistors Grant 6,677,201 - Bu , et al. January 13, 2	2004-01-13
Transistor with improved source/drain extension dopant concentration App 20030109105 - Mehrotra, Manoj ; et al.	2003-06-12