Micro flow channel chip

Description

FIG. 1 is a top plan view of a micro flow channel chip showing our new design, a bottom plan view thereof being a mirror image;

FIG. 2 is a front elevational view thereof, a rear elevational view being a mirror image;

FIG. 3 is a right side elevational view thereof, a left side elevational view being a mirror image;

FIG. 4 is a partially enlarged front, top, left perspective view thereof;

FIG. 5 is a partially enlarged top plan view thereof, a partially enlarged bottom plan view thereof being a mirror image; and,

FIG. 6 is a partially enlarged front elevational view thereof, a partially enlarged rear elevational view thereof being a mirror image.

The broken lines illustrating the portions of the micro flow channel chip form no part of the claimed invention. The dot-dash broken lines defining the boundaries of the claimed design form no part of the claimed design.

Claims

CLAIM The ornamental design for a micro flow channel chip, as shown and described.

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Inventors:	Akiyama; Yuji (Tokyo, JP), Akiyama; Shoji (Kanagawa, JP), Hashimoto; Gakuji (Kanagawa, JP), Kasai; Hiroto (Tokyo, JP), Kakuta; Masaya (Tokyo, JP), Yamasaki; Takeshi (Kanagawa, JP), Ito; Tatsumi (Kanagawa, JP), Shinoda; Masataka (Kanagawa, JP)
Applicant:	Name City State Country Type SONY CORPORATION Tokyo N/A JP
Assignee:	SONY CORPORATION (Tokyo, JP)
Appl. No.:	D/715,140
Filed:	November 27, 2019

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Related U.S. Patent Documents

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	Application Number	Filing Date	Patent Number	Issue Date
	29612907	Dec 10, 2019	D869308
	29561992	Aug 29, 2017	D795724
	29484307	May 31, 2016	D757580
	29440326	Dec 20, 2012	D907242
	29421304	May 13, 2014	D704580
	29371203	Dec 25, 2012	D673287
	29371150	Dec 25, 2012	D673286

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Current U.S. Class:	D10/103; D10/94; D24/216; D10/81
Current International Class:	1004
Field of Search:	;D10/81,94,103 ;D24/107,169,186,216,217,219,222-226,227,231,232

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References Cited [Referenced By]

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Primary Examiner: Davis; Antoine Duval
Attorney, Agent or Firm: Michael Best and Friedrich LLP