Electronics enclosure

Makis , et al. December 5, 2

Patent Grant D804438

U.S. patent number D804,438 [Application Number D/541,741] was granted by the patent office on 2017-12-05 for electronics enclosure. This patent grant is currently assigned to EATON CORPORATION. The grantee listed for this patent is EATON CORPORATION. Invention is credited to David Loren Makis, Rajkiran Bhagwat Rokade.


United States Patent D804,438
Makis ,   et al. December 5, 2017

Electronics enclosure

Claims

CLAIM The ornamental design for an electronics enclosure, as shown and described.
Inventors: Makis; David Loren (Shakopee, MN), Rokade; Rajkiran Bhagwat (Pune, IN)
Applicant:
Name City State Country Type

EATON CORPORATION

Cleveland

OH

US
Assignee: EATON CORPORATION (Cleveland, OH)
Appl. No.: D/541,741
Filed: October 7, 2015

Foreign Application Priority Data

Apr 10, 2015 [IN] 271302
Current U.S. Class: D13/184
Current International Class: 1303
Field of Search: ;D13/110,118,123,133,146,147,149,152,153,158-161,173,184,199

References Cited [Referenced By]

U.S. Patent Documents
D618619 June 2010 Walter
D625270 October 2010 Schafmeister
D631015 January 2011 Iijima
D673117 December 2012 Gassauer
D737765 September 2015 Sekine
D739822 September 2015 Severing
D750023 February 2016 Sasano
D756304 May 2016 Wu
D758317 June 2016 Plassiard
2009/0269985 October 2009 Stadler
Primary Examiner: Rogers; Lakiya
Assistant Examiner: Blackwell, II; Harold E
Attorney, Agent or Firm: Millar; Jarett D.

Description



FIG. 1 is a perspective view of an electronics enclosure showing my new design.

FIG. 2 is a front elevation view of the electronics enclosure of FIG. 1.

FIG. 3 is a back elevation view of the electronics enclosure of FIG. 1.

FIG. 4 is a top plan view of the electronics enclosure of FIG. 1.

FIG. 5 is a bottom plan view of the electronics enclosure of FIG. 1.

FIG. 6 is a left elevation view of the electronics enclosure of FIG. 1; and,

FIG. 7 is a right elevation view of the electronics enclosure of FIG. 1.

The broken lines illustrate portions of the electronics enclosure which form no part of the claimed design.

* * * * *


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