U.S. patent number D689,446 [Application Number D/390,543] was granted by the patent office on 2013-09-10 for semiconductor.
This patent grant is currently assigned to Fuji Electric Co., Ltd.. The grantee listed for this patent is Shin Soyano. Invention is credited to Shin Soyano.
United States Patent |
D689,446 |
Soyano |
September 10, 2013 |
Semiconductor
Claims
CLAIM The ornamental design for a semiconductor, as shown and
described.
Inventors: |
Soyano; Shin (Kanagawa,
JP) |
Applicant: |
Name |
City |
State |
Country |
Type |
Soyano; Shin |
Kanagawa |
N/A |
JP |
|
|
Assignee: |
Fuji Electric Co., Ltd.
(Kanagawa, JP)
|
Appl.
No.: |
D/390,543 |
Filed: |
April 26, 2011 |
Foreign Application Priority Data
|
|
|
|
|
Oct 28, 2010 [JP] |
|
|
D2010-025926 |
|
Current U.S.
Class: |
D13/180 |
Current International
Class: |
1303 |
Field of
Search: |
;D13/110,182 ;257/690
;361/704,713,728,736,775 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Sikder; Selina
Attorney, Agent or Firm: Young & Thompson
Description
FIG. 1 is a perspective view of front, top plan and right side of a
semiconductor showing our new design;
FIG. 2 is a front view thereof;
FIG. 3 is a rear view thereof;
FIG. 4 is a top plan view thereof;
FIG. 5 is a bottom view thereof;
FIG. 6 is a left side view thereof;
FIG. 7 is a right side view thereof; and,
FIG. 8 is a partial enlarged view at A-A', B-B' thereof.
The portions of the article in broken lines are shown for
illustrative purposes only and form no part of the claimed
design.
* * * * *