Micro flow channel chip

Sekizawa , et al. March 19, 2

Patent Grant D678547

U.S. patent number D678,547 [Application Number D/382,217] was granted by the patent office on 2013-03-19 for micro flow channel chip. This patent grant is currently assigned to Metaboscreen Co., Ltd.. The grantee listed for this patent is Ryoko Aso, Ryuichi Sekizawa. Invention is credited to Ryoko Aso, Ryuichi Sekizawa.


United States Patent D678,547
Sekizawa ,   et al. March 19, 2013

Micro flow channel chip

Claims

CLAIM The ornamental design for a micro flow channel chip, as shown and described.
Inventors: Sekizawa; Ryuichi (Yokohama, JP), Aso; Ryoko (Yokohama, JP)
Applicant:
Name City State Country Type

Sekizawa; Ryuichi
Aso; Ryoko

Yokohama
Yokohama

N/A
N/A

JP
JP
Assignee: Metaboscreen Co., Ltd. (Kanagawa, JP)
Appl. No.: D/382,217
Filed: December 30, 2010

Foreign Application Priority Data

Jun 30, 2010 [JP] 2010-149963
Current U.S. Class: D24/224
Current International Class: 2401
Field of Search: ;D24/216-217,219,222-226,227,231,232,107,169,186 ;D10/81 ;422/400-404,408,430,68.1,69,500,502,503 ;435/287.1,287.3,287.4,288.1,288.3,288.7

References Cited [Referenced By]

U.S. Patent Documents
5079142 January 1992 Coleman et al.
5238652 August 1993 Sun et al.
5660993 August 1997 Cathey et al.
6013513 January 2000 Reber et al.
6212416 April 2001 Ward et al.
6875579 April 2005 Schubert
6987253 January 2006 Bedingham et al.
7090984 August 2006 Hashimoto et al.
7329538 February 2008 Wainwright et al.
7407815 August 2008 Woolverton et al.
7682817 March 2010 Cohen et al.
D636891 April 2011 Nicholls et al.
D636892 April 2011 Nicholls et al.
D636893 April 2011 Nicholls et al.
8071035 December 2011 Elizarov et al.
2004/0166551 August 2004 Moulds et al.
2005/0047969 March 2005 Zhao et al.
2007/0053798 March 2007 Johnson et al.
2009/0305303 December 2009 Duvanel et al.
2010/0015606 January 2010 Davies et al.
Foreign Patent Documents
2001-157855 Jun 2001 JP
2005-140681 Jun 2005 JP
3116709 Dec 2005 JP
Primary Examiner: Doan; Anhdao

Description



FIG. 1 is a front elevational view of a first embodiment of a micro flow channel chip showing our new design, with the rear elevational view being a mirror image thereof;

FIG. 2 is a top plan view of the micro flow channel chip of FIG. 1, with the bottom plan view being a mirror image thereof;

FIG. 3 is a left side elevational view of the micro flow channel chip of FIG. 1, with the right side elevational view being a mirror image of the micro flow channel chip of FIG. 1;

FIG. 4 is a front-bottom-left perspective view of the micro flow channel chip of FIG. 1;

FIG. 5 is a partially enlarged perspective view of the micro flow channel chip shown in FIG. 4;

FIG. 6 is a front elevational view of a second embodiment of a micro flow channel chip showing our new design, with the rear elevational view being a mirror image thereof;

FIG. 7 is a top plan view of the micro flow channel chip of FIG. 6, with the bottom plan view being a mirror image thereof;

FIG. 8 is a left side elevational view of the micro flow channel chip of FIG. 6, with the right side elevational view being a mirror image thereof;

FIG. 9 is a front-bottom-right perspective view of the micro flow channel chip of FIG. 6;

FIG. 10 is a partially enlarged perspective view of the micro flow channel chip shown in FIG. 9;

FIG. 11 is a front elevational view of a third embodiment of a micro flow channel chip showing our new design, with the rear elevational view being a mirror image thereof;

FIG. 12 is a top plan view of the micro flow channel chip of FIG. 11, with the bottom plan view being a mirror image thereof;

FIG. 13 is a left side elevational view of the micro flow channel chip of FIG. 11, with the right side elevational view being a mirror image thereof;

FIG. 14 is a front-bottom-left perspective view of the micro flow channel chip of FIG. 11; and,

FIG. 15 is a partially enlarged perspective view of the micro flow channel chip shown in FIG. 14.

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