Arm for wafer transportation for manufacturing semiconductor

Description

FIG. 1 is front perspective view of an arm for wafer transportation for manufacturing semiconductor illustrating my new design;

FIG. 2 is a top plan view thereof;

FIG. 3 is a bottom view thereof;

FIG. 4 is a front view thereof;

FIG. 5 is a rear view thereof; and,

FIG. 6 is a left side view thereof, the right side view being a mirror image.

The broken lines in the drawings form no part of the claimed design.

Claims

CLAIM The ornamental design for arm for wafer transportation for manufacturing semiconductor, as shown and described.

---

Inventors:	Kajiwara; Hideki (Koshi, JP)
Applicant:	Name City State Country Type Kajiwara; Hideki Koshi N/A JP
Assignee:	Tokyo Electron Limited (Minato-Ku, JP)
Appl. No.:	D/396,039
Filed:	June 24, 2011

---

Foreign Application Priority Data

---

Jan 20, 2011 [JP]			2011-001004

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/182 ;118/500,725,728,729 ;294/103.1 ;414/217,222.01,416.03,941

---

References Cited [Referenced By]

---

U.S. Patent Documents

5643366	July 1997	Somekh et al.
6167322	December 2000	Holbrooks
6168669	January 2001	Yasuda et al.
6183183	February 2001	Goodwin et al.
6216883	April 2001	Kobayashi et al.
6293749	September 2001	Raaijmakers et al.
6409453	June 2002	Brodine et al.
7186297	March 2007	Asano
D559805	January 2008	Hosaka
7334826	February 2008	Woodruff et al.
D589474	March 2009	Ogasawara et al.
7611182	November 2009	Kim et al.
7654596	February 2010	Mantz
2003/0169916	September 2003	Hayashi et al.
2004/0182417	September 2004	Hamelin et al.
2011/0146578	June 2011	Taniyama

Primary Examiner: Sikder; Selina
Attorney, Agent or Firm: Burr & Brown