Chip-type solid state electrolytic capacitor

Description

FIG. 1 is a front, bottom and right side perspective view of a chip-type solid state electrolytic capacitor showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a right side elevational view thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom plan view thereof.

Claims

CLAIM The ornamental design for a chip-type solid state electrolytic capacitor, as shown and described.

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Inventors:	Yoshida; Katsuhiro (Sendai, JP), Katoh; Kazuyuki (Sendai, JP), Shimizu; Kunihiko (Sendai, JP)
Assignee:	NEC TOKIN Corporation (Sendai-shi, JP)
Appl. No.:	D/278,665
Filed:	April 5, 2007

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Foreign Application Priority Data

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Oct 6, 2006 [JP]			2006-027114

Current U.S. Class:	D13/125
Current International Class:	1303
Field of Search:	;D13/118,123-125,133,184,199 ;320/2 ;361/523,535,536,538,539,540,271,277,301.1,328-330,763 ;429/178

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References Cited [Referenced By]

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U.S. Patent Documents

D22207	February 1893	Greenberg
D93653	October 1934	Weston
D306431	March 1990	Venturini et al.
5331504	July 1994	Kamiya et al.
D493423	July 2004	Kubota et al.
D493424	July 2004	Kubota et al.
D494931	August 2004	Kubota et al.
D512375	December 2005	Kubota et al.
2004/0037058	February 2004	Ernsberger et al.
2005/0207090	September 2005	Kuriyama
2006/0050468	March 2006	Inoue et al.

Foreign Patent Documents

	2003-115418		Apr 2003		JP
	2006-100372		Apr 2006		JP
	2006-173441		Jun 2006		JP

Primary Examiner: Bui; Daniel D
Assistant Examiner: Johannes; Thomas J
Attorney, Agent or Firm: Westerman, Hattori, Daniels & Adrian, LLP.