Process tube for semiconductor device manufacturing apparatus

Description

FIG. 1 is an isometric view of a process tube for semiconductor device manufacturing apparatus of the present invention;

FIG. 2 is a front view thereof;

FIG. 3 is a left side view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a top view thereof;

FIG. 6 is a bottom view thereof;

FIG. 7 is a sectional view along line 7--7 shown in FIG. 5;

FIG. 8 is a sectional view along line 8--8 shown in FIG. 7;

FIG. 9 is a sectional view along line 9--9 shown in FIG. 5;

FIG. 10 is a sectional view along line 10--10 shown in FIG. 5; and,

FIG. 11 is a sectional view along line 11--11 shown in FIG. 5.

A rear view is not shown as the rear view is a mirror image of the front view shown in FIG. 2.

Claims

CLAIM The ornamental design for a process tube for semiconductor device manufacturing apparatus, as shown and described.

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Inventors:	Ishii; Katsutoshi (Tokyo, JP), Matsuura; Hiroyuki (Tokyo, JP)
Assignee:	Tokyo Electron Limited (Tokyo, JP)
Appl. No.:	D/204,406
Filed:	April 29, 2004

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Foreign Application Priority Data

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Nov 4, 2003 [JP]			2003-032503

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/182 ;117/102 ;118/715,725 ;414/935-941

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References Cited [Referenced By]

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U.S. Patent Documents

5037502	August 1991	Suzuki et al.
5279986	January 1994	Maloney et al.
5352293	October 1994	Yang et al.
5752819	May 1998	Hansotte et al.
D405062	February 1999	Shimazu
6240875	June 2001	Van Wijck et al.
6402849	June 2002	Kwag et al.

Foreign Patent Documents

	2002-280378		Sep 2002		JP

Primary Examiner: Reid; Stella
Assistant Examiner: Sikder; Selina
Attorney, Agent or Firm: Smith, Gambrell & Russell, LLP