Hybrid integrated circuit device

Description

FIG. 1 is a perspective view of a hybrid integrated circuit device showing an embodiment of our new design;

FIG. 2 is a front elevational view thereof, which is symmetrical to a rear elevational view not shown herein;

FIG. 3 is a left side elevational view thereof;

FIG. 4 is a right side elevational view thereof;

FIG. 5 is a top plan view thereof;

FIG. 6 is a bottom plan view thereof; and,

FIG. 7 is a cross sectional view, taken along the line A--A of FIG. 5.

Claims

The ornamental design for a hybrid integrated circuit device, as shown and described.

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Inventors:	Wasada; Yoshiyuki (Tokyo, JP), Ito; Tetsuya (Tokyo, JP), Tomaru; Naoki (Tokyo, JP)
Assignee:	Taiyo Yuden Co., Ltd. (Tokyo, JP)
Appl. No.:	D/143,470
Filed:	June 15, 2001

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Foreign Application Priority Data

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Dec 8, 2000 [JP]			2000-038080
Dec 8, 2000 [JP]			2000-038089

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/182,110,123,133,199 ;D10/46,75 ;29/829-832,846 ;174/250-251,253-255,260-261,268 ;216/13 ;292/314 ;361/718,748,752-753,760,783-784,820 ;411/500 ;428/901 ;470/27

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References Cited [Referenced By]

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U.S. Patent Documents

D357671	April 1995	Terasawa et al.
5742480	April 1998	Sawada et al.
D396450	July 1998	Nishiura et al.
5838546	November 1998	Miyoshi
5905639	May 1999	Warren
6028773	February 2000	Hundt
D430856	September 2000	Wilkerson
6201701	March 2001	Linden et al.

Primary Examiner: Shooman; Ted
Assistant Examiner: Bui; Daniel
Attorney, Agent or Firm: Bacon & Thomas